Commit Graph

46465 Commits

Author SHA1 Message Date
Johnny Chen b6a37bff21 Check for unallocated instruction encodings when disassembling Thumb Branch instructions (tBcc and t2Bcc).
rdar://problem/9280470

llvm-svn: 129471
2011-04-13 21:35:49 +00:00
Johnny Chen ffa6378fd6 The LDR*T/STR*T (unpriviledged load/store) operations don't take SP or PC as Rt.
rdar://problem/9279440

llvm-svn: 129469
2011-04-13 21:04:32 +00:00
Cameron Zwarich 415b5e8341 Fix a typo in an ARM-specific DAG combine. This fixes <rdar://problem/9278274>.
llvm-svn: 129468
2011-04-13 21:01:19 +00:00
Cameron Zwarich 9398197ef1 Fix a regression caused by r102515 where explicit alignment on globals is
ignored. There was a test to catch this, but it was just blindly updated in
a large change. This fixes another part of <rdar://problem/9275290>.

llvm-svn: 129466
2011-04-13 20:36:04 +00:00
Devang Patel 2772f662da Fix debug message.
llvm-svn: 129463
2011-04-13 19:47:41 +00:00
Johnny Chen 70591cbc60 Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings as such.
rdar://problem/9276651

llvm-svn: 129462
2011-04-13 19:46:05 +00:00
Devang Patel e141234940 Remove extra bytes that were added for gdb. We do not have good poiner to understand actual reason behind this fixme. Spot checking suggest that newer gdb does not need this.
llvm-svn: 129461
2011-04-13 19:41:17 +00:00
Johnny Chen 0d306a7840 Fix a bug where for t2MOVCCi disassembly, the TIED_TO register operand was not properly handled.
rdar://problem/9276427

llvm-svn: 129456
2011-04-13 17:51:02 +00:00
Johnny Chen b2f9fa1fce Forgot to add this change for http://llvm.org/viewvc/llvm-project?view=rev&revision=129387.
llvm-svn: 129451
2011-04-13 16:56:08 +00:00
Junjie Gu 377cc31a74 Fixed the revision 129449.
llvm-svn: 129450
2011-04-13 16:45:49 +00:00
Junjie Gu 7c3b4593b5 Passing unroll parameters (unroll-count, threshold, and partial unroll) via LoopUnroll class's ctor. Doing so
will allow multiple context with different loop unroll parameters to run.  This is a minor change and no effect 
on existing application.

llvm-svn: 129449
2011-04-13 16:15:29 +00:00
Rafael Espindola 6aafb64daf Add the alias analysis to the C api.
llvm-svn: 129447
2011-04-13 15:44:58 +00:00
Jim Grosbach 956de1ff66 MCJIT relocation resolution.
llvm-svn: 129445
2011-04-13 15:28:10 +00:00
Jay Foad 0091fe8ca1 PR9214: Convert ConstantExpr::getIndices() to return an ArrayRef, plus
related tweaks to ExprMapKeyType.

llvm-svn: 129443
2011-04-13 15:22:40 +00:00
Jakob Stoklund Olesen cda53febec Stop using dead function.
llvm-svn: 129442
2011-04-13 15:00:11 +00:00
Jay Foad 47f89e0f55 Remove some redundant llvm:: prefixes.
llvm-svn: 129441
2011-04-13 14:39:42 +00:00
Jay Foad 5c984e563b PR9214: Convert ConstantExpr::getWithOperands() to use ArrayRef.
llvm-svn: 129439
2011-04-13 13:46:01 +00:00
Jay Foad 3b422a1249 Like the coding standards say, do not use "using namespace std".
llvm-svn: 129435
2011-04-13 12:46:01 +00:00
Cameron Zwarich 70be27e913 Fix an obvious problem with an alignment computation. AsmPrinter actually does
the max itself, so it is not easy to write a test case for this, but I added a
test case that would fail if the code in AsmPrinter were removed.

llvm-svn: 129432
2011-04-13 09:02:43 +00:00
Cameron Zwarich 8001850ee8 Fix a typo.
llvm-svn: 129429
2011-04-13 06:39:16 +00:00
Cameron Zwarich cdf59f7016 If a global variable has a specified alignment that is less than the preferred
alignment for its type, use the minimum of the specified alignment and the ABI
alignment. This fixes <rdar://problem/9275290>.

llvm-svn: 129428
2011-04-13 06:03:16 +00:00
Andrew Trick b53a00d2cb Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.
Additional fixes:
Do something reasonable for subtargets with generic
itineraries by handle node latency the same as for an empty
itinerary. Now nodes default to unit latency unless an itinerary
explicitly specifies a zero cycle stage or it is a TokenFactor chain.

Original fixes:
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make the ndoe latency adjustments work, I also
needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.

llvm-svn: 129421
2011-04-13 00:38:32 +00:00
Bill Wendling b902f1dd88 Reapply r129401 with patch for clang.
llvm-svn: 129419
2011-04-13 00:36:11 +00:00
Eric Christopher 28f4c729f7 Temporarily revert r129408 to see if it brings the bots back.
llvm-svn: 129417
2011-04-13 00:20:59 +00:00
Rafael Espindola 539d96f01d Be consistent about being virtual and returning void in the cfi methods.
Implement the ones that were missing in the asm streamer.

llvm-svn: 129413
2011-04-12 23:59:07 +00:00
Johnny Chen 3c2f74c9f3 Add sanity check for Ld/St Dual forms of Thumb2 instructions.
rdar://problem/9273947

llvm-svn: 129411
2011-04-12 23:31:00 +00:00
Jakob Stoklund Olesen 987164043c Add @earlyclobber constraints to the writeback register of all ARM store instructions.
The ARMARM specifies these instructions as unpredictable when storing the
writeback register. This shouldn't affect code generation much since storing a
pointer to itself is quite rare.

llvm-svn: 129409
2011-04-12 23:27:48 +00:00
Eric Christopher d829f43c06 Fix a bug where we were counting the alias sets as completely used
registers for fast allocation.

Fixes rdar://9207598

llvm-svn: 129408
2011-04-12 23:23:14 +00:00
Devang Patel 0e821f4673 I missed this new file in previous commit.
llvm-svn: 129407
2011-04-12 23:21:44 +00:00
Devang Patel 28dce70364 Simplify. There is no need to use static variable.
llvm-svn: 129406
2011-04-12 23:10:47 +00:00
Devang Patel 13d47f0ddc Do not reuse parameter name.
llvm-svn: 129405
2011-04-12 23:09:06 +00:00
Bill Wendling dbfde42468 Revert r129401 for now. Clang is using the old way of doing things.
llvm-svn: 129403
2011-04-12 22:59:27 +00:00
Devang Patel f20c4f715f This mechanical patch moves type handling into CompileUnit from DwarfDebug. In case of multiple compile unit in one object file, each compile unit is responsible for its own set of type entries anyway. This refactoring makes this obvious.
llvm-svn: 129402
2011-04-12 22:53:02 +00:00
Bill Wendling 47c24875a1 Remove the unaligned load intrinsics in favor of using native unaligned loads.
Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.

First part of <rdar://problem/8460511>.

llvm-svn: 129401
2011-04-12 22:46:31 +00:00
Eric Christopher de9d58569f Add more comments... err debug statements to the fast allocator.
llvm-svn: 129400
2011-04-12 22:17:44 +00:00
Johnny Chen 960eef3db3 The Thumb2 RFE instructions need to have their second halfword fully specified.
In addition, the base register is not rGPR, but GPR with th exception that:

    if n == 15 then UNPREDICTABLE

rdar://problem/9273836

llvm-svn: 129391
2011-04-12 21:41:51 +00:00
Jakob Stoklund Olesen c49df2c05a SparseBitVector is SLOW.
Use a Bitvector instead, we didn't need the smaller memory footprint anyway.
This makes the greedy register allocator 10% faster.

llvm-svn: 129390
2011-04-12 21:30:53 +00:00
Jim Grosbach 733d305fee MCJIT lazy relocation resolution and symbol address re-assignment.
Add handling for tracking the relocations on symbols and resolving them.
Keep track of the relocations even after they are resolved so that if
the RuntimeDyld client moves the object, it can update the address and any
relocations to that object will be updated.

For our trival object file load/run test harness (llvm-rtdyld), this enables
relocations between functions located in the same object module. It should
be trivially extendable to load multiple objects with mutual references.

As a simple example, the following now works (running on x86_64 Darwin 10.6):


$ cat t.c
int bar() {
  return 65;
}

int main() {
  return bar();
}
$ clang t.c -fno-asynchronous-unwind-tables -o t.o -c
$ otool -vt t.o
t.o:
(__TEXT,__text) section
_bar:
0000000000000000  pushq %rbp
0000000000000001  movq  %rsp,%rbp
0000000000000004  movl  $0x00000041,%eax
0000000000000009  popq  %rbp
000000000000000a  ret
000000000000000b  nopl  0x00(%rax,%rax)
_main:
0000000000000010  pushq %rbp
0000000000000011  movq  %rsp,%rbp
0000000000000014  subq  $0x10,%rsp
0000000000000018  movl  $0x00000000,0xfc(%rbp)
000000000000001f  callq 0x00000024
0000000000000024  addq  $0x10,%rsp
0000000000000028  popq  %rbp
0000000000000029  ret
$ llvm-rtdyld t.o -debug-only=dyld ; echo $?
Function sym: '_bar' @ 0
Function sym: '_main' @ 16
Extracting function: _bar from [0, 15]
    allocated to 0x100153000
Extracting function: _main from [16, 41]
    allocated to 0x100154000
Relocation at '_main' + 16 from '_bar(Word1: 0x2d000000)
Resolving relocation at '_main' + 16 (0x100154010) from '_bar (0x100153000)(pcrel, type: 2, Size: 4).
loaded '_main' at: 0x100154000
65
$

llvm-svn: 129388
2011-04-12 21:20:41 +00:00
Johnny Chen 01637b9acb Add bad register checks for Thumb2 Ld/St instructions.
rdar://problem/9269047

llvm-svn: 129387
2011-04-12 21:17:51 +00:00
Andrew Trick 1b60ad6644 Revert 129383. It causes some targets to hit a scheduler assert.
llvm-svn: 129385
2011-04-12 20:14:07 +00:00
Andrew Trick c5dd24a542 PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make these heuristic adjustments to node latency work,
I also needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.

llvm-svn: 129383
2011-04-12 19:54:36 +00:00
Jakob Stoklund Olesen c70b697a40 Create new intervals for isolated blocks during region splitting.
This merges the behavior of splitSingleBlocks into splitAroundRegion, so the
RS_Region and RS_Block register stages can be coalesced. That means the leftover
intervals after region splitting go directly to spilling instead of a second
pass of per-block splitting.

llvm-svn: 129379
2011-04-12 19:32:53 +00:00
Rafael Espindola fd794affe5 Remove LastOffset from the asm parser.
llvm-svn: 129378
2011-04-12 18:53:30 +00:00
Johnny Chen ab86a519f8 The Thumb2 Ld, St, and Preload instructions with the i12 forms should have its Inst{23}
be specified as '1' (add = TRUE).

Also add a utility function for Thumb2.

llvm-svn: 129377
2011-04-12 18:48:00 +00:00
Jakob Stoklund Olesen 0840f50b76 Add SplitKit API to query and select the current interval being worked on.
This makes it possible to target multiple registers in one pass.

llvm-svn: 129374
2011-04-12 18:11:31 +00:00
Jakob Stoklund Olesen 68e84581c5 Fix a bug in RegAllocBase::addMBBLiveIns() where a basic block could accidentally be skipped.
llvm-svn: 129373
2011-04-12 18:11:28 +00:00
Devang Patel 4547a9e658 Remove dead typedef.
llvm-svn: 129368
2011-04-12 17:43:12 +00:00
Devang Patel 5eb4319dba Refactor CompileUnit into a separate header.
llvm-svn: 129367
2011-04-12 17:40:32 +00:00
Johnny Chen d0e2be39ea Print out a debug message when the reglist fails the sanity check for Thumb Ld/St Multiple.
llvm-svn: 129365
2011-04-12 17:09:04 +00:00
Rafael Espindola 1ec0f46169 Fix the case of a .cfi_rel_offset before any .cfi_def_cfa_offset.
llvm-svn: 129362
2011-04-12 16:12:03 +00:00