Commit Graph

150783 Commits

Author SHA1 Message Date
Timur Iskhodzhanov e8d7ffd01b Unrevert the tests from r183298 as they pass with both old and new code
llvm-svn: 183306
2013-06-05 13:12:36 +00:00
Timur Iskhodzhanov b640dd6f43 Revert r183298 and r183300 as the former broke the virtual function lookup in libcxx __locale
llvm-svn: 183305
2013-06-05 12:24:46 +00:00
Alexander Kornienko afd5701dc3 Make clang tools ignore -fcolor-diagnostics and -fdiagnostics-color retrieved from the compilation database.
Summary:
Clang tools' diagnostic output could be force colored when a command
line from the compilation database contains -fcolor-diagnostics or
-fdiagnostics-color. This is not what we want e.g. for vim integration.

Reviewers: klimek

Reviewed By: klimek

CC: cfe-commits, revane, jordan_rose

Differential Revision: http://llvm-reviews.chandlerc.com/D917

llvm-svn: 183304
2013-06-05 11:33:11 +00:00
Sylvestre Ledru 15a5eea3a1 The GNU/HURD is also using the libc. Therefor, endian.h should be included, not machine/endian.h. See full build log https://buildd.debian.org/status/fetch.php?pkg=llvm-toolchain-3.3&arch=hurd-i386&ver=1%3A3.3~%2Brc3-1~exp1&stamp=1370358869
llvm-svn: 183303
2013-06-05 09:17:26 +00:00
Andrew Trick 78a085170a Fix a tblgen subtargetemitter bug, for future Swift support.
This fixes some of the ridiculously complex code for optimizing the
machine model tables that are shared among all processors of a given
target. A9 and Swift both use the "special" feature that maps old
itinerary classes to new machine model defs. They map different
overlapping subsets of instructions, which wasn't handled correctly.

llvm-svn: 183302
2013-06-05 06:55:20 +00:00
NAKAMURA Takumi 05f4370074 ASTTests/DeclTest.cpp: Tweak on msvc target to add "-fno-ms-extensions".
MS extensions don't prefer imaginary suffix even with -std=c++11.

llvm-svn: 183301
2013-06-05 06:54:06 +00:00
David Blaikie d620e9da74 Fix fallout from r183298, unused function (CollectPrimaryBases) causing the -Werror build to fail
llvm-svn: 183300
2013-06-05 06:50:40 +00:00
Timur Iskhodzhanov be5a3d876c Fix the DUMP_OVERRIDERS macro in the VTableBuilder.cpp
llvm-svn: 183299
2013-06-05 06:40:07 +00:00
Timur Iskhodzhanov 12f1f84d12 Get rid of VTableContext::ComputeMethodVTableIndices() and VTableContext::getNumVirtualFunctionPointers(); also add some tests for the VTable indices output to make sure we don't regress
llvm-svn: 183298
2013-06-05 06:36:37 +00:00
David Blaikie 6f1a8067fb PR15662: Optimized debug info produces out of order function parameters
When a function is inlined we lazily construct the variables
representing the function's parameters. After that, we add any remaining
unused parameters.

If the function doesn't use all the parameters, or uses them out of
order, then the DWARF would produce them in that order, producing a
parameter order that doesn't match the source.

This fix causes us to always keep the arg variables at the start of the
variable list & in the original order from the source.

llvm-svn: 183297
2013-06-05 05:39:59 +00:00
David Blaikie e36464c2f6 PR16214: Debug Info: -flimit-debug-info doesn't omit definitions for types used via typedefs
In an effort to make -flimit-debug-info more consistent I over-shot the
mark & made types used via typedefs never produce definitions in the
debug info (even if the type was used in a way that would require a
definition).

The fix for this is to do exactly what I was hoping to do at some point
- plumb the declaration/definition choice through the various layers of
"CreateType" in CGDebugInfo. In this way we can produce declarations
whenever they are sufficient & definitions otherwise - including when
qualifiers are used, for example (discovered in PR14467). This may not
be complete (there may be other types/situations where we need to
propagate the "declaration/definition" choice) but it lays the basic
foundation which we can enhance in future iterations.

llvm-svn: 183296
2013-06-05 05:32:23 +00:00
Rafael Espindola 044f783bc0 Default to PIE and using stack protection on OpenBSD.
Patch by Matthew Dempsky.

llvm-svn: 183295
2013-06-05 04:28:55 +00:00
Tom Stellard aad5376fb6 R600: Make sure to schedule AR register uses and defs in the same clause
Reviewed-by: vljn at ovi.com
llvm-svn: 183294
2013-06-05 03:43:06 +00:00
Rafael Espindola 0fd21ca699 Don't print default values for NumberOfAuxSymbols and AuxiliaryData.
llvm-svn: 183293
2013-06-05 03:20:13 +00:00
Jakob Stoklund Olesen 303caedd4b Implement SparcV9ABIInfo::EmitVAArg.
This could actually be implemented with the LLVM IR va_arg instruction,
but it doesn't seem to offer any advantages over accessing the va_list
pointer directly.

Using the va_list pointer directly makes it possible to perform type
coercion directly from the argument array, and the va_list updates are
exposed to the optimizers.

llvm-svn: 183292
2013-06-05 03:00:18 +00:00
Jakob Stoklund Olesen 36af2529ee Fix CoerceIntOrPtrToIntOrPtr on big-endian targets.
Type coercion for argument passing is equivalent to storing the source
type and loading the destination type from the same pointer. On
big-endian targets, this means that the high bits of integers are
preserved.

This patch fixes the CoerceIntOrPtrToIntOrPtr() function on big-endian
targets by inserting the required shift instructions to preserve the
high bits instead of the low bits.

This is used by SparcABIInfo when passing small structs in the high bits
of registers.

llvm-svn: 183291
2013-06-05 03:00:13 +00:00
Jakob Stoklund Olesen a3661146ea Heed ABIArgInfo::getInReg() for return values.
The 'inreg' attribute can also be applied to function return values in
LLVM IR. The SPARC v9 backend is using the flag when returning structs
containing 32-bit floats.

llvm-svn: 183290
2013-06-05 03:00:09 +00:00
Jason Molenda 811d259bb1 Small changes to diagnose_unwind. Correctly provide help text.
Print the lldb version at the top of the output.

llvm-svn: 183289
2013-06-05 02:56:58 +00:00
Rafael Espindola 7595447b15 Handle (at least don't crash on) relocations with no symbols.
Should fix the MCJIT tests on PPC.

llvm-svn: 183288
2013-06-05 02:55:01 +00:00
Rafael Espindola 8e71301637 Move BinaryRef to a new include/llvm/Object/YAML.h file.
It will be used for ELF dumping too.

llvm-svn: 183287
2013-06-05 02:32:26 +00:00
Rafael Espindola beef23fe21 Revert "R600: Add a pass that merge Vector Register"
This reverts commit r183279. CodeGen/R600/texture-input-merge.ll was failing.

llvm-svn: 183286
2013-06-05 01:48:30 +00:00
Rafael Espindola e699c60021 Now that llvm-readobj is fixed, enable this test.
llvm-svn: 183285
2013-06-05 01:38:12 +00:00
Rafael Espindola 806f006490 Handle relocations that don't point to symbols.
In ELF (as in MachO), not all relocations point to symbols. Represent this
properly by using a symbol_iterator instead of a SymbolRef. Update llvm-readobj
ELF's dumper to handle relocatios without symbols.

llvm-svn: 183284
2013-06-05 01:33:53 +00:00
Richard Smith e6c0144208 Model temporary lifetime-extension explicitly in the AST. Use this model to
handle temporaries which have been lifetime-extended to static storage duration
within constant expressions. This correctly handles nested lifetime extension
(through reference members of aggregates in aggregate initializers) but
non-constant-expression emission hasn't yet been updated to do the same.

llvm-svn: 183283
2013-06-05 00:46:14 +00:00
Jason Molenda 23399d765c Change UnwindLLDB::SearchForSavedLocationForRegister so that it will allow for
the link register save location being in the link register - in which case we
should iterate down the stack, not recursively try to find the lr in the current
frame over and over.

<rdar://problem/13932954>

llvm-svn: 183282
2013-06-05 00:12:50 +00:00
Andrew Kaylor 912a710a8a Re-enabling a test that is no longer failing
llvm-svn: 183281
2013-06-04 23:38:51 +00:00
Sean Silva 0d65a762ac [docs] Replace non-existent LLVM_YAML_UNIQUE_TYPE() macro
LLVM_YAML_STRONG_TYPEDEF() is the correct macro to perform this function.

llvm-svn: 183280
2013-06-04 23:36:41 +00:00
Vincent Lejeune a45aafabfe R600: Add a pass that merge Vector Register
llvm-svn: 183279
2013-06-04 23:17:26 +00:00
Vincent Lejeune c689679173 R600: Const/Neg/Abs can be folded to dot4
llvm-svn: 183278
2013-06-04 23:17:15 +00:00
Jim Ingham 31caf980c6 Remember to tell the breakpoints to update themselves when new symbols are added.
<rdar://problem/14054840>

llvm-svn: 183277
2013-06-04 23:01:35 +00:00
Enrico Granata d325bf9da1 <rdar://problem/13239809>
Two things:
1) fixing a bug where memory read was not clearing the m_force flag after it was passed, so that subsequent memory reads would not need to be forced even if over boundary
2) adding a setting target.max-memory-read-size that you can set instead of the hardcoded 1024 bytes limit we had before

llvm-svn: 183276
2013-06-04 22:54:16 +00:00
Evan Cheng 4ec309700b Cortex-R5 can issue Thumb2 integer division instructions.
llvm-svn: 183275
2013-06-04 22:52:09 +00:00
Edwin Vane db7a52a6e7 cpp11-migrate: collect performance timers per source file
Performance timers captured in each transform for all files they process are now collected and arranged per source file in preparation for writing to disk.

This revision is the last piece of the initial implementation of performance timer capturing.

llvm-svn: 183274
2013-06-04 22:37:02 +00:00
Arnold Schwaighofer 2a70c69d31 Revert series of sched model patches until I figure out what is going on.
llvm-svn: 183273
2013-06-04 22:35:17 +00:00
Enrico Granata daa0ac48e6 <rdar://problem/12582328>
If you want to define a formatter for "array of Foo of any size", ordinarily you would say

-x "Foo \[[0-9]+\]"

this checkin allows you to instead say "Foo[]" (or "Foo []") and LLDB will automatically create the regular expression and add the -x flag on your behalf

llvm-svn: 183272
2013-06-04 22:25:36 +00:00
Arnold Schwaighofer 0024b8bd73 ARM sched model: Add VFP div instruction on Swift
llvm-svn: 183271
2013-06-04 22:16:08 +00:00
Arnold Schwaighofer 89901730b1 ARM sched model: Add SIMD/VFP load/store instructions on Swift
llvm-svn: 183270
2013-06-04 22:16:07 +00:00
Arnold Schwaighofer bc61f0912c ARM sched model: Add integer VFP/SIMD instructions on Swift
llvm-svn: 183269
2013-06-04 22:16:05 +00:00
Arnold Schwaighofer 83a4197085 ARM sched model: Add integer load/store instructions on Swift
llvm-svn: 183268
2013-06-04 22:16:04 +00:00
Arnold Schwaighofer f77ea45488 ARM sched model: Add integer arithmetic instructions on Swift
llvm-svn: 183267
2013-06-04 22:16:02 +00:00
Arnold Schwaighofer be3a06c85f ARM sched model: Cortex A9 - More InstRW sched resources
Add more InstRW mappings.

llvm-svn: 183266
2013-06-04 22:16:00 +00:00
Arnold Schwaighofer 76e2394799 ARM sched model: Add branch thumb instructions
llvm-svn: 183265
2013-06-04 22:15:59 +00:00
Arnold Schwaighofer 17359d9ba2 ARM sched model: Add branch thumb2 instructions
llvm-svn: 183264
2013-06-04 22:15:57 +00:00
Arnold Schwaighofer bdb5687468 ARM sched model: Add branch instructions
llvm-svn: 183263
2013-06-04 22:15:56 +00:00
Arnold Schwaighofer e971b08765 ARM sched model: Add preload thumb2 instructions
llvm-svn: 183262
2013-06-04 22:15:54 +00:00
Arnold Schwaighofer ab88312f51 ARM sched model: Add preload instructions
llvm-svn: 183261
2013-06-04 22:15:52 +00:00
Arnold Schwaighofer 83fa45629e ARM sched model: Add more ALU and CMP thumb instructions
llvm-svn: 183260
2013-06-04 22:15:51 +00:00
Arnold Schwaighofer 529c2be334 ARM sched model: Add more ALU and CMP thumb2 instructions
llvm-svn: 183259
2013-06-04 22:15:49 +00:00
Arnold Schwaighofer b6843f17eb ARM sched model: Add more ALU and CMP instructions
llvm-svn: 183258
2013-06-04 22:15:47 +00:00
Arnold Schwaighofer d5b9794a53 ARM sched model: Add divsion, loads, branches, vfp cvt
Add some generic SchedWrites and assign resources for Swift and Cortex A9.

llvm-svn: 183257
2013-06-04 22:15:46 +00:00