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20 Commits

Author SHA1 Message Date
Craig Topper b25fda95f6 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 
llvm-svn: 152997
 2012-03-17 18:46:09 +00:00
Jia Liu b22310fda6 Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
llvm-svn: 150878
 2012-02-18 12:03:15 +00:00
Richard Osborne e8ae98a8d9 Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks. 
This fixes an assert due to the operands of the DBG_VALUE instruction not
being as expected (PR11105).

llvm-svn: 141666
 2011-10-11 12:55:35 +00:00
Evan Cheng 703a0fbf39 Hide the call to InitMCInstrInfo into tblgen generated ctor. 
llvm-svn: 134244
 2011-07-01 17:57:27 +00:00
Anton Korobeynikov d08fbd19f5 Move callee-saved regs spills / reloads to TFI 
llvm-svn: 120228
 2010-11-27 23:05:03 +00:00
Jakob Stoklund Olesen 8289f78569 Remove the isMoveInstr() hook. 
llvm-svn: 108567
 2010-07-16 22:35:46 +00:00
Jakob Stoklund Olesen 928b593486 Replace copyRegToReg with copyPhysReg for XCore. 
llvm-svn: 108087
 2010-07-11 07:56:13 +00:00
Stuart Hastings 0125b6410a Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This 
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.

llvm-svn: 106243
 2010-06-17 22:43:56 +00:00
Evan Cheng 168ced94d8 Implement @llvm.returnaddress. rdar://8015977. 
llvm-svn: 104421
 2010-05-22 01:47:14 +00:00
Dan Gohman 779c69bbc5 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.

llvm-svn: 103194
 2010-05-06 20:33:48 +00:00
Evan Cheng efb126a665 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. 
llvm-svn: 103193
 2010-05-06 19:06:44 +00:00
Dan Gohman 047a767d74 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
 2009-12-05 00:44:40 +00:00
Dan Gohman be8137b0b4 Replace TargetInstrInfo::isInvariantLoad and its target-specific 
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475
 2009-10-07 17:38:06 +00:00
Dan Gohman 1432ef864e This void is implicit in C++. 
llvm-svn: 78848
 2009-08-12 22:10:57 +00:00
Eli Friedman 95fc6ee51a Remove unused member functions. 
llvm-svn: 76960
 2009-07-24 07:43:59 +00:00
Bill Wendling 09f17a8479 Untabification. 
llvm-svn: 72604
 2009-05-30 01:09:53 +00:00
Evan Cheng 64dfcacd5f Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty 
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.

llvm-svn: 64124
 2009-02-09 07:14:22 +00:00
Evan Cheng c544cb0eca Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
llvm-svn: 62600
 2009-01-20 19:12:24 +00:00
Dan Gohman 0b2732598c Add more const qualifiers. This fixes build breakage from r59540. 
llvm-svn: 59542
 2008-11-18 19:49:32 +00:00
Richard Osborne ca08e0645a Add XCore backend. 
llvm-svn: 58838
 2008-11-07 10:59:00 +00:00