Commit Graph

129271 Commits

Author SHA1 Message Date
Justin Bogner ec5ea36891 CodeGen: Fix a use-after-free in TII
Found by ASAN with the recycling allocator changes from PR26808.

llvm-svn: 264443
2016-03-25 18:38:48 +00:00
Justin Bogner f2a0d349a6 AMDGPU: Fix a use-after free and a missing break
We're erasing MI here, but then immediately using it again inside the
`if`. This moves the erase after we're done using it.

Doing that reveals a second problem though - this case is missing a
break, so we fall through to the default and dereference MI again.
This is obviously a bug, though I don't know how to write a test that
triggers it - all we do in the error case is print some extra debug
output.

Both of these issue crash on lots of tests under ASAN with the
recycling allocator changes from PR26808 applied.

llvm-svn: 264442
2016-03-25 18:33:16 +00:00
Hans Wennborg 5f916d3df4 [X86] Use "and $0" and "orl $-1" to store 0 and -1 when optimizing for minsize
64-bit, 32-bit and 16-bit move-immediate instructions are 7, 6, and 5 bytes,
respectively, whereas and/or with 8-bit immediate is only three bytes.

Since these instructions imply an additional memory read (which the CPU could
elide, but we don't think it does), restrict these patterns to minsize functions.

Differential Revision: http://reviews.llvm.org/D18374

llvm-svn: 264440
2016-03-25 18:11:31 +00:00
Sanjay Patel cd7d3ae7cc [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264438
2016-03-25 18:03:40 +00:00
Sanjay Patel d3d1179463 [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264437
2016-03-25 18:03:17 +00:00
Lang Hames d5af95efdf [Object] Remove empty private section from BinaryError.
llvm-svn: 264436
2016-03-25 18:03:08 +00:00
Sanjay Patel 721fec09b5 [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264435
2016-03-25 18:03:01 +00:00
Sanjay Patel 1395cf0d3c [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264434
2016-03-25 18:02:14 +00:00
Sanjay Patel bfbac177d2 [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264433
2016-03-25 18:01:55 +00:00
Sanjay Patel 08da4b7cd8 [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264432
2016-03-25 18:01:37 +00:00
Sanjay Patel 8f22390137 [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264431
2016-03-25 18:01:23 +00:00
Sanjay Patel 5270746978 [InstCombine] use FileCheck for better checking
(testing script for autogeneration of check lines)

llvm-svn: 264430
2016-03-25 18:01:04 +00:00
Reid Kleckner f6f04f8fc8 Consider regmasks when computing register-based DBG_VALUE live ranges
Now register parameters that aren't saved to the stack or CSRs are
considered dead after the first call. Previously the debugger would show
whatever was in the register.

Fixes PR26589

Reviewers: aprantl

Differential Revision: http://reviews.llvm.org/D17211

llvm-svn: 264429
2016-03-25 17:54:46 +00:00
Lang Hames 5d045a9031 [Kaleidoscope] Rename Error -> LogError in Chapters 2-5.
This keeps the naming consistent with Chapters 6-8, where Error was renamed to
LogError in r264426 to avoid clashes with the new Error class in libSupport.

llvm-svn: 264427
2016-03-25 17:41:26 +00:00
Lang Hames f9878c54ae [Kaleidoscope] Fix 'Error' name clashes.
llvm-svn: 264426
2016-03-25 17:33:32 +00:00
Lang Hames 9e964f3728 [Object] Start threading Error through MachOObjectFile construction.
llvm-svn: 264425
2016-03-25 17:25:34 +00:00
Sanjay Patel 246e7f7057 [InstCombine] consolidate regression tests of the ancients (2002)
Testing out the check-generator-script that's now in the utils folder.

llvm-svn: 264424
2016-03-25 17:16:32 +00:00
Sanjay Patel e54e6f5601 fix IR function name regex to allow hyphens
llvm-svn: 264422
2016-03-25 17:00:12 +00:00
Adrian Prantl 5979790e42 Document the purpose of this testcase.
llvm-svn: 264421
2016-03-25 16:49:57 +00:00
Jun Bum Lim 8e8b2de4ac Revert "[SetVector] Add erase() method"
This reverts commit r264414.

llvm-svn: 264420
2016-03-25 16:49:16 +00:00
Hemant Kulkarni 456bd51c7d Fix Narrowing conversion warning introduced by r264415
llvm-svn: 264419
2016-03-25 16:37:03 +00:00
Mehdi Amini 169eda643c Improve StringMap unittests: reintroduce move count, but shield against std::pair internals
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264418
2016-03-25 16:36:00 +00:00
Mehdi Amini 4b86a191c3 Ensure that the StringMap does not grow during the test for pre-allocation/reserve
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264416
2016-03-25 16:09:34 +00:00
Hemant Kulkarni 966b3ac502 [llvm-readobj] Impl GNU style program headers print
readelf -lW

Differential Revision: http://reviews.llvm.org/D18372

llvm-svn: 264415
2016-03-25 16:04:48 +00:00
Jun Bum Lim 0902821234 [SetVector] Add erase() method
Summary:
Add erase() which returns an iterator pointing to the next element after the
erased one. This makes it possible to erase selected elements while iterating
over the SetVector :
  while (I != E)
    if (test(*I))
      I = SetVector.erase(I);
    else
      ++I;

Reviewers: qcolombet, mcrosier, MatzeB, dblaikie

Subscribers: dberlin, dblaikie, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18281

llvm-svn: 264414
2016-03-25 16:04:43 +00:00
Mehdi Amini 9706dcf93b Disable counting the number of move in the unittest, it seems to rely on move-construction elision
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264412
2016-03-25 15:46:14 +00:00
Jonas Paulsson 5dd1e56de5 [SystemZ] Remove isBranch and isTerminator flags on BRCT and BRCTG.
The BranchUnaryRI instruction class already sets these flags.

Reviewed by Ulrich Weigand.

llvm-svn: 264411
2016-03-25 15:42:30 +00:00
Duncan P. N. Exon Smith fc8110041f Revert "Bitcode: Collect all MDString records into a single blob"
This reverts commit r264409 since it failed to bootstrap:
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_build/8302/

llvm-svn: 264410
2016-03-25 15:22:27 +00:00
Duncan P. N. Exon Smith fdbf0a5af8 Bitcode: Collect all MDString records into a single blob
Optimize output of MDStrings in bitcode.  This emits them in big blocks
(currently 1024) in a pair of records:
  - BULK_STRING_SIZES: the sizes of the strings in the block, and
  - BULK_STRING_DATA: a single blob, which is the concatenation of all
    the strings.

Inspired by Mehdi's similar patch, http://reviews.llvm.org/D18342, this
should (a) slightly reduce bitcode size, since there is less record
overhead, and (b) greatly improve reading speed, since blobs are super
cheap to deserialize.

I needed to add support for blobs to streaming input to get the test
suite passing.
  - StreamingMemoryObject::getPointer reads ahead and returns the
    address of the blob.
  - To avoid a possible reallocation of StreamingMemoryObject::Bytes,
    BitstreamCursor::readRecord needs to move the call to JumpToEnd
    forward so that getPointer is the last bitstream operation.

llvm-svn: 264409
2016-03-25 14:40:18 +00:00
Chad Rosier 59bcbba6b4 [AArch64] Fix typo. NFC.
llvm-svn: 264408
2016-03-25 14:37:43 +00:00
David L Kreitzer 8d441eb936 Enable non-power-of-2 #pragma unroll counts.
Patch by Evgeny Stupachenko.

Differential Revision: http://reviews.llvm.org/D18202

llvm-svn: 264407
2016-03-25 14:24:52 +00:00
Simon Pilgrim ac04923b0f [X86][SSE] Don't duplicate Lower256IntArith functionality in LowerShift. NFC.
LowerShift was using the same code as Lower256IntArith to split 256-bit vectors into 2 x 128-bit vectors, so now we just call Lower256IntArith.

llvm-svn: 264403
2016-03-25 14:17:54 +00:00
Elena Demikhovsky abc9c04ab7 fixed typo
llvm-svn: 264395
2016-03-25 10:08:36 +00:00
Mehdi Amini 7c481ae02f Fix windows build for sys::fs:file_status Access Time added in r264392
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264393
2016-03-25 07:40:52 +00:00
Mehdi Amini 1e39ef331b Add lastAccessedTime to file_status
Differential Revision: http://reviews.llvm.org/D18456

This is a re-commit of r264387 and r264388 after fixing a typo.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264392
2016-03-25 07:30:21 +00:00
Mehdi Amini 3db6ae035a Fix perfect forwarding for StringMap
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264391
2016-03-25 07:11:31 +00:00
Mehdi Amini ec68482e53 Revert "Add lastAccessedTime to file_status"
This reverts commit r264387.
Bots are broken in various ways, I need to take one commit at a time...

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264390
2016-03-25 06:51:43 +00:00
Mehdi Amini 5aba49ebc3 Revert "Fix windows build for sys::fs:file_status Access Time added in r264387"
This reverts commit r264388.
Bots are broken in various ways, I need to take one commit at a time...

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264389
2016-03-25 06:43:22 +00:00
Mehdi Amini e3249fc6ab Fix windows build for sys::fs:file_status Access Time added in r264387
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264388
2016-03-25 06:06:44 +00:00
Mehdi Amini b53b351a8e Add lastAccessedTime to file_status
Reviewers: silvas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18456

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264387
2016-03-25 05:58:11 +00:00
Mehdi Amini cb708b265d Query the StringMap only once when creating MDString (NFC)
Summary:
Loading IR with debug info improves MDString::get() from 19ms to 10ms.
This is a rework of D16597 with adding an "emplace" method on the StringMap
to avoid requiring the MDString move ctor to be public.

Reviewers: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17920

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264386
2016-03-25 05:58:04 +00:00
Mehdi Amini be8a57f9bf Adjust initial size in StringMap constructor to guarantee no grow()
Summary:
StringMap ctor accepts an initialize size, but expect it to be
rounded to the next power of 2. The ctor can handle that directly
instead of expecting clients to round it. Also, since the map will
resize itself when 75% full, take this into account an initialize
a larger initial size to avoid any growth.

Reviewers: dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18344

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264385
2016-03-25 05:57:57 +00:00
Mehdi Amini 05eca80cb8 Fix DenseMap::reserve(): the formula was wrong
Summary:
Just running the loop in the unittests for a few more iterations
(till 48) exhibit that the condition on the limit was not handled
properly in r263522.
Rewrite the test to use a class to count move/copies that happens
when inserting into the map.
Also take the opportunity to refactor the logic to compute the
number of buckets required for a given number of entries in the map.
Use this when constructing a DenseMap with a desired size given to
the constructor (and add a tests for this).

Reviewers: dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18345

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264384
2016-03-25 05:57:52 +00:00
Mehdi Amini 8bdafd4902 StringMap: reserve appropriate size when initializing from an initializer list
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264383
2016-03-25 05:57:47 +00:00
Mehdi Amini 4f2bb50b20 Add GUID/getGlobalIdentifier() non-static API to global value
Summary:
These are just helpers calling their static counter part to
simplify client code.

Reviewers: tejohnson

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18339

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264382
2016-03-25 05:57:41 +00:00
Duncan P. N. Exon Smith bdde9e1f21 Bitcode: Use std::stable_partition for reproducible builds
Caught by inspection while working on partitioning metadata.  It's nice
to produce the same bitcode if you run the compiler twice.

llvm-svn: 264381
2016-03-25 02:20:28 +00:00
Duncan P. N. Exon Smith 68f5624356 Bitcode: Stop using MODULE_CODE_METADATA_VALUES
The motivation for MODULE_CODE_METADATA_VALUES was to enable an
-flto=thin scheme where:

 1. First, one function is cherry-picked from a bitcode file.
 2. Later, another function is cherry-picked.
 3. Later, ...
 4. Finally, the metadata needed by all the previous functions is
    loaded.

This was abandoned in favour of:

 1. Calculate the superset of functions needed from a Module.
 2. Link all functions at once.

Delayed metadata reading no longer serves a purpose.  It also adds
a few complication, since we can't count on metadata being properly
parsed when exiting the BitcodeReader.  After discussing with Teresa, we
agreed to remove it.

The code that depended on this was removed/updated in r264326.

llvm-svn: 264378
2016-03-25 01:29:50 +00:00
Matt Arsenault 8c8fcb2585 AMDGPU: Cost model for basic integer operations
This resolves bug 21148 by preventing promotion to
i64 induction variables.

llvm-svn: 264376
2016-03-25 01:16:40 +00:00
Hans Wennborg 4ae5119eeb X86: Use push-pop for materializing 8-bit immediates for minsize (take 2)
This is the same as r255936, with added logic for avoiding clobbering of the
red zone (PR26023).

Differential Revision: http://reviews.llvm.org/D18246

llvm-svn: 264375
2016-03-25 01:10:56 +00:00
Matt Arsenault 9651813ee0 AMDGPU: Partially implement getArithmeticInstrCost for FP ops
llvm-svn: 264374
2016-03-25 01:00:32 +00:00
Duncan P. N. Exon Smith efe16c8eb4 IR: Stop upgrading !llvm.loop attachments via MDString
Remove logic to upgrade !llvm.loop by changing the MDString tag
directly.  This old logic would check (and change) arbitrary strings
that had nothing to do with loop metadata.  Instead, check !llvm.loop
attachments directly, and change which strings get attached.

Rather than updating the assembly-based upgrade, drop it entirely.  It
has been quite a while since we supported upgrading textual IR.

llvm-svn: 264373
2016-03-25 00:56:13 +00:00
Duncan P. N. Exon Smith 1d15a9f0c9 IR: Reserve an MDKind for !llvm.loop; NFC
This reserves an MDKind for !llvm.loop, which allows callers to avoid a
string-based lookup.  I'm not sure why it was missing.

There should be no functionality change here, just a small compile-time
speedup.

llvm-svn: 264371
2016-03-25 00:35:38 +00:00
Saleem Abdulrasool 0dab98d926 ARM: fix optimised division on WoA
We did not have an explicit branch to the continuation BB.  When the check was
hoisted, this could permit control follow to fall through into the division
trap.  Add the explicit branch to the continuation basic block to ensure that
code execution is correct.

llvm-svn: 264370
2016-03-25 00:34:11 +00:00
Matt Arsenault 51d702812d TTI: Report 0 cost for free addrspacecasts
llvm-svn: 264369
2016-03-25 00:26:29 +00:00
Matt Arsenault 8e9aa0acc8 TTI: Use 0 for cost of fabs if free
Ideally this would also happen for fneg, but that
isn't a distinct operation in the IR.

llvm-svn: 264368
2016-03-25 00:26:22 +00:00
Matt Arsenault 59767cea79 AMDGPU: TTI: Make insertelement free.
We don't want to have a cost to scalarizing operations.

llvm-svn: 264364
2016-03-25 00:14:11 +00:00
Reid Kleckner a15b76b377 Try to fix ODR violation of ErrorInfo::ID
This implements my suggestion to Lang.

llvm-svn: 264360
2016-03-24 23:49:34 +00:00
Manman Ren 9dd8c14674 CXX TLS: collect return blocks after SelectAllBasicBlocks.
It is incorrect to get the corresponding MBB for a ReturnInst before
SelectAllBasicBlocks since SelectAllBasicBlocks can change the
correspondence between a ReturnInst and the MBB it is in.

PR27062

llvm-svn: 264358
2016-03-24 23:21:29 +00:00
Sanjay Patel fff7a3d0ef Add utility script to generate checks for opt or llc regression tests
This is an enhancement of the existing update_llc_test_checks.py script.
It adds some of the functionality from the script used in D17999 to make
the IR checking more flexible.

The bad news: 
This actually is 'My First Python Program'. Thus, it's likely that I have
violated all best practices of Python programming if I've made a functional
change from the original program. If you see anything that's obviously 
wrong, please let me know or feel free to fix it. I didn't even read any
documentation...

The good news: 
I tested this on ~10 existing opt/llc regression tests, and it does what 
I hoped for. It produces exact checking for IR regression tests and doesn't
signficantly change the existing llc-with-x86-target asm checking. The opt
tests that were modified in r263667, r263668, r263674, and r263679 are
examples of the expected results, except that this version of the script 
puts the check lines ahead of the IR to follow the existing llc/asm 
behavior.

If there are no complaints/fallout, we should be able to remove the 
original script. Extending this script to be used for non-x86 and clang
regression tests would be the expected follow-up steps.

llvm-svn: 264357
2016-03-24 23:19:26 +00:00
Sanjoy Das fd3eaa8c5c Reduce code duplication by extracting out a helper function; NFC
llvm-svn: 264355
2016-03-24 22:51:49 +00:00
Sanjoy Das 731c67fed2 Lower varargs correctly in deopt bundle lowering
Earlier we were ignoring varargs in LowerCallSiteWithDeoptBundle because
populateCallLoweringInfo does not set CallLoweringInfo::IsVarArg.

llvm-svn: 264354
2016-03-24 22:37:52 +00:00
Sean Silva a915a1690e Fix typo: XDS -> XDG
Patch by Robert Ma <bob1211@gmail.com>!

llvm-svn: 264352
2016-03-24 22:27:27 +00:00
David Blaikie ce7c6cfe0e llvm-dwp: Coalesce code for reading the CU's DW_AT_GNU_dwo_id and DW_AT_name
Going to be reading the DW_AT_GNU_dwo_name shortly as well, and there
was already enough duplication here that it was worth refactoring
rather than adding even more.

llvm-svn: 264350
2016-03-24 22:17:08 +00:00
Mike Aizatsky 6b510a4c01 [sancov] renaming statistics fields.
llvm-svn: 264349
2016-03-24 21:49:55 +00:00
Matthias Braun ae81c29352 LiveInterval: Fix Distribute() failing on liveranges with unused VNInfos
This fixes http://llvm.org/PR26991

llvm-svn: 264345
2016-03-24 21:41:38 +00:00
David Majnemer e09d035dad [LoopStrengthReduce] Don't hoist into a catchswitch
We try to hoist the insertion point as high as possible to encourage
sharing.  However, we must be careful not to hoist into a catchswitch as
it is both an EHPad and a terminator.

llvm-svn: 264344
2016-03-24 21:40:22 +00:00
Lang Hames 699d96535d [Support] Add ErrorInfo::ID static member definition.
Somehow this got dropped in an earlier patch.

llvm-svn: 264341
2016-03-24 21:17:50 +00:00
Eric Christopher b979d51afa Finish the incomplete 'd' inline asm constraint support for PPC by
making sure we give it a register and mark it as a register constraint.

llvm-svn: 264340
2016-03-24 21:04:52 +00:00
Eric Christopher 8c95d53d45 Reorder check lines, comments in test and remove unnecessary IR.
llvm-svn: 264339
2016-03-24 21:04:47 +00:00
Kostya Serebryany f389ae12c1 [libFuzzer] handle SIGTERM
llvm-svn: 264338
2016-03-24 21:03:58 +00:00
Sanjoy Das 6bcfe31820 Match call and target calling conventions in test
Fixes an issue in rL264329.

llvm-svn: 264337
2016-03-24 20:51:24 +00:00
Mike Aizatsky a4c651a2cc [sancov] adding leading zeros to coverage pct.
Summary:
Using leading zeroes allows you to search for "000%" to find non-covered
items.

Differential Revision: http://reviews.llvm.org/D18420

llvm-svn: 264336
2016-03-24 20:41:18 +00:00
Dimitry Andric 3a4f7ac669 Add <atomic> to ThreadPool.h, since std::atomic is used
Summary:
Apparently, when compiling with gcc 5.3.2 for powerpc64, the order of
headers is such that it gets an error about std::atomic<> use in
ThreadPool.h, since this header is not included explicitly.  See also:

https://llvm.org/bugs/show_bug.cgi?id=27058

Fix this by including <atomic>.  Patch by Bryan Drewery.

Reviewers: chandlerc, joker.eph

Subscribers: bdrewery, llvm-commits

Differential Revision: http://reviews.llvm.org/D18460

llvm-svn: 264335
2016-03-24 20:39:17 +00:00
Reid Kleckner 01bc66a8ce Revert "Recommitted r263424 "Supporting all entities declared in lexical scope in LLVM debug info." After fixing PR26942 (the fix is included in this commit)."
This reverts commit r264280.

This broke building Chromium for iOS. We'll upload a reproducer to the
PR soon.

llvm-svn: 264334
2016-03-24 20:38:49 +00:00
Krzysztof Parzyszek 01598de3ec [Hexagon] Be sure to treat subregisters of a CSR as CSRs as well
llvm-svn: 264331
2016-03-24 20:31:41 +00:00
David Blaikie 6ae4bc8958 [ADT] C++11ify SmallVector::erase's arguments from iterator to const_iterator
llvm-svn: 264330
2016-03-24 20:25:51 +00:00
Sanjoy Das df9ae70f49 Add lowering support for llvm.experimental.deoptimize
Summary:
Only adds support for "naked" calls to llvm.experimental.deoptimize.
Support for round-tripping through RewriteStatepointsForGC will come
as a separate patch (should be simpler than this one).

Reviewers: reames

Subscribers: sanjoy, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18429

llvm-svn: 264329
2016-03-24 20:23:29 +00:00
Krzysztof Parzyszek c9d4caa32c [Hexagon] Add support for run-time stack overflow checking
Patch by Sundeep Kushwaha.

llvm-svn: 264328
2016-03-24 20:20:07 +00:00
Teresa Johnson f4cc752553 [ThinLTO] Use bulk importing in llvm-link
Summary:
Use bulk importing so we can avoid the use of post-pass metadata
linking. Cloned the ModuleLazyLoaderCache from the FunctionImport pass
to facilitate this.

Reviewers: joker.eph

Subscribers: dexonsmith, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18455

llvm-svn: 264326
2016-03-24 19:52:20 +00:00
Krzysztof Parzyszek 181fdbd174 [Hexagon] Generate PIC-specific versions of save/restore routines
In PIC mode, the registers R14, R15 and R28 are reserved for use by
the PLT handling code. This causes all functions to clobber these
registers. While this is not new for regular function calls, it does
also apply to save/restore functions, which do not follow the standard
ABI conventions with respect to the volatile/non-volatile registers.

Patch by Jyotsna Verma.

llvm-svn: 264324
2016-03-24 19:18:48 +00:00
Richard Smith c74ebd0ef9 Stop relying on mapped_iterator's function having a result_type. That facility
is deprecated in modern C++ and unnecessary since decltype can be used to query
the relevant type.

llvm-svn: 264321
2016-03-24 19:10:58 +00:00
Sanjoy Das c0c59fe14e [Statepoints] Fix yet another issue around gc pointer uniqueing
Given that StatepointLowering now uniques derived pointers before
putting them in the per-statepoint spill map, we may end up with missing
entries for derived pointers when we visit a gc.relocate on a pointer
that was de-duplicated away.

Fix this by keeping two maps, one mapping gc pointers to their
de-duplicated values, and one mapping a de-duplicated value to the slot
it is spilled in.

llvm-svn: 264320
2016-03-24 18:57:39 +00:00
Sanjoy Das 42f91a9959 Minor cosmestic changes (NFC)
- Reflow comments
 - Rename function

llvm-svn: 264319
2016-03-24 18:57:31 +00:00
Chris Bieneman 611eeae7d2 [Docs] Updating CMake docs to include LLVM_OPTIMIZED_TABLEGEN
This is based on feedback on llvm-commits from Sean Silvas.

llvm-svn: 264318
2016-03-24 18:46:43 +00:00
David Blaikie 0b214e4a2a [debuginfo] Include dwo_name in the split unit to improve dwp diagnostics
When multiple DWP files are merged together and duplicate DWO IDs are
found it's currently difficult to give an actionable error message - the
DW_AT_name of the CU could be provided, but might be identical (if the
same source file is built into two different configurations), which
doesn't help the user identify the problem.

When no intermediate DWP files are generated, the path to the two DWO
files could be provided - but is lost once the DWOs are merged into a
DWP.

So, include the name of the DWO (dwo_name) in the split file so that
collissions involving a source CU from a DWP can be better diagnosed.

(improvements to llvm-dwp using this to come shortly)

llvm-svn: 264316
2016-03-24 18:37:08 +00:00
Lang Hames 1684d7c944 [docs] Clarify Error example in Programmer's Manual.
llvm-svn: 264314
2016-03-24 18:05:21 +00:00
Adam Nemet 7aba60c853 [LLE] Check for mismatching types between the store and the load earlier
isDependenceDistanceOfOne asserts that the store and the load access
through the same type.  This function is also used by
removeDependencesFromMultipleStores so we need to make sure we filter
out mismatching types before reaching this point.

Now we do this when the initial candidates are gathered.

This is a refinement of the fix made in r262267.

Fixes PR27048.

llvm-svn: 264313
2016-03-24 17:59:26 +00:00
Sanjay Patel 506fd0d81d don't hardcode the name of the llc checks script
We lose the 'utils' directory name in our advertising line with
this change. We could retain that, but I don't see the point.
This removes a dependency for making the script apply to more than
'llc'. Ie, we'll want to change the script name if it works with 
opt/clang too.

llvm-svn: 264310
2016-03-24 17:30:38 +00:00
Simon Atanasyan 26fe92d19f [MC][mips] Add MipsMCInstrAnalysis class and register it as MC instruction analyzer
The `MipsMCInstrAnalysis` class overrides the `evaluateBranch` method
and calculates target addresses for branch and calls instructions.
That allows llvm-objdump to print functions' names in branch instructions
in the disassemble mode.

Differential Revision: http://reviews.llvm.org/D18209

llvm-svn: 264309
2016-03-24 17:18:14 +00:00
Sanjoy Das 8f42b7b3cd Remove unnecessary redirect from test
llvm-svn: 264308
2016-03-24 17:18:00 +00:00
Sanjay Patel f3c5f46ed1 reorganize llc checks script to allow more flexibility, part 2; NFCI
The goal is to enhance this script to be used with opt and clang:
Break 'main' into functions and change variable names to be more
generic because we want to handle more than x86 asm output.

llvm-svn: 264307
2016-03-24 17:15:42 +00:00
Rafael Espindola fe26864440 Fix gold tests for llvm-readobj format change.
llvm-svn: 264306
2016-03-24 16:45:41 +00:00
Simon Pilgrim a6ba27fbde [X86][XOP] Fixed instruction postfixes to more closely match operands
Suggested by Sanjay in D18189 as the multiple folding options in XOP instructions can be tricky

llvm-svn: 264305
2016-03-24 16:31:30 +00:00
Duncan P. N. Exon Smith a5e25a5563 BitcodeWriter: Move abbreviation for GenericDINode; almost NFC
Simplify ValueEnumerator and WriteModuleMetadata by shifting the logic
for the METADATA_GENERIC_DEBUG abbreviation into WriteGenericDINode.
(This is just like r264302, but for GenericDINode.)

The only change is that the abbreviation is emitted later in the
bitcode, just before the first `GenericDINode` record.  This shouldn't
be observable though.

llvm-svn: 264303
2016-03-24 16:30:18 +00:00
Duncan P. N. Exon Smith 625fda2714 BitcodeWriter: Move abbreviation for DILocation; almost NFC
Simplify ValueEnumerator and WriteModuleMetadata by shifting the logic
for the METADATA_LOCATION abbreviation into WriteDILocation.

The only change is that the abbreviation is emitted later in the
bitcode, just before the first `DILocation` record.  This shouldn't be
observable though.

llvm-svn: 264302
2016-03-24 16:25:51 +00:00
Duncan P. N. Exon Smith f8ecdf5284 BitcodeWriter: Split out named metadata; almost NFC
Split writeNamedMetadata out of WriteModuleMetadata to write named
metadata, and createNamedMetadataAbbrev for the abbreviation.

There should be no effective functionality change, although the layout
of the bitcode will change.  Previously, the abbreviation was emitted at
the top of the block, but now it is delayed until immediately before the
named metadata records are emitted.

llvm-svn: 264301
2016-03-24 16:16:08 +00:00
Simon Atanasyan b7807a0c8e [llvm-readobj] Decode st_other symbol's flags
The patch supports common STV_xxx visibility flags and MIPS specific
STO_MIPS_xxx flags.

Differential Revision: http://reviews.llvm.org/D18447

llvm-svn: 264300
2016-03-24 16:10:37 +00:00
Duncan P. N. Exon Smith 0b7243ee38 Bitcode: Module* -> Module&, NFC
llvm-svn: 264299
2016-03-24 16:01:46 +00:00
Elena Demikhovsky 95f3173ce9 AVX-512: Generate KTEST instead of TEST fir i1 vectors
KTEST instruction may be used instead of TEST in this case:

%int_sel3 = bitcast <8 x i1> %sel3 to i8
%res = icmp eq i8 %int_sel3, zeroinitializer
br i1 %res, label %L2, label %L1

Differential Revision: http://reviews.llvm.org/D18444

llvm-svn: 264298
2016-03-24 15:53:45 +00:00
NAKAMURA Takumi 882f2092a8 ErrorTest.cpp: Move instantiations out of anonymous namespace. gcc didn't complain.
llvm-svn: 264297
2016-03-24 15:40:46 +00:00
Tim Northover 4498eff9bb CodeGen: extend RHS when splitting ATOMIC_CMP_SWAP_WITH_SUCCESS.
If the operation's type has been promoted during type legalization, we
need to account for the fact that the high bits of the comparison
operand are likely unspecified.

The LHS is usually zero-extended, but MIPS sign extends it, so we have
to be slightly careful.

Patch by Simon Dardis.

llvm-svn: 264296
2016-03-24 15:38:38 +00:00
Tom Stellard 9babad25e5 AMDGPU/SI: Add Polaris support
Patch By: Sonny Jiang

llvm-svn: 264295
2016-03-24 15:31:05 +00:00
Simon Pilgrim d7c4fce47d [X86][XOP] Merged 128/256 bit 4op instruction definitions. NFCI.
llvm-svn: 264294
2016-03-24 15:28:02 +00:00
NAKAMURA Takumi e6d29c9928 Define ErrorInfo::ID explicitly.
llvm-svn: 264293
2016-03-24 15:26:43 +00:00
Rafael Espindola e1c42ac12b Fix another case where we were unconditionally linking linkonce GVs.
With this I think that now llvm-link,  lld and the gold plugin should
agree on which symbol is kept.

llvm-svn: 264292
2016-03-24 15:23:01 +00:00
NAKAMURA Takumi d8c1be66ab Error.cpp: Fix a warning. [-Wpedantic]
llvm-svn: 264291
2016-03-24 15:19:39 +00:00
NAKAMURA Takumi b2cef64b61 ErrorTest.cpp: Fix an expression, possibly typo.
llvm-svn: 264290
2016-03-24 15:19:22 +00:00
Rafael Espindola 42e0323768 Fix resolution of linkonce symbols in comdats.
After comdat processing, the symbols still go through regular symbol
resolution.

We were not doing it for linkonce symbols since they are lazy linked.

This fixes pr27044.

llvm-svn: 264288
2016-03-24 14:58:44 +00:00
Daniel Sanders 15f8fb6f83 [mips] Range check vsplat_simm5 and vsplat_simm10
Summary:

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D18177

llvm-svn: 264287
2016-03-24 14:53:40 +00:00
Pirama Arumuga Nainar dc45aef2d8 Remove unsafe AssertZext after promoting result of FP_TO_FP16
Summary:
Some target lowerings of FP_TO_FP16, for instance ARM's vcvtb.f16.f32
instruction, do not guarantee that the top 16 bits are zeroed out.
Remove the unsafe AssertZext and add tests to exercise this.

Reviewers: jmolloy, sbaranga, kristof.beyls, aadg

Subscribers: llvm-commits, srhines, aemerson

Differential Revision: http://reviews.llvm.org/D18426

llvm-svn: 264285
2016-03-24 14:06:03 +00:00
Nemanja Ivanovic 5ebc92dbe1 [PowerPC] Disable direct moves for extractelement and bitcast in 32-bit mode
This patch corresponds to review:
http://reviews.llvm.org/D17711

It disables direct moves on these operations in 32-bit mode since the patterns
assume 64-bit registers. The final patch is slightly different from the
Phabricator review as the bitcast operations needed to be disabled in 32-bit
mode as well. This fixes PR26617.

llvm-svn: 264282
2016-03-24 13:40:33 +00:00
Amjad Aboud 6ff7e10052 Recommitted r263424 "Supporting all entities declared in lexical scope in LLVM debug info."
After fixing PR26942 (the fix is included in this commit).

Differential Revision: http://reviews.llvm.org/D18350

llvm-svn: 264280
2016-03-24 13:30:16 +00:00
Daniel Sanders 837f15187b [mips] Range check simm10
Summary:

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D18148

llvm-svn: 264279
2016-03-24 13:26:59 +00:00
Simon Pilgrim 572ca71573 [X86][XOP] Support for VPPERM byte shuffle instruction
This patch begins adding support for lowering to the XOP VPPERM instruction - adding the X86ISD::VPPERM opcode.

Differential Revision: http://reviews.llvm.org/D18189

llvm-svn: 264260
2016-03-24 11:52:43 +00:00
Daniel Sanders f692130216 [mips] Tidy up cnMIPS tablegen definitions. NFC.
Summary:
In particular, make the cnMIPS predicates much more obvious and prefer
  def ... : ... {
    let Foo = bar;
  }
over:
  let Foo = bar in
  def ... : ...;

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18354

llvm-svn: 264258
2016-03-24 11:40:48 +00:00
Vasileios Kalintiris b8a37205d2 Fix sequence point warning. NFC.
llvm-svn: 264255
2016-03-24 10:53:28 +00:00
James Molloy 08a15ce5d4 [llvm-nm] Fix r264247
I committed the test changes successfully but managed to miss the actual code change! (lack of git -a)

llvm-svn: 264249
2016-03-24 09:23:51 +00:00
Zlatko Buljan 94af4cbcf4 [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions
Differential Revision: http://reviews.llvm.org/D17137

llvm-svn: 264248
2016-03-24 09:22:45 +00:00
James Molloy ee675880b8 [llvm-nm] Correct -P ELF output
Correctly add a space between the address and size when outputting in posix mode (-P).

llvm-svn: 264247
2016-03-24 09:18:09 +00:00
Hrvoje Varga 2cb74ac3c3 [mips][microMIPS] Implement MTC*, MTHC* and DMTC* instructions
Differential Revision: http://reviews.llvm.org/D17328

llvm-svn: 264246
2016-03-24 08:02:09 +00:00
Hrvoje Varga dbea1a1e51 [mips][microMIPS] Fix for "Cannot copy registers" assertion
Differential Revision: http://reviews.llvm.org/D17068

llvm-svn: 264245
2016-03-24 06:05:35 +00:00
Adam Nemet 59a6550425 [LAA] Formatting fix in previous change
llvm-svn: 264244
2016-03-24 05:15:24 +00:00
Adam Nemet 279784ffc4 [LAA] Support memchecks involving loop-invariant addresses
We used to only allow SCEVAddRecExpr for pointer expressions in order to
be able to compute the bounds.  However this is also trivially possible
for loop-invariant addresses (scUnknown) since then the bounds are the
address itself.

Interestingly, we used allow this for the special case when the
loop-invariant address happens to also be an SCEVAddRecExpr (in an outer
loop).

There are a couple more loops that are vectorized in SPEC after this.
My guess is that the main reason we don't see more because for example a
loop-invariant load is vectorized into a splat vector with several
vector-inserts.  This is likely to make the vectorization unprofitable.
I.e. we don't notice that a later LICM will move all of this out of the
loop so the cost estimate should really be 0.

llvm-svn: 264243
2016-03-24 04:28:47 +00:00
Lang Hames d21a535bf6 [Support] Add conversions between Expected<T> and ErrorOr<T>.
More utilities to help with std::error_code -> Error transitions.

llvm-svn: 264238
2016-03-24 02:00:10 +00:00
Kostya Serebryany 315167339e [libFuzzer] don't report memory leaks if we are dying due to a timeout (just use _Exit instead of exit in the timeout callback)
llvm-svn: 264237
2016-03-24 01:32:08 +00:00
Kostya Serebryany 6278f933a8 [libFuzzer] use fdopen+vfprintf instead of fsnprintf+write
llvm-svn: 264230
2016-03-24 00:57:32 +00:00
Simon Pilgrim 0110890a79 [X86][SSE] Added tests to ensure that consecutive loads including any/all volatiles are not combined
llvm-svn: 264225
2016-03-24 00:14:37 +00:00
Paul Robinson f81836bd18 [PS4] Guarantee an instruction after a 'noreturn' call.
We need the "return address" of a noreturn call to be within the
bounds of the calling function; TrapUnreachable turns 'unreachable'
into a 'ud2' instruction, which has that desired effect.

Differential Revision: http://reviews.llvm.org/D18414

llvm-svn: 264224
2016-03-24 00:10:03 +00:00
Rafael Espindola 1ee9fbd842 Fix lazy linking of comdat members.
If not for lazy linking of linkonce GVs, comdats are just a
preprocessing before symbol resolution.

Lazy linking complicates it since when we pick a visible member of
comdat, we have to make sure the rest of it passes symbol resolution
too.

llvm-svn: 264223
2016-03-24 00:06:03 +00:00
Mike Aizatsky 5c79bb364a [sancov] -print-coverage-stats option to print various coverage statistics.
Differential Revision: http://reviews.llvm.org/D18418

llvm-svn: 264222
2016-03-24 00:00:08 +00:00
Lang Hames e7aad357a9 [Support] Make all Errors convertible to std::error_code.
This is a temporary crutch to enable code that currently uses std::error_code
to be incrementally moved over to Error. Requiring all Error instances be
convertible enables clients to call errorToErrorCode on any error (not just
ECErrors created by conversion *from* an error_code).

This patch also moves code for Error from ErrorHandling.cpp into a new
Error.cpp file.

llvm-svn: 264221
2016-03-23 23:57:28 +00:00
Matt Arsenault ea00b499c7 APFloat: Fix signalling nans for scalbn
llvm-svn: 264219
2016-03-23 23:51:45 +00:00
Matt Arsenault 30d37a74da AMDGPU: Remove atomic inc/dec patterns
There is no benefit to these since materializing the constant 1
requires the same number of instructions as materializing uint_max

llvm-svn: 264215
2016-03-23 23:23:38 +00:00
Matt Arsenault 0a30e456b4 AMDGPU: Promote alloca should skip volatiles
llvm-svn: 264214
2016-03-23 23:17:29 +00:00
Mike Aizatsky 9987f43ffa [sancov] code readability improvement.
Summary: Reply to http://reviews.llvm.org/D18341

Differential Revision: http://reviews.llvm.org/D18406

llvm-svn: 264213
2016-03-23 23:15:03 +00:00
Justin Bogner 91269bfd7a docs: Fix a missing language in a code-block
This should fix the docs build.
Spotted by spstarr, thanks!

llvm-svn: 264209
2016-03-23 22:54:19 +00:00
Justin Lebar 068a79493a [CUDA] Update docs to reflect that we no longer define __NVCC__.
llvm-svn: 264208
2016-03-23 22:43:10 +00:00
Pete Cooper b08d9060b7 StringRef::copy shouldn't allocate anything for length 0 strings.
The BumpPtrAllocator currently doesn't handle zero length allocations well.
The discussion for how to fix that is ongoing.  However, there's no need
for StringRef::copy to actually allocate anything here anyway, so just
return StringRef() when we get a zero length copy.

Reviewed by David Blaikie

llvm-svn: 264201
2016-03-23 21:49:31 +00:00
Matt Arsenault f43c2a0b49 AMDGPU: Insert moves of frame index to value operands
Strengthen tests of storing frame indices.

Right now this just creates irrelevant scheduling changes.

We don't want to have multiple frame index operands
on an instruction. There seem to be various assumptions
that at least the same frame index will not appear twice
in the LocalStackSlotAllocation pass.

There's no reason to have this happen, and it just
makes it easy to introduce bugs where the immediate
offset is appplied to the storing instruction when it should
really be applied to the value being stored as a separate
add.

This might not be sufficient. It might still be problematic
to have an add fi, fi situation, but that's even less unlikely
to happen in real code.

llvm-svn: 264200
2016-03-23 21:49:25 +00:00
Cong Hou 94710840fb Allow X86::COND_NE_OR_P and X86::COND_NP_OR_E to be reversed.
Currently, AnalyzeBranch() fails non-equality comparison between floating points
on X86 (see https://llvm.org/bugs/show_bug.cgi?id=23875). This is because this
function can modify the branch by reversing the conditional jump and removing
unconditional jump if there is a proper fall-through. However, in the case of
non-equality comparison between floating points, this can turn the branch
"unanalyzable". Consider the following case:

jne.BB1
jp.BB1
jmp.BB2
.BB1:
...
.BB2:
...

AnalyzeBranch() will reverse "jp .BB1" to "jnp .BB2" and then "jmp .BB2" will be
removed:

jne.BB1
jnp.BB2
.BB1:
...
.BB2:
...

However, AnalyzeBranch() cannot analyze this branch anymore as there are two
conditional jumps with different targets. This may disable some optimizations
like block-placement: in this case the fall-through behavior is enforced even if
the fall-through block is very cold, which is suboptimal.

Actually this optimization is also done in block-placement pass, which means we
can remove this optimization from AnalyzeBranch(). However, currently
X86::COND_NE_OR_P and X86::COND_NP_OR_E are not reversible: there is no defined
negation conditions for them.

In order to reverse them, this patch defines two new CondCode X86::COND_E_AND_NP
and X86::COND_P_AND_NE. It also defines how to synthesize instructions for them.
Here only the second conditional jump is reversed. This is valid as we only need
them to do this "unconditional jump removal" optimization.


Differential Revision: http://reviews.llvm.org/D11393

llvm-svn: 264199
2016-03-23 21:45:37 +00:00
Kevin Enderby 74f58d4121 Fix a cut-and-paste error in the changes for r264187 which I think is
the cause of the tools/llvm-objdump/X86/macho-symbolized-disassembly.test
crashing on linux.  Either way clearly incorrect code.

llvm-svn: 264198
2016-03-23 21:45:21 +00:00
Sanjay Patel bf623017b7 reorganize llc checks script to allow more flexibility; NFCI
The goal is to enhance this script to be used with opt and clang:
Group all of the regexes together, so it's easier to see what's going on.
This will make it easier to break main() up into pieces too. 
Also, note that some of the regexes are for x86-specific asm. 

llvm-svn: 264197
2016-03-23 21:40:53 +00:00
Kevin Enderby 8fb96b958a More more change need as part of r264187 where ErrorOr<> was added
to getSymbolType().

llvm-svn: 264194
2016-03-23 21:20:16 +00:00
Rafael Espindola f2e71244c6 Fix logic for which symbols to keep with comdats.
If a comdat is dropped, all symbols in it are dropped.
If a comdat is kept, the symbols survive to pass regular symbol
resolution.
With this patch we do that for all global symbols.

The added test is a copy of test/tools/gold/X86/comdat.ll that we now
pass.

llvm-svn: 264192
2016-03-23 21:16:33 +00:00
Kevin Enderby 5afbc1cda7 Fix a crash in running llvm-objdump -t with an invalid Mach-O file already
in the test suite. While this is not really an interesting tool and option to run
on a Mach-O file to show the symbol table in a generic libObject format
it shouldn’t crash.

The reason for the crash was in MachOObjectFile::getSymbolType() when it was
calling MachOObjectFile::getSymbolSection() without checking its return value
for the error case.

What makes this fix require a fair bit of diffs is that the method getSymbolType() is
in the class ObjectFile defined without an ErrorOr<> so I needed to add that all
the sub classes.  And all of the uses needed to be updated and the return value
needed to be checked for the error case.

The MachOObjectFile version of getSymbolType() “can” get an error in trying to
come up with the libObject’s internal SymbolRef::Type when the Mach-O symbol
symbol type is an N_SECT type because the code is trying to select from the
SymbolRef::ST_Data or SymbolRef::ST_Function values for the SymbolRef::Type.
And it needs the Mach-O section to use isData() and isBSS to determine if
it will return SymbolRef::ST_Data.

One other possible fix I considered is to simply return SymbolRef::ST_Other
when MachOObjectFile::getSymbolSection() returned an error.  But since in
the past when I did such changes that “ate an error in the libObject code” I
was asked instead to push the error out of the libObject code I chose not
to implement the fix this way.

As currently written both the COFF and ELF versions of getSymbolType()
can’t get an error.  But if isReservedSectionNumber() wanted to check for
the two known negative values rather than allowing all negative values or
the code wanted to add the same check as in getSymbolAddress() to use
getSection() and check for the error then these versions of getSymbolType()
could return errors.

At the end of the day the error printed now is the generic “Invalid data was
encountered while parsing the file” for object_error::parse_failed.  In the
future when we thread Lang’s new TypedError for recoverable error handling
though libObject this will improve.  And where the added // Diagnostic(…
comment is, it would be changed to produce and error message
like “bad section index (42) for symbol at index 8” for this case.

llvm-svn: 264187
2016-03-23 20:27:00 +00:00
Sanjay Patel 7876f180b5 [x86] make peekThroughBitcasts() a helper function
This should be hoisted further up so it can be used in DAGCombiner and other backends,
but I'm limiting the scope in the interest of patch minimalism.

It's not quite NFC because some of the replaced code was using an 'if' check rather
than a 'while' loop, so those cases would only look through a single bitcast.

llvm-svn: 264186
2016-03-23 20:16:37 +00:00
Chad Rosier 85c8594056 [AArch64] Replace return 0 with return false. NFC.
llvm-svn: 264185
2016-03-23 20:07:28 +00:00
Kyle Butt 613112826e Codegen: [PPC] Word Rotates are Zero Extending.
Add Word rotates to the list of instructions that are zero extending.
This allows them to be used in dot form to compare with zero.

llvm-svn: 264183
2016-03-23 19:51:22 +00:00
George Burgess IV 0e4898685f Fix bugs in the MemorySSA walker.
There are a few bugs in the walker that this patch addresses.
Primarily:
- Caching can break when we have multiple BBs without phis
- We weren't optimizing some phis properly
- Because of how the DFS iterator works, there were times where we
  wouldn't cache any results of our DFS

I left the test cases with FIXMEs in, because I'm not sure how much
effort it will take to get those to work (read: We'll probably
ultimately have to end up redoing the walker, or we'll have to come up
with some creative caching tricks), and more test coverage = better.

Differential Revision: http://reviews.llvm.org/D18065

llvm-svn: 264180
2016-03-23 18:31:55 +00:00
Easwaran Raman 12b79aa0f1 Add getBlockProfileCount method to BlockFrequencyInfo
Differential Revision: http://reviews.llvm.org/D18233

llvm-svn: 264179
2016-03-23 18:18:26 +00:00
Justin Bogner c35c10593b SelectionDAG: Remove a tautological dyn_cast. NFC
Index is already a StoreSDNode, so this dyn_cast doesn't do anything.

llvm-svn: 264177
2016-03-23 18:15:33 +00:00
Artyom Skrobov e6f1b7f094 Replace a string comparison in ARMSubtarget.h with a tablegen entry in ARM.td (NFC)
Reviewers: rengolin, t.p.northover

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D18393

llvm-svn: 264165
2016-03-23 16:18:13 +00:00
Silviu Baranga d68ed85401 [SCEV] Change the SCEV Predicates interfaces for conversion to AddRecExpr to return SCEVAddRecExpr* instead of SCEV*
Summary:
This changes the conversion functions from SCEV * to SCEVAddRecExpr from
ScalarEvolution and PredicatedScalarEvolution to return a SCEVAddRecExpr*
instead of a SCEV* (which removes the need of most clients to do a
dyn_cast right after calling these functions).

We also don't add new predicates if the transformation was not successful.

This is not entirely a NFC (as it can theoretically remove some predicates
from LAA when we have an unknown dependece), but I couldn't find an obvious
regression test for it.

Reviewers: sanjoy

Subscribers: sanjoy, mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D18368

llvm-svn: 264161
2016-03-23 15:29:30 +00:00
Simon Pilgrim b5fb65d43e [X86] Regenerated WidenArith test
llvm-svn: 264157
2016-03-23 14:00:28 +00:00
Oliver Stannard aa77b1e025 [AArch64] Replace some uses of report_fatal_error with reportError in AArch64 ELF object writer
If we can't handle a relocation type, report it as an error in the source,
rather than asserting. I've added a more descriptive message and a test for the
only cases of this that I've been able to trigger.

Differential Revision: http://reviews.llvm.org/D18388

llvm-svn: 264156
2016-03-23 13:45:03 +00:00
Andrey Turetskiy 6a3d561ea0 [X86] Introduction of FeatureX87.
Add FeatureX87 in X86 backend to be able to define CPUs which doesn't have x87.

Differential Revision: http://reviews.llvm.org/D13979

llvm-svn: 264148
2016-03-23 11:13:54 +00:00
Hrvoje Varga c45baf212a [mips][microMIPS] Delay slot filler modifications
Differential Revision: http://reviews.llvm.org/D18181

llvm-svn: 264147
2016-03-23 10:29:38 +00:00
Justin Bogner 5d6d9ebc4d FAQ: Remove the entire Build Problems section
This is all horribly outdated, and is mostly about the autoconf build
system that doesn't even exist anymore. These questions aren't
frequent, and these answers aren't useful.

llvm-svn: 264141
2016-03-23 06:54:42 +00:00
Justin Bogner 46c8e3a614 FAQ: We require GCC 4.7 - nobody's asking about build failures with 3.3.2
llvm-svn: 264139
2016-03-23 06:38:53 +00:00
Vedant Kumar a34bdfaae7 [docs] Fix typo in ProgrammersManual.rst
Patch by Miod Vallat!

llvm-svn: 264138
2016-03-23 05:18:50 +00:00
Valery Pykhtin c0a77c5064 [AMDGPU] Fix missing assembler predicates.
Differential Revision: http://reviews.llvm.org/D18351

llvm-svn: 264137
2016-03-23 04:27:26 +00:00
Lang Hames a0f517fc15 [Docs] Clarify boolean conversion for Error and Expected<T> in the Programmer's
Manual.

llvm-svn: 264135
2016-03-23 03:18:16 +00:00
Sanjoy Das a5b2972977 Remove stale comment
llvm-svn: 264131
2016-03-23 02:28:35 +00:00
Sanjoy Das ac53dc7520 [StatepointLowering] Don't do two DenseMap lookups; nfci
llvm-svn: 264130
2016-03-23 02:24:15 +00:00
Sanjoy Das 7edbef316b [StatepointLowering] Minor NFC cleanups
- Use auto
 - Name variables in LLVM style
 - Use llvm::find instead of std::find
 - Blank lines between declarations

llvm-svn: 264129
2016-03-23 02:24:13 +00:00
Sanjoy Das 4cd746ebe0 [StatepointLowering] Minor nfc refactoring
Now that StatepointLoweringInfo represents base pointers, derived
pointers and gc relocates as SmallVectors and not ArrayRefs, we no
longer need to allocate "backing storage" on stack in LowerStatepoint.
So elide the backing storage, and inline the trivial body of
getIncomingStatepointGCValues.

llvm-svn: 264128
2016-03-23 02:24:10 +00:00
Sanjoy Das e58ca59cf4 [StatepointLowering] Schedule gc relocates before uniqueing them
Otherwise we can see an "unexpected" gc.relocate that we uniqued away.

llvm-svn: 264127
2016-03-23 02:24:07 +00:00
Tom Stellard 52ecd2d69b AMDGPU: Cache information about register pressure sets
We can statically decide whether or not a register pressure set is for
SGPRs or VGPRs, so we don't need to re-compute this information in
SIRegisterInfo::getRegPressureSetLimit().

Differential Revision: http://reviews.llvm.org/D14805

llvm-svn: 264126
2016-03-23 01:53:22 +00:00
Junmo Park 820964e9c6 Minor code cleanup. NFC.
llvm-svn: 264124
2016-03-23 01:38:35 +00:00
Davide Italiano 1a911e204d [ModuleUtils] Use range-based loop. NFC.
llvm-svn: 264122
2016-03-23 00:43:35 +00:00
Sean Silva c28b49550a [docs] Use reST link.
llvm-svn: 264121
2016-03-23 00:31:21 +00:00
Sean Silva 5977930a4b Bring back Makefile.sphinx
It is not part of autoconf and should not have been removed in r258861.

llvm-svn: 264120
2016-03-23 00:30:57 +00:00
Sean Silva 232c331702 [docs] Clarify the sense of --compile-command
In retrospect, it seems "obvious" that the sense of the return code is
the same as if it crashed on "interesting" inputs. But that didn't stop
me from spending more time than I care to admit verifying this.

llvm-svn: 264119
2016-03-23 00:25:13 +00:00
Joerg Sonnenberger 772bb5b65d Typo
llvm-svn: 264110
2016-03-22 22:24:52 +00:00
Justin Bogner 8809c40270 MC: Don't access the filesystem in MCContext's constructor
MCContext shouldn't be accessing the filesystem - that's a gross
layering violation and makes it awkward to use as a library or in a
daemon where it may not even be allowed filesystem access.

The CWD lookup here is normally redundant anyway, since the calling
context either also looks up the CWD or sets this to something more
specific. Here, we fix up the one caller that doesn't already set up a
debug compilation dir and make it clear that the responsibility for
such set up is in the users of MCContext.

llvm-svn: 264109
2016-03-22 22:24:29 +00:00
Justin Lebar e87e1c6cdd [NVVM] Remove noduplicate attribute from synchronizing intrinsics.
Summary:
I've completed my audit of all the code that looks at noduplicate and
added handling of convergent where appropriate, so we no longer need
noduplicate on these intrinsics.

Reviewers: jholewinski

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D18168

llvm-svn: 264107
2016-03-22 22:08:01 +00:00
Rafael Espindola 370d528a05 Drop comdats from the dst module if they are not selected.
A really unfortunate design of llvm-link and related libraries is that
they operate one module at a time.

This means they can copy a GV to the destination module that should not
be there in the final result because a later bitcode file takes
precedence.

We already handled cases like a strong GV replacing a weak for example.

One case that is not currently handled is a comdat replacing another.
This doesn't happen in ELF, but with COFF largest selection kind it is
possible.

In "llvm-link a.ll b.ll" if the selected comdat was from a.ll,
everything will work and we will not copy the comdat from b.ll.

But if we run "llvm-link b.ll a.ll", we fail to delete the already
copied comdat from b.ll. This patch fixes that.

llvm-svn: 264103
2016-03-22 21:35:47 +00:00
George Burgess IV d4febd1612 Keep CodeGenPrepare from preserving the domtree.
CGP modifies the domtree in some cases, so saying that it preserves the
domtree is a lie. We'll be able to selectively preserve it with the new
pass manager.

Differential Revision: http://reviews.llvm.org/D16893

llvm-svn: 264099
2016-03-22 21:25:08 +00:00
Matthias Braun 68bb2931cc Revert "Support arbitrary addrspace pointers in masked load/store intrinsics"
This commit broke LTO builds. Reverting it to unbreak the bots while the
issue is investigated. See also:

http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160321/341002.html

This reverts r263158

llvm-svn: 264088
2016-03-22 20:24:34 +00:00
Simon Pilgrim cc41495eb8 [X86][AVX] Added AVX1 tests for 256-bit vector idiv-by-constant
Prep work based on feedback for D18307 

llvm-svn: 264086
2016-03-22 20:10:49 +00:00
Simon Pilgrim c6f5fe3d69 [SelectionDAG] Ensure constant folded legalized vector element types are compatible with the BUILD_VECTOR type
Found during fuzz testing - 32-bit x86 targets were legalizing a <2 x i1> compare result to <2 x i32> when <2 x i64> was expected.

llvm-svn: 264085
2016-03-22 19:59:53 +00:00
Tim Northover b49a8a9dbb CodeGen: check return types match when emitting tail call to builtin.
We were just completely ignoring the types when determining whether we could
safely emit a libcall as a tail call. This is clearly wrong.

Theoretically, we could dig deeper looking for incidental matches (much like
the generic code in Analysis.cpp does), but it's probably not worth it for the
few libcalls that exist.

llvm-svn: 264084
2016-03-22 19:14:38 +00:00
Sanjoy Das bfecef5e1b Remove unnecessary branch from test
(Addresses post commit review by Reid Kleckner)

llvm-svn: 264083
2016-03-22 18:45:41 +00:00
Adam Nemet 8b47e0d0ea [LoopVersioning] Relax an assert for LCSSA PHIs
When you have multiple LCSSA (single-operand) PHIs that are converted
into two-operand PHIs due to versioning, only assert that the PHI
currently being converted has a single operand.  I.e. we don't want to
check PHIs that were converted earlier in the loop.

Fixes PR27023.

Thanks to Karl-Johan Karlsson for the minimized testcase!

llvm-svn: 264081
2016-03-22 18:38:15 +00:00
Sanjoy Das eb5037cadc Allow lowering call sites with both funclets and deopt state
Lowering funclets is a no-op, so we can just go ahead and lower the
deopt state.

llvm-svn: 264078
2016-03-22 18:10:39 +00:00
Dan Gohman 665d7e3838 [WebAssembly] Implement the rotate instructions.
llvm-svn: 264076
2016-03-22 18:01:49 +00:00
Sanjoy Das 6b535630a1 Add a hasOperandBundlesOtherThan helper, and use it; NFC
llvm-svn: 264072
2016-03-22 17:51:25 +00:00
Simon Pilgrim 25fb4177fb [X86][SSE] Reapplied: Simplify vector LOAD + EXTEND on pre-SSE41 hardware
Improve vector extension of vectors on hardware without dedicated VSEXT/VZEXT instructions.

We already convert these to SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG but can further improve this by using the legalizer instead of prematurely splitting into legal vectors in the combine as this only properly helps for lowering to VSEXT/VZEXT.

Removes a lot of unnecessary any_extend + mask pattern - (Fix for PR25718).

Reapplied with a fix for PR26953 (missing vector widening legalization).

Differential Revision: http://reviews.llvm.org/D17932

llvm-svn: 264062
2016-03-22 16:22:08 +00:00
Vedant Kumar 0259b7b44e [unittests] clang-format a line, NFC
llvm-svn: 264059
2016-03-22 15:14:18 +00:00
Daniel Sanders f3599eb683 [mips] Make simm6 consistent with the rest. NFC.
Summary:

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18147

llvm-svn: 264057
2016-03-22 14:50:22 +00:00
Daniel Sanders 97297770a6 [mips] Range check simm7.
Summary:
Also renamed li_simm7 to li16_imm since it's not a simm7 and has an unusual
encoding (it's a uimm7 except that 0x7f represents -1).

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18145

llvm-svn: 264056
2016-03-22 14:40:00 +00:00
Daniel Sanders 0f17d0da4a [mips] Range check simm5.
Summary:
We can't check the error message for this one because there's another lw/sw
available that covers a larger range. We therefore check the transition
between the two sizes.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D18144

llvm-svn: 264054
2016-03-22 14:29:53 +00:00
Daniel Sanders 946dee3b5b [mips] Range check vsplat_uimm[1234568].
Summary:

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18143

llvm-svn: 264053
2016-03-22 14:17:41 +00:00
Daniel Sanders 93fa4ce9b7 [mips] Range check uimm4_ptr, remove uimm6_ptr, and use correctly sized immediates in MSA copy/insert.
Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18142

llvm-svn: 264052
2016-03-22 13:58:53 +00:00
Zinovy Nis 07ac2bd4d0 [PATCH] Force LoopReroll to reset the loop trip count value after reroll.
It's a bug fix. 
For rerolled loops SE trip count remains unchanged. It leads to incorrect work of the next passes.
My patch just resets SE info for rerolled loop forcing SE to re-evaluate it next time it requested.
I also added a verifier call in the exisitng test to be sure no invalid SE data remain. Without my fix this test would fail with -verify-scev.

Differential Revision: http://reviews.llvm.org/D18316

llvm-svn: 264051
2016-03-22 13:50:57 +00:00
Marina Yatsina 33ef7dad18 [ELF][gcc compatibility]: support section names with special characters (e.g. "/")
Adding support for section names with special characters in them (e.g. "/").
GCC successfully compiles such section names.
This also fixes PR24520.

Differential Revision: http://reviews.llvm.org/D15678

llvm-svn: 264038
2016-03-22 11:23:15 +00:00
Mehdi Amini 844baa240a Fix unittests: resize() -> reserve()
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264029
2016-03-22 07:35:51 +00:00
Mehdi Amini c04fc7a60f Rename DenseMap::resize() into DenseMap::reserve() (NFC)
This is more coherent with usual containers.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 264026
2016-03-22 07:20:00 +00:00
Junmo Park 5ac1a47cad Minor code cleanup. NFC.
llvm-svn: 264024
2016-03-22 04:37:32 +00:00
Sanjoy Das dd1d72ce92 Appease the windows buildbots
The guess is that the stdout/stderr ordering may differ between windows
/ unix.

llvm-svn: 264019
2016-03-22 02:11:57 +00:00
Sanjoy Das 38bfc22161 Add "first class" lowering for deopt operand bundles
Summary:
After this change, deopt operand bundles can be lowered directly by
SelectionDAG into STATEPOINT instructions (which are then lowered to a
call or sequence of nop, with an associated __llvm_stackmaps entry0.
This obviates the need to round-trip deoptimization state through
gc.statepoint via RewriteStatepointsForGC.

Reviewers: reames, atrick, majnemer, JosephTremoulet, pgavlin

Subscribers: sanjoy, mcrosier, majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D18257

llvm-svn: 264015
2016-03-22 00:59:13 +00:00
Mike Aizatsky 602f79275d [sancov] do not instrument nodes that are full pre-dominators
Summary:
Without tree pruning clang has 2,667,552 points.
Wiht only dominators pruning: 1,515,586.
With both dominators & predominators pruning: 1,340,534.

Resubmit of r262103.

Differential Revision: http://reviews.llvm.org/D18341

llvm-svn: 264003
2016-03-21 23:08:16 +00:00
Justin Lebar 32835c82d5 [CUDA] Add documentation explaining how to detect clang vs nvcc.
llvm-svn: 264002
2016-03-21 23:05:15 +00:00
Nicolai Haehnle 0a33abdfd2 AMDGPU: Fix dangling references introduced by r263982
Fixes Valgrind errors on the test cases that were reported as failing
by buildbots.

llvm-svn: 264000
2016-03-21 22:54:02 +00:00
Simon Pilgrim b57b002253 [InstCombine] Ensure all undef operands are handled before binary instruction constant folding
As noted in PR18355, this patch makes it clear that all cases with undef operands have been handled before further constant folding is attempted.

Differential Revision: http://reviews.llvm.org/D18305

llvm-svn: 263994
2016-03-21 22:15:50 +00:00
Duncan P. N. Exon Smith 20be876a64 Fix -Wdocumentation warnings from r263853
Thanks to chapuni for catching this.

llvm-svn: 263993
2016-03-21 22:13:44 +00:00
George Burgess IV 3887a41725 [MemorySSA] Consider def-only BBs for live-in calculations.
If we have a BB with only MemoryDefs, live-in calculations will ignore
it. This means we get results like this:

define void @foo(i8* %p) {
  ; 1 = MemoryDef(liveOnEntry)
  store i8 0, i8* %p
  br i1 undef, label %if.then, label %if.end

if.then:
  ; 2 = MemoryDef(1)
  store i8 1, i8* %p
  br label %if.end

if.end:
  ; 3 = MemoryDef(1)
  store i8 2, i8* %p
  ret void
}

...When there should be a MemoryPhi in the `if.end` BB.

This patch fixes that behavior.

llvm-svn: 263991
2016-03-21 21:25:39 +00:00
Krzysztof Parzyszek 67e6ae5e2a Remove leftover options from multiline.ll
I added -march=hexagon to force using Hexagon target when testing
locally, and I forgot to take it out.

llvm-svn: 263990
2016-03-21 21:25:01 +00:00
Rafael Espindola 7ff714c339 Add a testcase that would have found the bug in r263971.
llvm-svn: 263988
2016-03-21 21:09:38 +00:00
Rafael Espindola 9219fe79b9 Revert "[llvm-objdump] Printing relocations in executable and shared object files. This partially reverts r215844 by removing test objdump-reloc-shared.test which stated GNU objdump doesn't print relocations, it does."
This reverts commit r263971.
It produces the wrong results for .rela.dyn. I will add a test.

llvm-svn: 263987
2016-03-21 20:59:15 +00:00
Krzysztof Parzyszek 738c6277a6 Unxfail test/DebugInfo/Generic/multiline.ll on Hexagon
llvm-svn: 263986
2016-03-21 20:55:59 +00:00
Nicolai Haehnle a56e6b6a53 AMDGPU: Coding style fixes
I meant to add these before committing r263982 as per the review,
but I forgot to squash.

llvm-svn: 263983
2016-03-21 20:39:24 +00:00
Nicolai Haehnle 213e87f2ee AMDGPU: Add SIWholeQuadMode pass
Summary:
Whole quad mode is already enabled for pixel shaders that compute
derivatives, but it must be suspended for instructions that cause a
shader to have side effects (i.e. stores and atomics).

This pass addresses the issue by storing the real (initial) live mask
in a register, masking EXEC before instructions that require exact
execution and (re-)enabling WQM where required.

This pass is run before register coalescing so that we can use
machine SSA for analysis.

The changes in this patch expose a problem with the second machine
scheduling pass: target independent instructions like COPY implicitly
use EXEC when they operate on VGPRs, but this fact is not encoded in
the MIR. This can lead to miscompilation because instructions are
moved past changes to EXEC.

This patch fixes the problem by adding use-implicit operands to
target independent instructions. Some general codegen passes are
relaxed to work with such implicit use operands.

Reviewers: arsenm, tstellarAMD, mareko

Subscribers: MatzeB, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18162

llvm-svn: 263982
2016-03-21 20:28:33 +00:00
Krzysztof Parzyszek b14f4fd0de [Hexagon] Add handling fixups and instruction relaxation
llvm-svn: 263981
2016-03-21 20:27:17 +00:00
Krzysztof Parzyszek c6f1e1a709 [Hexagon] Properly encode registers in duplex instructions
llvm-svn: 263980
2016-03-21 20:13:33 +00:00
Krzysztof Parzyszek 6514a887f4 [Hexagon] Fix reserving emergency spill slots for register scavenger
- R10 and R11 are not reserved registers.
- Check for reserved registers when finding unused caller-saved registers.

llvm-svn: 263977
2016-03-21 19:57:08 +00:00
Dan Gohman c8d7f14506 [WebAssembly] Implement the eqz instructions.
llvm-svn: 263976
2016-03-21 19:54:41 +00:00
Chad Rosier 2e5c526bb1 [SLP] Remove unnecessary member variables by using container APIs.
This changes the debug output, but still retains its usefulness.
Differential Revision: http://reviews.llvm.org/D18324

llvm-svn: 263975
2016-03-21 19:47:44 +00:00
Colin LeMahieu cdaf644c48 [llvm-objdump] Printing relocations in executable and shared object files. This partially reverts r215844 by removing test objdump-reloc-shared.test which stated GNU objdump doesn't print relocations, it does.
In executable and shared object ELF files, relocations in the file contain the final virtual address rather than section offset so this is adjusted to display section offset.

Differential revision: http://reviews.llvm.org/D15965

llvm-svn: 263971
2016-03-21 19:14:50 +00:00
Tom Stellard 92339e888f AMDGPU/SI: Fix threshold calculation for branching when exec is zero
Summary:
When control flow is implemented using the exec mask, the compiler will
insert branch instructions to skip over the masked section when exec is
zero if the section contains more than a certain number of instructions.

The previous code would only count instructions in successor blocks,
and this patch modifies the code to start counting instructions in all
blocks between the start and end of the branch.

Reviewers: nhaehnle, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18282

llvm-svn: 263969
2016-03-21 18:56:58 +00:00
Chad Rosier cf173ffb46 [AArch64] Add a helpful assert. NFC.
llvm-svn: 263965
2016-03-21 18:04:10 +00:00
Matt Arsenault cb38a6bd35 AMDGPU: Remove SignBitIsZero for mubuf scratch offsets
These instructions do not have the same negative base
address problem that DS instructions do on SI.

llvm-svn: 263964
2016-03-21 18:02:18 +00:00
Peter Collingbourne 86b9fbe980 ARM: Better codegen for 64-bit compares.
This introduces a custom lowering for ISD::SETCCE (introduced in r253572)
that allows us to emit a short code sequence for 64-bit compares.

Before:

	push	{r7, lr}
	cmp	r0, r2
	mov.w	r0, #0
	mov.w	r12, #0
	it	hs
	movhs	r0, #1
	cmp	r1, r3
	it	ge
	movge.w	r12, #1
	it	eq
	moveq	r12, r0
	cmp.w	r12, #0
	bne	.LBB1_2
@ BB#1:                                 @ %bb1
	bl	f
	pop	{r7, pc}
.LBB1_2:                                @ %bb2
	bl	g
	pop	{r7, pc}

After:

	push	{r7, lr}
	subs	r0, r0, r2
	sbcs.w	r0, r1, r3
	bge	.LBB1_2
@ BB#1:                                 @ %bb1
	bl	f
	pop	{r7, pc}
.LBB1_2:                                @ %bb2
	bl	g
	pop	{r7, pc}

Saves around 80KB in Chromium's libchrome.so.

Some notes on this patch:

- I don't much like the ARMISD::BRCOND and ARMISD::CMOV combines I
  introduced (nothing else needs them). However, they are necessary in
  order to avoid poor codegen, and they seem similar to existing combines
  in other backends (e.g. X86 combines (brcond (cmp (setcc Compare))) to
  (brcond Compare)).

- No support for Thumb-1. This is in principle possible, but we'd need
  to implement ARMISD::SUBE for Thumb-1.

Differential Revision: http://reviews.llvm.org/D15256

llvm-svn: 263962
2016-03-21 18:00:02 +00:00
Renato Golin 2b6b7ffd6c [ARM] Add Cortex-A32 support
Adding Cortex-A32 as an available target in the ARM backend.

Patch by Sam Parker.

llvm-svn: 263956
2016-03-21 17:29:01 +00:00
Hemant Kulkarni a11fbe1cb1 [llvm-readobj] Impl GNU style symbols printing
Implements "readelf -sW and readelf -DsW"

Differential Revision: http://reviews.llvm.org/D18224

llvm-svn: 263952
2016-03-21 17:18:23 +00:00
Lang Hames a258b01b12 [Orc] Switch RPC Procedure to take a function type, rather than an arg list.
No functional change, just a little more readable.

llvm-svn: 263951
2016-03-21 16:56:25 +00:00
Matt Arsenault c25a71106c APFloat: Add frexp
llvm-svn: 263950
2016-03-21 16:49:16 +00:00
Matt Arsenault b96b57347a AMDGPU: Add frexp_mant intrinsic
llvm-svn: 263948
2016-03-21 16:11:05 +00:00
Matt Arsenault 155dda9134 Implement constant folding for bitreverse
llvm-svn: 263945
2016-03-21 15:00:35 +00:00
Chad Rosier 4aeab5fbf2 [AArch64] Fix a -Wdocumentation warning. NFC.
llvm-svn: 263942
2016-03-21 13:43:58 +00:00
Silviu Baranga f875e4fd92 [IndVars] Fix PR26974: make sure replaceCongruentIVs doesn't break LCSSA
Summary:
replaceCongruentIVs can break LCSSA when trying to replace IV increments
since it tries to replace all uses of a phi node with another phi node
while both of the phi nodes are not necessarily in the processed loop.
This will cause an assert in IndVars.

To fix this, we add a check to make sure that the replacement maintains
LCSSA.

Reviewers: sanjoy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D18266

llvm-svn: 263941
2016-03-21 12:44:29 +00:00
Silviu Baranga 46030585b3 [DAGCombine] Catch the case where extract_vector_elt can cause an any_ext while processing AND SDNodes
Summary:
extract_vector_elt can cause an implicit any_ext if the types don't
match. When processing the following pattern:

  (and (extract_vector_elt (load ([non_ext|any_ext|zero_ext] V))), c)

DAGCombine was ignoring the possible extend, and sometimes removing
the AND even though it was required to maintain some of the bits
in the result to 0, resulting in a miscompile.

This change fixes the issue by limiting the transformation only to
cases where the extract_vector_elt doesn't perform the implicit
extend.

Reviewers: t.p.northover, jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18247

llvm-svn: 263935
2016-03-21 11:43:46 +00:00
Elena Demikhovsky 39a0020f2d Fixed -mcpu flag
"core-avx" does not exist; I changed to "nehalem"

llvm-svn: 263932
2016-03-21 11:06:20 +00:00
Simon Pilgrim 4af44f3c13 [X86][SSE] Add vector integer division by constant tests
Expanded tests and split into sdiv/srem and udiv/urem cases for 128 and 256 bit vectors.

llvm-svn: 263917
2016-03-20 21:46:58 +00:00
Jingyue Wu 1375560bdb [NVPTX] Adds a new address space inference pass.
Summary:
The old address space inference pass (NVPTXFavorNonGenericAddrSpaces) is unable
to convert the address space of a pointer induction variable. This patch adds a
new pass called NVPTXInferAddressSpaces that overcomes that limitation using a
fixed-point data-flow analysis (see the file header comments for details).

The new pass is experimental and not enabled by default. Users can turn
it on by setting the -nvptx-use-infer-addrspace flag of llc.

Reviewers: jholewinski, tra, jlebar

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D17965

llvm-svn: 263916
2016-03-20 20:59:20 +00:00
Davide Italiano 289a43ed0a [gold] Emit a diagnostic in case we fail to remove a file.
llvm-svn: 263914
2016-03-20 20:12:33 +00:00
Simon Pilgrim fcc4532afa [X86][SSE] Tidyup setTargetShuffleZeroElements to match computeZeroableShuffleElements
Based on feedback for D14261

llvm-svn: 263911
2016-03-20 17:43:07 +00:00
Simon Pilgrim c44472a5bc [X86][SSE] Detect zeroable shuffle elements from different value types
Improve computeZeroableShuffleElements to be able to peek through bitcasts to extract zero/undef values from BUILD_VECTOR nodes of different element sizes to the shuffle mask.

Differential Revision: http://reviews.llvm.org/D14261

llvm-svn: 263906
2016-03-20 15:45:42 +00:00
Igor Breger 3ea8af5108 AVX512BW: Enable v32i1/v64i1 BUILD_VECTOR
Differential Revision: http://reviews.llvm.org/D18211

llvm-svn: 263898
2016-03-20 13:09:43 +00:00
George Rimar 25a63b1bcc [ELF] Update x86_64 relocations to 0.99.8 ABI
Added: R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX
llvm-svn: 263894
2016-03-20 09:45:08 +00:00
Craig Topper ea87eae4ca Suppress a -Wunused-variable warning in release builds.
llvm-svn: 263892
2016-03-20 01:17:54 +00:00
Michael Kuperstein 048cc3b7a8 Use a range-based for loop. NFC.
llvm-svn: 263889
2016-03-20 00:16:13 +00:00
Mehdi Amini 43165d913a Expose IRBuilder::CreateAtomicCmpXchg as LLVMBuildAtomicCmpXchg in the C API.
Summary: Also expose getters and setters in the C API, so that the change can be tested.

Reviewers: nhaehnle, axw, joker.eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18260

From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
llvm-svn: 263886
2016-03-19 21:28:28 +00:00
Mehdi Amini c286b9f0f4 Const-correctness in libLTO
Looks like I was sloppy when bridging to C.
Thanks D. Blaikie for noticing!

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 263885
2016-03-19 21:28:18 +00:00
Saleem Abdulrasool 2854666263 CodeGen: use range based for loop
Convert a loop to use a range based style loop.  NFC.

llvm-svn: 263884
2016-03-19 16:35:32 +00:00
David Majnemer abae6b588b [SimplifyLibCalls] Only consider sinpi/cospi functions within the same function
The sinpi/cospi can be replaced with sincospi to remove unnecessary
computations.  However, we need to make sure that the calls are within
the same function!

This fixes PR26993.

llvm-svn: 263875
2016-03-19 04:53:02 +00:00
David Majnemer cdf2873e36 [InstCombine] Don't insert instructions before a catch switch
CatchSwitches are not splittable, we cannot insert casts, etc. before
them.

This fixes PR26992.

llvm-svn: 263874
2016-03-19 04:39:52 +00:00
Mehdi Amini 50988fba64 Add a dependency from llvm-link to TransformUtils following r263860
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 263873
2016-03-19 03:12:54 +00:00
Davide Italiano 2788a825e7 [gold] Use early return to simplify.
llvm-svn: 263872
2016-03-19 02:34:33 +00:00
Simon Pilgrim ee42b3d97c Removed trailing whitespace
llvm-svn: 263871
2016-03-19 02:05:33 +00:00