2 Commits

Author	SHA1	Message	Date
Bill Schmidt	41e14c4dfa	[PPC64] Add vector pack/unpack support from ISA 2.07 ... This patch adds support for the following new instructions in the Power ISA 2.07: vpksdss vpksdus vpkudus vpkudum vupkhsw vupklsw These instructions are available through the vec_packs, vec_packsu, vec_unpackh, and vec_unpackl built-in interfaces. These are lane-sensitive instructions, so the built-ins have different implementations for big- and little-endian, and the instructions must be marked as killing the vector swap optimization for now. The first three instructions perform saturating pack operations. The fourth performs a modulo pack operation, which means it can be represented with a vector shuffle, and conversely the appropriate vector shuffles may cause this instruction to be generated. The other instructions are only generated via built-in support for now. I noticed during patch preparation that the macro __VSX__ was not previously predefined when the power8-vector or direct-move features are requested. This is an error, and I've corrected that here as well. Appropriate tests have been added. There is a companion patch to llvm for the rest of this support. llvm-svn: 237500	2015-05-16 01:02:25 +00:00
Kit Barton	8553bec911	Add builtins for the 64-bit vector integer arithmetic instructions added in POWER8. ... These are the Clang-related changes for the instructions added to LLVM in http://reviews.llvm.org/D7959. Phabricator review: http://reviews.llvm.org/D8041 llvm-svn: 231931	2015-03-11 15:57:19 +00:00