Commit Graph

182612 Commits

Author SHA1 Message Date
Vlad Tsyrklevich 485b8789de Revert "[X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler."
This reverts r367100, it appears to be causing test failures after
Nico's revert of r367091.

llvm-svn: 367141
2019-07-26 18:14:21 +00:00
Sean Fertile 9df6177d38 [PowerPC][AIX]Add lowering of MCSymbol MachineOperand.
Adds machine operand lowering for MCSymbolSDNodes to the PowerPC
backend. This is needed to produce call instructions in assembly for AIX
because the callee operand is a MCSymbolSDNode. The test is XFAIL'ed for
asserts due to a (valid) assertion in PEI that the AIX ABI isn't supported yet.

Differential Revision: https://reviews.llvm.org/D63738

llvm-svn: 367133
2019-07-26 17:25:27 +00:00
Michael Liao 711556e6a8 [AMDGPU] Fix typo.
llvm-svn: 367131
2019-07-26 17:13:59 +00:00
Sergey Dmitriev cdeaac5dce [llvm-objcopy] Add support for --add-section for COFF
This patch enables support for --add-section=... option for COFF objects.

Differential Revision: https://reviews.llvm.org/D65040

llvm-svn: 367130
2019-07-26 17:06:41 +00:00
Cullen Rhodes 2cde8b5db6 [AArch64][SVE2] Rename bitperm feature to sve2-bitperm
Summary:
The bitperm feature flag is now prefixed with SVE2, as it is for all other SVE2
extensions

Patch by Maciej Gabka.

Reviewers: sdesmalen, rovka, chill, SjoerdMeijer, rengolin

Reviewed By: SjoerdMeijer, rengolin

Differential Revision: https://reviews.llvm.org/D65327

llvm-svn: 367124
2019-07-26 15:57:50 +00:00
Michal Gorny 40a10446c0 [llvm] [lit/tests] Replace 'env -u' with more portable construct
Set environment variables to empty values rather than attempting
to unset them via 'env -u', in order to fix NetBSD test regression
caused by r366980.  POSIX does not guarantee that env(1) supports '-u'
option, and indeed NetBSD env(1) does not support it.

Differential Revision: https://reviews.llvm.org/D65335

llvm-svn: 367123
2019-07-26 15:39:05 +00:00
Michal Gorny ffc722a358 [llvm] [FileCheck] Use FILECHECK_DUMP_INPUT_ON_FAILURE only when non-empty
Enable dumping output only if FILECHECK_DUMP_INPUT_ON_FAILURE is set to
a non-empty value.  This is necessary to support disabling it via
POSIX-compliant env(1) that does not support '-u' argument,
and therefore fix regression caused by r366980.

Differential Revision: https://reviews.llvm.org/D65334

llvm-svn: 367122
2019-07-26 15:38:57 +00:00
Nico Weber 13f337c4cb Revert r367091, it caused PR42777.
llvm-svn: 367118
2019-07-26 14:58:42 +00:00
Sam Parker 3da59e5513 [ARM][ParallelDSP] Combine structs
Combine OpChain and BinOpChain structs as OpChain is a base class to
BinOpChain that is never used.

llvm-svn: 367114
2019-07-26 14:11:40 +00:00
Sean Fertile 9bd22fec0d [PowerPC] Add getCRSaveOffset to improve readability. [NFC]
In preperation for AIX support in FrameLowering: replace a number of literal
'8' that represent the stack offset of the condition register save area with
a member in PPCFrameLowering.

Patch by Chris Bowler.

llvm-svn: 367111
2019-07-26 14:02:17 +00:00
Nico Weber d2a4e57891 gn build: Merge r367043
llvm-svn: 367109
2019-07-26 13:27:19 +00:00
Nico Weber 250ee88ff2 gn build: Merge r366956
llvm-svn: 367108
2019-07-26 13:24:56 +00:00
Petar Avramovic cf21794566 [MIPS GlobalISel] Fix check for void return during lowerCall
Void return used to have unsigned with value 0 for virtual register
but with addition of Register class and changes to arguments to lowerCall
this is no longer valid.
Check for void return by inspecting the Ty field in OrigRet.

Differential Revision: https://reviews.llvm.org/D65321

llvm-svn: 367107
2019-07-26 13:19:37 +00:00
Carl Ritson 0b28357053 [AMDGPU] Move WQM/WWM intrinsic instruction selection to AMDGPUISelDAGToDAG
Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65328

llvm-svn: 367105
2019-07-26 13:11:44 +00:00
Petar Avramovic b1fc6f6130 [MIPS GlobalISel] Select inttoptr and ptrtoint
Select G_INTTOPTR and G_PTRTOINT for MIPS32.

Differential Revision: https://reviews.llvm.org/D65217

llvm-svn: 367104
2019-07-26 13:08:06 +00:00
Sanjay Patel c229cfeb7a [InstCombine] remove flop from lerp patterns
(Y * (1.0 - Z)) + (X * Z) -->
Y - (Y * Z) + (X * Z) -->
Y + Z * (X - Y)

This is part of solving:
https://bugs.llvm.org/show_bug.cgi?id=42716

Factoring eliminates an instruction, so that should be a good canonicalization.
The potential conversion to FMA would be handled by the backend based on target
capabilities.

Differential Revision: https://reviews.llvm.org/D65305

llvm-svn: 367101
2019-07-26 11:19:18 +00:00
Simon Pilgrim d93e8ece7b [X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler.
This removes a GetDemandedBits user and allows us to benefit from the DemandedElts propagated through SimplifyDemandedBits.

llvm-svn: 367100
2019-07-26 11:10:20 +00:00
Sam Parker 7440065bd8 [NFC][ARM][ParallelDSP] Cleanup isNarrowSequence
Remove unused logic.

llvm-svn: 367099
2019-07-26 10:57:42 +00:00
Simon Pilgrim a424a1f351 [SelectionDAG] GetDemandedBits - update SIGN_EXTEND_INREG op to just call SimplifyMultipleUseDemandedBits.
llvm-svn: 367098
2019-07-26 10:03:07 +00:00
Carl Ritson 00e89b428b [AMDGPU] Add llvm.amdgcn.softwqm intrinsic
Add llvm.amdgcn.softwqm intrinsic which behaves like llvm.amdgcn.wqm
only if there is other WQM computation in the shader.

Reviewers: nhaehnle, tpr

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64935

llvm-svn: 367097
2019-07-26 09:54:12 +00:00
Simon Pilgrim 9758407bf1 [TargetLowering] SimplifyMultipleUseDemandedBits - add SIGN_EXTEND_INREG support.
llvm-svn: 367096
2019-07-26 09:41:08 +00:00
Simon Pilgrim cb5f7de448 [ARM][ParallelDSP] Regenerate multi-use-loads.ll test checks
llvm-svn: 367094
2019-07-26 09:32:21 +00:00
Momchil Velikov 898d953693 [AArch64] Define ETE and TRBE system registers
Embedded Trace Extension and Trace Buffer Extension are optional
future architecture extensions.
(cf. https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools)

Their system registers are documented here:
https://developer.arm.com/docs/ddi0601/a

ETE shares register names with ETM. One exception is the ETE
TRCEXTINSELR0 register, which has the same encoding as the ETM
TRCEXTINSELR register (but different semantics). This patch treats
them as aliases: the assembler will accept both names, emitting
identical encoding, and the disassembler will keep disassembling
to TRCEXRINSELR.

Differential Revision: https://reviews.llvm.org/D63707

llvm-svn: 367093
2019-07-26 09:19:08 +00:00
Simon Pilgrim d0164fc525 [SelectionDAG] GetDemandedBits - update OR/XOR ops to just call SimplifyMultipleUseDemandedBits.
Eventually all of these will be moved over, but we create nodes in GetDemandedBits recursion at the moment which causes regressions when we try to remove them all.

llvm-svn: 367092
2019-07-26 09:13:29 +00:00
Simon Pilgrim b32ceb79b0 [TargetLowering] SimplifyMultipleUseDemandedBits - add BITCAST pass through support.
This allows us to peek through BITCASTs and attempt simplify the source operand, and then bitcast back.

llvm-svn: 367091
2019-07-26 08:38:39 +00:00
Sam Parker c760b5da11 [ARM][LowOverheadLoops] Add CPSR defs
Both WhileLoopStart and LoopEnd may get turned into a cmp and br pair,
so add an implicit def to these pseudo instructions in case that WLS
and LE aren't generated.

Differential Revision: https://reviews.llvm.org/D65275

llvm-svn: 367089
2019-07-26 08:15:01 +00:00
Pengfei Wang 9ad565f70e [WinEH] Allocate space in funclets stack to save XMM CSRs
Summary:
This is an alternate approach to D57970.
Currently funclets reuse the same stack slots that are used in the
parent function for saving callee-saved xmm registers. If the parent
function modifies a callee-saved xmm register before an excpetion is
thrown, the catch handler will overwrite the original saved value.

This patch allocates space in funclets stack for saving callee-saved xmm
registers and uses RSP instead RBP to access memory.

Reviewers: andrew.w.kaylor, LuoYuanke, annita.zhang, craig.topper,
RKSimon

Subscribers: rnk, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63396

Signed-off-by: pengfei <pengfei.wang@intel.com>
llvm-svn: 367088
2019-07-26 07:33:15 +00:00
Serguei Katkov 7f8c809592 [Loop Utils] Extend the scope of addStringMetadataToLoop.
To avoid duplicates in loop metadata, if the string to add is
already there, just update the value.

Reviewers: reames, Ashutosh
Reviewed By: reames
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D65265

llvm-svn: 367087
2019-07-26 07:04:34 +00:00
Serguei Katkov 3c3a76527e [Loop Utils] Move utilty addStringMetadataToLoop to LoopUtils.cpp. NFC.
Just move the utility function to LoopUtils.cpp to re-use it in loop peeling.

Reviewers: reames, Ashutosh
Reviewed By: reames
Subscribers: hiraditya, asbirlea, llvm-commits
Differential Revision: https://reviews.llvm.org/D65264

llvm-svn: 367085
2019-07-26 06:10:08 +00:00
Yi Kong 1755abe1fb Fix macOS build after r358716
COPYFILE_CLONE is only defined on newer macOS versions, using it without
check breaks build on systems running legacy OS and toolchain.

Differential Revision: https://reviews.llvm.org/D65317

llvm-svn: 367084
2019-07-26 05:17:14 +00:00
Kang Zhang 4e794a8bae Some case eror for: detected memory leaks
llvm-svn: 367083
2019-07-26 03:25:58 +00:00
Matt Arsenault a9ea8a9aae AMDGPU/GlobalISel: Handle most function return types
handleAssignments gives up pretty easily on structs, and i8 values for
some reason. The other case that doesn't work is when an implicit sret
needs to be inserted if the return size exceeds the number of return
registers.

llvm-svn: 367082
2019-07-26 02:36:05 +00:00
Matt Arsenault 51d795d941 GlobalISel: Fold out unmerge to scalars from concat_vector
Removes illegal intermediate vectors if an operation was lowering to
concat_vectors, and the next operation is scalarized.

llvm-svn: 367081
2019-07-26 02:22:23 +00:00
Kang Zhang 5c61015455 [PowerPC] Do the Simple Early Return in block-placement pass to optimize the blocks
Summary:
In `block-placement` pass, it will create some patterns for unconditional we can do the simple early retrun.
But the `early-ret` pass is before `block-placement`, we don't want to run it again.
This patch is to do the simple early return to optimize the blocks at the last of `block-placement`. 

Below is an example
```
BB:                   | BB:
   XOR 3, 3, 4        |   XOR 3, 3, 4
   B TBB              |   B ChainBB
...                   | ...
ChainBB:              | ChainBB:
   B TBB              |   ADD 3, 3, 4
...                   |   BLR
TBB:                  |
   ADD 3, 3, 4        |
   BLR                |
```

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D63972

llvm-svn: 367080
2019-07-26 01:58:53 +00:00
Francis Visoiu Mistrih 2d8fdcae96 Reland: [Remarks] Add support for serializing metadata for every remark streamer
This allows every serializer format to implement metaSerializer() and
return the corresponding meta serializer.

Original llvm-svn: 366946
Reverted llvm-svn: 367004

This fixes the unit tests on Windows bots.

llvm-svn: 367078
2019-07-26 01:33:30 +00:00
Amara Emerson c07fe307b4 [AArch64][GlobalISel] Simplify zext/sext selection, use MachineIRBuilder. NFC.
llvm-svn: 367075
2019-07-26 00:01:09 +00:00
Sanjay Patel 8f15d40555 [InstCombine] add tests for lerp patterns (PR42716); NFC
llvm-svn: 367069
2019-07-25 22:25:21 +00:00
Francis Visoiu Mistrih 0503add6da [CodeGen] Don't resolve the stack protector frame accesses until PEI
Currently, stack protector loads and stores are resolved during
LocalStackSlotAllocation (if the pass needs to run). When this is the
case, the base register assigned to the frame access is going to be one
of the vregs created during LocalStackSlotAllocation. This means that we
are keeping a pointer to the stack protector slot, and we're using this
pointer to load and store to it.

In case register pressure goes up, we may end up spilling this pointer
to the stack, which can be a security concern.

Instead, leave it to PEI to resolve the frame accesses. In order to do
that, we make all stack protector accesses go through frame index
operands, then PEI will resolve this using an offset from sp/fp/bp.

Differential Revision: https://reviews.llvm.org/D64759

llvm-svn: 367068
2019-07-25 22:23:48 +00:00
Yonghong Song 329abf2939 [BPF] fix typedef issue for offset relocation
Currently, the CO-RE offset relocation does not work
if any struct/union member or array element is a typedef.
For example,
  typedef const int arr_t[7];
  struct input {
      arr_t a;
  };
  func(...) {
       struct input *in = ...;
       ... __builtin_preserve_access_index(&in->a[1]) ...
  }
The BPF backend calculated default offset is 0 while
4 is the correct answer. Similar issues exist for struct/union
typedef's.

When getting struct/union member or array element type,
we should trace down to the type by skipping typedef
and qualifiers const/volatile as this is what clang did
to generate getelementptr instructions.
(const/volatile member type qualifiers are already
ignored by clang.)

This patch fixed this issue, for each access index,
skipping typedef and const/volatile/restrict BTF types.

Signed-off-by: Yonghong Song <yhs@fb.com>

Differential Revision: https://reviews.llvm.org/D65259

llvm-svn: 367062
2019-07-25 21:47:27 +00:00
Alex Lorenz b680422ef8 [FileCollector] add support for recording empty directories
The file collector class is useful for constructing reproducers by
creating a snapshot of the files that are accessed. Sometimes it might
also be important to construct directories that don't necessarily have files,
but are still accessed by some tool that we want to make a reproducer for.
This is useful for instance for modeling the behavior of Clang's header search,
which scans through a number of directories it doesn't actually access when
looking for framework headers. This commit extends the file collector to allow
it to work with paths that are just directories, by constructing them as the
files are copied over.

Differential Revision: https://reviews.llvm.org/D65297

llvm-svn: 367061
2019-07-25 21:47:11 +00:00
Amara Emerson e54dc6b8b5 [AArch64][GlobalISel] Fix G_SELECT legalization fallback after r366943.
Changes the order of legalization of G_ICMP suggested by Petar in D65079.

llvm-svn: 367060
2019-07-25 21:44:52 +00:00
Leonard Chan 007f674c6a Reland the "[NewPM] Port Sancov" patch from rL365838. No functional
changes were made to the patch since then.

--------

[NewPM] Port Sancov

This patch contains a port of SanitizerCoverage to the new pass manager. This one's a bit hefty.

Changes:

- Split SanitizerCoverageModule into 2 SanitizerCoverage for passing over
  functions and ModuleSanitizerCoverage for passing over modules.
- ModuleSanitizerCoverage exists for adding 2 module level calls to initialization
  functions but only if there's a function that was instrumented by sancov.
- Added legacy and new PM wrapper classes that own instances of the 2 new classes.
- Update llvm tests and add clang tests.

llvm-svn: 367053
2019-07-25 20:53:15 +00:00
Florian Hahn c74808b914 [PredicateInfo] Replace pointer comparisons with deterministic compares.
Currently there are a few pointer comparisons in ValueDFS_Compare, which
can cause non-deterministic ordering when materializing values. There
are 2 cases this patch fixes:

1. Order defs before uses used to compare pointers, which guarantees
   defs before uses, but causes non-deterministic ordering between 2
   uses or 2 defs, depending on the allocation order. By converting the
   pointers to booleans, we can circumvent that problem.

2. comparePHIRelated was comparing the basic block pointers of edges,
   which also results in a non-deterministic order and is also not
   really meaningful for ordering. By ordering by their destination DFS
   numbers we guarantee a deterministic order.

For the example below, we can end up with 2 different uselist orderings,
when running `opt -mem2reg -ipsccp` hundreds of times. Because the
non-determinism is caused by allocation ordering, we cannot reproduce it
with ipsccp alone.

    declare i32 @hoge() local_unnamed_addr #0

    define dso_local i32 @ham(i8* %arg, i8* %arg1) #0 {
    bb:
      %tmp = alloca i32
      %tmp2 = alloca i32, align 4
      br label %bb19

    bb4:                                              ; preds = %bb20
      br label %bb6

    bb6:                                              ; preds = %bb4
      %tmp7 = call i32 @hoge()
      store i32 %tmp7, i32* %tmp
      %tmp8 = load i32, i32* %tmp
      %tmp9 = icmp eq i32 %tmp8, 912730082
      %tmp10 = load i32, i32* %tmp
      br i1 %tmp9, label %bb11, label %bb16

    bb11:                                             ; preds = %bb6
      unreachable

    bb13:                                             ; preds = %bb20
      br label %bb14

    bb14:                                             ; preds = %bb13
      %tmp15 = load i32, i32* %tmp
      br label %bb16

    bb16:                                             ; preds = %bb14, %bb6
      %tmp17 = phi i32 [ %tmp10, %bb6 ], [ 0, %bb14 ]
      br label %bb19

    bb18:                                             ; preds = %bb20
      unreachable

    bb19:                                             ; preds = %bb16, %bb
      br label %bb20

    bb20:                                             ; preds = %bb19
      indirectbr i8* null, [label %bb4, label %bb13, label %bb18]
    }

Reviewers: davide, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D64866

llvm-svn: 367049
2019-07-25 20:48:13 +00:00
Roman Lebedev aa205957ff [NFC][DivRemPairs] Tests with rem in expanded form (PR42673)
As discussed in https://bugs.llvm.org/show_bug.cgi?id=42673
there is a TTI hook hasDivRemOp() that matters here.
While -div-rem-pairs will decompose 'rem' if that hook returns false,
nothing does the opposite transform.

We can't to this in InstCombine, because it does not currently
access TTI, and i'm not sure we should change that.

We can't really do that in DAGCombine since it also currently does not
access TTI.

Therefore only DivRemPairs is left.

https://bugs.llvm.org/show_bug.cgi?id=42673

llvm-svn: 367046
2019-07-25 20:26:34 +00:00
Serguei Katkov cde00c02e1 [Loop Peeling] Fix idom detection algorithm.
We'd like to determine the idom of exit block after peeling one iteration.
Let Exit is exit block.
Let ExitingSet - is a set of predecessors of Exit block. They are exiting blocks.
Let Latch' and ExitingSet' are copies after a peeling.
We'd like to find an idom'(Exit) - idom of Exit after peeling.
It is an evident that idom'(Exit) will be the nearest common dominator of ExitingSet and ExitingSet'.
idom(Exit) is a nearest common dominator of ExitingSet.
idom(Exit)' is a nearest common dominator of ExitingSet'.
Taking into account that we have a single Latch, Latch' will dominate Header and idom(Exit).
So the idom'(Exit) is nearest common dominator of idom(Exit)' and Latch'.
All these basic blocks are in the same loop, so what we find is
(nearest common dominator of idom(Exit) and Latch)'.

Reviewers: reames, fhahn
Reviewed By: reames
Subscribers: hiraditya, zzheng, llvm-commits
Differential Revision: https://reviews.llvm.org/D65292

llvm-svn: 367044
2019-07-25 19:31:50 +00:00
Whitney Tsang 8b288c7d11 [DDG] DirectedGraph as a base class for various dependence graphs such
as DDG and PDG.
Summary:
This is an implementation of a directed graph base class with explicit
representation of both nodes and edges. This implementation makes the
edges explicit because we expect to assign various attributes (such as
dependence type, distribution interference weight, etc) to the edges in
the derived classes such as DDG and DIG. The DirectedGraph consists of a
list of DGNode's. Each node consists of a (possibly empty) list of
outgoing edges to other nodes in the graph. A DGEdge contains a
reference to a single target node. Note that nodes do not know about
their incoming edges so the DirectedGraph class provides a function to
find all incoming edges to a given node.

This is the first patch in a series of patches that we are planning to
contribute upstream in order to implement Data Dependence Graph and
Program Dependence Graph.

More information about the proposed design can be found here:
https://ibm.ent.box.com/v/directed-graph-and-ddg
Authored By: bmahjour
Reviewer: Meinersbur, myhsum hfinkel, fhahn, jdoerfert, kbarton
Reviewed By: Meinersbur
Subscribers: mgorny, wuzish, jsji, lebedev.ri, dexonsmith, kristina,
llvm-commits, Whitney, etiotto
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D64088

llvm-svn: 367043
2019-07-25 18:23:22 +00:00
Sanjay Patel b456310902 [SimplifyCFG] avoid crashing after simplifying a switch (PR42737)
Later code in TryToSimplifyUncondBranchFromEmptyBlock() assumes that
we have cleaned up unreachable blocks, but that was not happening
with this switch transform.

llvm-svn: 367037
2019-07-25 17:01:12 +00:00
JF Bastien cbeff368fc Make GCC happy about attribute location
It doesn't like function attributes on definitions, only declarations.

llvm-svn: 367036
2019-07-25 16:58:15 +00:00
JF Bastien 463e9bdfa9 Fix unused function from r367031
llvm-svn: 367035
2019-07-25 16:50:10 +00:00
Roman Lebedev 8b65c4e331 [NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
As discussed in https://bugs.llvm.org/show_bug.cgi?id=42673
there is a TTI hook hasDivRemOp() that matters here.
While -div-rem-pairs will decompose 'rem' if that hook returns false,
nothing does the opposite transform.

We can't to this in InstCombine, because it does not currently
access TTI, and i'm not sure we should change that.

We may be able to teach DivRemPairs to do this, but this really is a
per-target perf optimization, and we seem to do the opposite transform
in backend if hasDivRemOp() returned false: https://godbolt.org/z/ttt4HZ
I think it makes sense to be consistent.

https://bugs.llvm.org/show_bug.cgi?id=42673

llvm-svn: 367034
2019-07-25 16:39:57 +00:00
Whitney Tsang 8ee361ebe5 [LOOPINFO] Introduce the loop guard API.
Summary:
This is the first patch for the loop guard. We introduced
getLoopGuardBranch() and isGuarded().
This currently only works on simplified loop, as it requires a preheader
and a latch to identify the guard.
It will work on loops of the form:
/// GuardBB:
///   br cond1, Preheader, ExitSucc <== GuardBranch
/// Preheader:
///   br Header
/// Header:
///  ...
///   br Latch
/// Latch:
///   br cond2, Header, ExitBlock
/// ExitBlock:
///   br ExitSucc
/// ExitSucc:
Prior discussions leading upto the decision to introduce the loop guard
API: http://lists.llvm.org/pipermail/llvm-dev/2019-May/132607.html
Reviewer: reames, kbarton, hfinkel, jdoerfert, Meinersbur, dmgreen
Reviewed By: reames
Subscribers: wuzish, hiraditya, jsji, llvm-commits, bmahjour, etiotto
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D63885

llvm-svn: 367033
2019-07-25 16:13:18 +00:00
JF Bastien dbc0a5df8d Allow prefetching from non-zero address spaces
Summary:
This is useful for targets which have prefetch instructions for non-default address spaces.

<rdar://problem/42662136>

Subscribers: nemanjai, javed.absar, hiraditya, kbarton, jkorous, dexonsmith, cfe-commits, llvm-commits, RKSimon, hfinkel, t.p.northover, craig.topper, anemet

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65254

llvm-svn: 367032
2019-07-25 16:11:57 +00:00
JF Bastien eb3c1ca896 CrashHandler: be careful about crashing while handling
Summary:
Looking at the current Apple-specific code for crash handling it does a few
silly things that I think we should avoid while handling crashes:

  * Try real hard not to allocate.
  * Set the global crash reporter string early so that any crash while
    generating the stack trace will still report some info.
  * Prevent reordering of operations in the current thread.

<rdar://problem/53503334>

Subscribers: hiraditya, jkorous, dexonsmith, llvm-commits, beanz, Bigcheese, thakis, lattner, jordan_rose

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65235

llvm-svn: 367031
2019-07-25 16:07:41 +00:00
Yonghong Song d8efec97be [BPF] fix CO-RE incorrect index access string
Currently, we expect the CO-RE offset relocation records
a string encoding the original getelementptr access index,
so kernel bpf loader can decode it correctly.

For example,
  struct s { int a; int b; };
  struct t { int c; int d; };
  #define _(x) (__builtin_preserve_access_index(x))
  int get_value(const void *addr1, const void *addr2);
  int test(struct s *arg1, struct t *arg2) {
    return get_value(_(&arg1->b), _(&arg2->d));
  }

We expect two offset relocations:
  reloc 1: type s, access index 0, 1
  reloc 2: type t, access index 0, 1

Two globals are created to retain access indexes for the
above two relocations with global variable names.
The first global has a name "0:1:". Unfortunately,
the second global has the name "0:1:.1" as the llvm
internals automatically add suffix ".1" to a global
with the same name. Later on, the BPF peels the last
character and record "0:1" and "0:1:." in the
relocation table.

This is not desirable. BPF backend could use the global
variable suffix knowledge to generate correct access str.
This patch rather took an approach not relying on
that knowledge. It generates "s:0:1:" and "t:0:1:" to
avoid global variable suffixes and later on generate
correct index access string "0:1" for both records.

Signed-off-by: Yonghong Song <yhs@fb.com>

Differential Revision: https://reviews.llvm.org/D65258

llvm-svn: 367030
2019-07-25 16:01:26 +00:00
Vlad Tsyrklevich 5d5a58317c Revert "[InstCombine] try to narrow a truncated load"
This reverts commit bc4a63fd3c, this is a
speculative revert to fix a number of sanitizer bots (like
sanitizer-x86_64-linux-bootstrap-ubsan) that have started to see stage2
compiler crashes, presumably due to a miscompile.

llvm-svn: 367029
2019-07-25 15:37:57 +00:00
Florian Hahn c0d0e3bda8 [PredicateInfo] Use SmallVector instead of SmallPtrSet.
We do not need the SmallPtrSet to avoid adding duplicates to
OpsToRename, because we already keep a ValueInfo mapping. If we see an
op for the first time, Infos will be empty and we can also add it to
OpsToRename.

We process operands by visiting BBs depth-first and then iterate over
all instructions & users, so the order should be deterministic.
Therefore we can skip one round of sorting, which we purely needed for
guaranteeing a deterministic order when iterating over the SmallPtrSet.

Reviewers: efriedma, davide

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D64816

llvm-svn: 367028
2019-07-25 15:35:10 +00:00
Michael Liao 53f967f2bd [AMDGPU] Run `unreachable-mbb-elimination` after isel to clean up PHIs.
Summary:
- As LCSSA is turned on just before isel, it may create PHI of the flow,
  which is consumed by pseudo structurized CFG instructions. When that
  PHIs are eliminated in O0, COPY may be placed wrongly as the these
  pseudo structurized CFG instructions are considering prologue of MBB.
- Run extra `unreachable-mbb-elimination` at the end of isel to clean up
  PHIs.

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64353

llvm-svn: 367023
2019-07-25 14:50:18 +00:00
Momchil Velikov a655f476b0 [AArch64][SVE] Allow explicit size specifier for predicate operand
... for the vector forms of `{SQ,UQ,}{INC,DEC}P` instructions. Also continue
supporting the exsting behaviour of not requiring an explicit size
specifier. The preferred disasembly is *with* the specifier.

This is implemented by redefining intruction forms to require vector predicates
with explicit size and adding aliases, which allow a predicate with no size.

Differential Revision: https://reviews.llvm.org/D65145

llvm-svn: 367019
2019-07-25 13:56:04 +00:00
Matt Arsenault a85af76c72 AMDGPU: Don't assert on v4f16 arguments to shader calling conventions
llvm-svn: 367018
2019-07-25 13:55:07 +00:00
Roman Lebedev 9f88fef51a [IR][PatternMatch] Introduce m_NegatedPower2() matcher
Summary:
It is a good idea to do as much matching inside of `match()` as possible.
If some checking is done afterwards, and we don't fold because of it,
chances are we may have missed some commutative pattern.

Reviewers: spatel, craig.topper, RKSimon

Reviewed By: spatel, RKSimon

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64038

llvm-svn: 367017
2019-07-25 13:34:24 +00:00
Roman Lebedev 6df3fc5433 [IR][PatternMatch] introduce m_Unless() matcher
Summary:
I don't think it already exists? I don't see it at least.
It is important to have it because else we'll do some checks after `match()`,
and that may result in missed folds in commutative nodes.

Reviewers: spatel, craig.topper, RKSimon, majnemer

Reviewed By: spatel

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64037

llvm-svn: 367016
2019-07-25 13:34:14 +00:00
Sanjay Patel 38a0200868 [Utils] remove duplicated documentation comments; NFC
http://llvm.org/docs/CodingStandards.html#doxygen-use-in-documentation-comments

llvm-svn: 367015
2019-07-25 13:11:21 +00:00
Simon Pilgrim 447fe31964 [X86] concatSubVectors - remove unnecessary args. NFCI.
All these args can be cheaply recomputed and it makes it much easier to use the function as a quick helper.

llvm-svn: 367014
2019-07-25 13:05:46 +00:00
Sanjay Patel bc4a63fd3c [InstCombine] try to narrow a truncated load
trunc (load X) --> load (bitcast X to narrow type)

We have this transform in DAGCombiner::ReduceLoadWidth(), but the truncated
load pattern can interfere with other instcombine transforms, so I'd like to
allow the fold sooner.

Example:
https://bugs.llvm.org/show_bug.cgi?id=16739
...in that report, we have bitcasts bracketing these ops, so those could get
eliminated too.

We've generally ruled out widening of loads early in IR ( LoadCombine -
http://lists.llvm.org/pipermail/llvm-dev/2016-September/105291.html ), but
that reasoning may not apply to narrowing if we can preserve information
such as the dereferenceable range.

Differential Revision: https://reviews.llvm.org/D64432

llvm-svn: 367011
2019-07-25 12:14:27 +00:00
Pablo Barrio 275954539d [ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1
Summary:
Add support for Cortex-A65, Cortex-A65AE, Neoverse E1 and Neoverse N1.
Neoverse E1 and Cortex-A65(&AE) only implement the AArch64 state of the
Arm architecture. Neoverse N1 implements both AArch32 and AArch64.

Cortex-A65:
https://developer.arm.com/ip-products/processors/cortex-a/cortex-a65

Cortex-A65AE:
https://developer.arm.com/ip-products/processors/cortex-a/cortex-a65ae

Neoverse E1:
https://developer.arm.com/ip-products/processors/neoverse/neoverse-e1

Neoverse N1:
https://developer.arm.com/ip-products/processors/neoverse/neoverse-n1

Patch by Diogo Sampaio and Pablo Barrio

Reviewers: samparker, LukeCheeseman, sbaranga, ostannard

Reviewed By: ostannard

Subscribers: ostannard, javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64406

llvm-svn: 367007
2019-07-25 10:59:45 +00:00
Simon Pilgrim 55fd57ba95 Revert rL366946 : [Remarks] Add support for serializing metadata for every remark streamer
This allows every serializer format to implement metaSerializer() and
return the corresponding meta serializer.
........
Fix windows build bots
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-win-fast
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win

llvm-svn: 367004
2019-07-25 10:20:39 +00:00
George Rimar 148022920e Recommit "rL366894: [yaml2obj] - Allow custom fields for the SHT_UNDEF sections."
With fix: do not use `stat` tool.

Original commit message:

This is a follow-up refactoring patch for recently
introduced functionality which which reduces the code duplication
and also makes possible to redefine all possible fields of
the first SHT_NULL section (previously it was only possible to set
sh_link and sh_size).

Differential revision: https://reviews.llvm.org/D65140

llvm-svn: 367003
2019-07-25 10:19:23 +00:00
Fangrui Song 058858851c [MC] Delete unused MCInstPrinter::markup overload and getPrintHexStyle
llvm-svn: 367000
2019-07-25 09:54:12 +00:00
Florian Hahn 5354c83ece [IPSCCP] Add assertion to surface cases where we zap returns with overdefined users.
We should only zap returns in functions, where all live users have a
replace-able value (are not overdefined). Unused return values should be
undefined.

This should make it easier to detect bugs like in PR42738.

Alternatively we could bail out of zapping the function returns, but I
think it would be better to address those divergences between function
and call-site values where they are actually caused.

Reviewers: davide, efriedma

Reviewed By: davide, efriedma

Differential Revision: https://reviews.llvm.org/D65222

llvm-svn: 366998
2019-07-25 09:37:09 +00:00
Kai Luo 985e52a4c1 [PowerPC][NFC] Make `getDefMIPostRA` public
llvm-svn: 366995
2019-07-25 08:36:44 +00:00
Sjoerd Meijer 5c606cef79 [LV] Scalar Epilogue Lowering. NFC.
This refactors boolean 'OptForSize' that was passed around in a lot of places.
It controlled folding of the tail loop, the scalar epilogue, into the main loop
but code-size reasons may not be the only reason to do this. Thus, this is a
first step to generalise the concept of tail-loop folding, and hence OptForSize
has been renamed and is using an enum ScalarEpilogueStatus that holds the
status how the epilogue should be lowered.

This will be followed up by D65197, that picks up the predicate loop hint and
performs the tail-loop folding.

Differential Revision: https://reviews.llvm.org/D64916

llvm-svn: 366993
2019-07-25 08:06:02 +00:00
Kai Luo 5c8af53806 [PowerPC][NFC] Added `getDefMIPostRA` method
Summary:
In PostRA phase, we often have to find out the most recent definition
of a register.  This patch adds getDefMIPostRA so that other methods
can use it rather than implementing it repeatedly.

Differential Revision: https://reviews.llvm.org/D65131

llvm-svn: 366990
2019-07-25 07:47:52 +00:00
Sjoerd Meijer a48f58c97f [Clang] New loop pragma vectorize_predicate
This adds a new vectorize predication loop hint:

  #pragma clang loop vectorize_predicate(enable)

that can be used to indicate to the vectoriser that all (load/store)
instructions should be predicated (masked). This allows, for example, folding
of the remainder loop into the main loop.

This patch will be followed up with D64916 and D65197. The former is a
refactoring in the loopvectorizer and the groundwork to make tail loop folding
a more general concept, and in the latter the actual tail loop folding
transformation will be implemented.

Differential Revision: https://reviews.llvm.org/D64744

llvm-svn: 366989
2019-07-25 07:33:13 +00:00
Seiya Nuta 21277e3ec2 [MC] Add MCInstrAnalysis::evaluateMemoryOperandAddress
Summary:
Add a new method which tries to compute the target address referenced by an operand.

This patch supports x86_64 RIP-relative addressing for now.

It is necessary to print referenced symbol names in llvm-objdump.

Reviewers: andreadb, MaskRay, grosbach, jgalenson, craig.topper

Reviewed By: MaskRay, craig.topper

Subscribers: bcain, rupprecht, jhenderson, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63847

llvm-svn: 366987
2019-07-25 06:57:09 +00:00
George Burgess IV cd16fadb9c [BasicAA] Temporarily disable two tests
These tests are breaking three independent upstream buildbots (as well
downstream ones). These breakages have appeared mysteriously,
consistently, and during different revisions. Sadly, none of
{ASAN,TSAN,MSAN,UBSAN} flag anything, so the cause here is nonobvious.

Until we've figured this out, it seems best to disable these tests
entirely, so that the affected bots don't remain silent about any other,
unrelated failures.

Please see PR42719 for more information.

llvm-svn: 366986
2019-07-25 06:53:59 +00:00
Seiya Nuta d5177643f0 [llvm-objdump][NFC] Make the PrettyPrinter::printInst() output buffered
Summary:
Every time PrettyPrinter::printInst is called, stdout is flushed and it makes llvm-objdump slow. This patches adds a string
buffer to prevent stdout from being flushed.

Benchmark results (./llvm-objdump-master: without this patch,  ./bin/llvm-objcopy: with this patch):

  $ hyperfine --warmup 10 './llvm-objdump-master -d ./bin/llvm-objcopy' './bin/llvm-objdump -d ./bin/llvm-objcopy'
  Benchmark #1: ./llvm-objdump-master -d ./bin/llvm-objcopy
    Time (mean ± σ):      2.230 s ±  0.050 s    [User: 1.533 s, System: 0.682 s]
    Range (min … max):    2.115 s …  2.278 s    10 runs

  Benchmark #2: ./bin/llvm-objdump -d ./bin/llvm-objcopy
    Time (mean ± σ):     386.4 ms ±  13.0 ms    [User: 376.6 ms, System: 6.1 ms]
    Range (min … max):   366.1 ms … 407.0 ms    10 runs

  Summary
    './bin/llvm-objdump -d ./bin/llvm-objcopy' ran
      5.77 ± 0.23 times faster than './llvm-objdump-master -d ./bin/llvm-objcopy'

Reviewers: alexshap, Bigcheese, jhenderson, rupprecht, grimar, MaskRay

Reviewed By: jhenderson, MaskRay

Subscribers: dexonsmith, jhenderson, javed.absar, kristof.beyls, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64969

llvm-svn: 366984
2019-07-25 06:38:27 +00:00
Joel E. Denny 272a9db115 [lit] Protect full test suite from FILECHECK_OPTS
lit's test suite calls lit multiple times for various sample test
suites.  `FILECHECK_OPTS` is safe for FileCheck calls in lit's test
suite.  It's not safe for FileCheck calls in the sample test suites,
whose output affects the results of lit's test suite.

Without this patch, only one such sample test suite is protected from
`FILECHECK_OPTS`, and I admit I haven't discovered other cases for
which I can produce false failures using `FILECHECK_OPTS`.  However,
it's hard to predict the future, especially false passes.  Thus, this
patch protects all existing and future sample test suites from
`FILECHECK_OPTS` (and the deprecated
`FILECHECK_DUMP_INPUT_ON_FAILURE`).

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D65156

llvm-svn: 366980
2019-07-25 03:14:32 +00:00
Tom Stellard f181dd99cf github-upload-release.py: Fix script name in examples
llvm-svn: 366978
2019-07-25 01:49:49 +00:00
Tom Stellard 925ccdbfd7 Add github-release.py script
Summary:
This script can be used for uploading relases sources and binaries
to github.

Reviewers: hans

Reviewed By: hans

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64841

llvm-svn: 366977
2019-07-25 01:43:36 +00:00
Chen Zheng a2d74d3d90 [PowerPC] exclude more icmps in LSR which is converted in later hardware loop pass
Differential Revision: https://reviews.llvm.org/D64795

llvm-svn: 366976
2019-07-25 01:22:08 +00:00
Jonas Devlieghere 3e4e0478bb [FileCollector] Update unit test to match coding style.
I changed the FileCollector coding style but didn't update the
corresponding unit test.

llvm-svn: 366973
2019-07-25 00:46:58 +00:00
Shoaib Meenai 5aee1c6b10 [llvm-lipo] Implement alignment function in -create
Summary:
Removes hard coded valuse for alignment in -create.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D64871

llvm-svn: 366970
2019-07-25 00:29:19 +00:00
Shoaib Meenai a67f6f1746 [Object] Add public MaxSectionAlignment to MachOUniversal
Change MAXSECTALIGN to a public MaxSectionAlignment in MachOUniversal.
Will be used in a follow-up.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D65117

llvm-svn: 366969
2019-07-25 00:29:13 +00:00
Shoaib Meenai 7418b10b16 [llvm-lipo] Add test for -verify_archs
Add test to verify clean failure, exit code 1 for valid architecture not
present in the universal binary.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D65251

llvm-svn: 366968
2019-07-25 00:29:07 +00:00
Jonas Devlieghere eb1b4c5d4c [FileCollector] Change coding style from LLDB to LLVM (NFC)
This patch changes the coding style of the FileCollector from the LLDB
to the LLVM coding style. Alex recently lifted it into LLVM and I
volunteered to do the conversion.

llvm-svn: 366966
2019-07-25 00:17:39 +00:00
Francis Visoiu Mistrih ab56cf8914 [Remarks][NFC] Rename remarks::Parser to remarks::RemarkParser
llvm-svn: 366965
2019-07-25 00:16:56 +00:00
Philip Reames 85fd8cea0b [docs] Split out a section on LoopInfo in the new loop documentation
llvm-svn: 366964
2019-07-24 23:46:13 +00:00
Eli Friedman 82e109279d [ARM] Remove dead code from ARMConstantIslands.
tLDRHi is not a pc-relative load; it can't directly refer to a
constant pool or jump table.

llvm-svn: 366963
2019-07-24 23:36:14 +00:00
Evandro Menezes 5cd5f9b65d [InstCombine] Swap order of checks to improve compile time (NFC)
llvm-svn: 366962
2019-07-24 23:31:04 +00:00
Philip Reames 904494944b Apply a few more reviewer suggestions from D65164
llvm-svn: 366961
2019-07-24 23:30:56 +00:00
Philip Reames 58b4787a22 Define some basic terminology around loops in our documentation
I've noticed a lot of confusion around this area recently with key terms being misused in a number of threads. To help reign that in, let's go ahead and document the current terminology and meaning thereof.

My hope is to grow this over time into a broader discussion of canonical loop forms - yes, there are more than one ... many more than one - but for the moment, simply having the key terminology is a good stopping place.

Note: I am landing this *without* an LGTM.  All feedback so far has been positive, and trying to apply all of the suggested changes/extensions would cause the review to never end.  Instead, I decided to land it with the obvious fixes made based on reviewer comments, then iterate from there.

Differential Revision: https://reviews.llvm.org/D65164

llvm-svn: 366960
2019-07-24 23:24:13 +00:00
Jessica Paquette 728b18f29f [AArch64][GlobalISel] Select immediate modes for ADD when selecting G_GEP
Before, we weren't able to select things like this for G_GEP:

add	x0, x8, #8

And instead we'd materialize the 8.

This teaches GISel to do that. It gives some considerable code size savings
on 252.eon-- about 4%!

Differential Revision: https://reviews.llvm.org/D65248

llvm-svn: 366959
2019-07-24 23:11:01 +00:00
Alex Lorenz 75c64a66c1 Fix unittest build issue in r366956
I marked the fields as private, but they're needed by the unittest.
I'll have to fix that up separarely in a follow-up.

llvm-svn: 366958
2019-07-24 23:10:35 +00:00
Amara Emerson de81bd0faa [AArch64][GlobalISel] Don't try to use GISel if subtarget doesn't have neon or fp.
Throughout the legalizerinfo we currently make the assumption that the target
has neon and FP target features available. Fixing it will require a refactor of
the whole thing, so until then make sure we fall back.

Works around PR42734

Differential Revision: https://reviews.llvm.org/D65244

llvm-svn: 366957
2019-07-24 23:00:04 +00:00
Alex Lorenz 86814bf658 [Support] move FileCollector from LLDB to llvm/Support
The file collector class is useful for creating reproducers,
not just for LLDB, but for other tools as well in LLVM/Clang.

Differential Revision: https://reviews.llvm.org/D65237

llvm-svn: 366956
2019-07-24 22:59:20 +00:00
Roman Lebedev 017e272c3a [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
Summary:
This was originally reported in D62818.
https://rise4fun.com/Alive/oPH

InstCombine does the opposite fold, in hope that `C l>>/<< Y` expression
will be hoisted out of a loop if `Y` is invariant and `X` is not.
But as it is seen from the diffs here, if it didn't get hoisted,
the produced assembly is almost universally worse.

Much like with my recent "hoist add/sub by/from const" patches,
we should get almost universal win if we hoist constant,
there is almost always an "and/test by imm" instruction,
but "shift of imm" not so much, so we may avoid having to
materialize the immediate, and thus need one less register.
And since we now shift not by constant, but by something else,
the live-range of that something else may reduce.

Special care needs to be applied not to disturb x86 `BT` / hexagon `tstbit`
instruction pattern. And to not get into endless combine loop.

Reviewers: RKSimon, efriedma, t.p.northover, craig.topper, spatel, arsenm

Reviewed By: spatel

Subscribers: hiraditya, MaskRay, wuzish, xbolva00, nikic, nemanjai, jvesely, wdng, nhaehnle, javed.absar, tpr, kristof.beyls, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62871

llvm-svn: 366955
2019-07-24 22:57:22 +00:00
Jessica Paquette 68499112cf [AArch64][GlobalISel] Fold G_MUL into XRO load addressing mode when possible
If we have a G_MUL, and either the LHS or the RHS of that mul is the legal
shift value for a load addressing mode, we can fold it into the load.

This gives some code size savings on some SPEC tests. The best are around 2%
on 300.twolf and 3% on 254.gap.

Differential Revision: https://reviews.llvm.org/D65173

llvm-svn: 366954
2019-07-24 22:49:42 +00:00
Peter Collingbourne 72391ab4f1 IR: Teach GlobalIndirectSymbol::getBaseObject() to handle more kinds of expressions.
For aliases, any expression that lowers at the MC level to global_object or
global_object+constant is valid at the object file level. getBaseObject()
should return a result if the aliasee ends up being of that form even if
the IR used to produce it is somewhat unconventional.

Note that this is different from what stripInBoundsOffsets() and that family
of functions is doing. Those functions are concerned about semantic properties
of IR, whereas here we only care about the lowering result.

Therefore reimplement getBaseObject() in a way that matches the lowering
result. This fixes a crash when producing a summary for aliases such as
that in the included test case.

Differential Revision: https://reviews.llvm.org/D65115

llvm-svn: 366952
2019-07-24 22:23:05 +00:00
Amara Emerson 13af1ed8e3 [GlobalISel] Support for inlining memcpy, memset and memmove calls.
This introduces a new family of combiner helper routines that re-use the
target specific cost model from SelectionDAG, and generate inline implementations
of the memcpy family of intrinsics.

The combines are only enabled at optimization levels higher than -O0, and give
very substantial performance improvements.

Differential Revision: https://reviews.llvm.org/D65167

llvm-svn: 366951
2019-07-24 22:17:31 +00:00
Sanjay Patel 86e9f9dc26 [Transforms] move copying of load metadata to helper function; NFC
There's another proposed load combine that can make use of this code
in D64432.

llvm-svn: 366949
2019-07-24 22:11:11 +00:00
Evandro Menezes 5202b55ca6 [CodeGen] Add missing comment (NFC)
Add similar comments on the load limits pertaining to `memcmp()` similar to
those for other string functions.

llvm-svn: 366947
2019-07-24 21:45:14 +00:00
Francis Visoiu Mistrih 62388e3846 [Remarks] Add support for serializing metadata for every remark streamer
This allows every serializer format to implement metaSerializer() and
return the corresponding meta serializer.

llvm-svn: 366946
2019-07-24 21:29:44 +00:00
Craig Topper e9abc8177a [InstCombine] Teach foldOrOfICmps to allow icmp eq MIN_INT/MAX to be part of a range comparision. Similar for foldAndOfICmps
We can treat icmp eq X, MIN_UINT as icmp ule X, MIN_UINT and allow
it to merge with icmp ugt X, C. Similar for the other constants.

We can do simliar for icmp ne X, (U)INT_MIN/MAX in foldAndOfICmps. And we already handled UINT_MIN there.

Fixes PR42691.

Differential Revision: https://reviews.llvm.org/D65017

llvm-svn: 366945
2019-07-24 20:57:29 +00:00
Amara Emerson a1997ce2e5 [AArch64][GlobalISel] Fix a crash during s128 G_ICMP legalization due to r366317.
r366317 added a legalization for s128 G_ICMP narrow scalar which tried to hard
code the result type of the new legalized G_SELECT. Change this to instead use
type of the original G_ICMP result and allow the target to legalize it if necessary
later.

llvm-svn: 366943
2019-07-24 20:46:42 +00:00
David Bolvansky d2904ccf88 Let CorrelatedValuePropagation preserve LazyValueInfo
Summary:
This patch makes CorrelatedValuePropagation preserve LazyValueInfo by adding LazyValueInfo::eraseValue & calling it whenever an instruction is erased.

Passes `make check` , test-suite, and SPECrate 2017.

Patch by aqjune (Juneyoung Lee)

Reviewers: reames, mzolotukhin

Reviewed By: reames

Subscribers: xbolva00, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59349

llvm-svn: 366942
2019-07-24 20:27:32 +00:00
Francis Visoiu Mistrih ff4b515a77 [Remarks][NFC] Rename remarks::Serializer to remarks::RemarkSerializer
llvm-svn: 366939
2019-07-24 19:47:57 +00:00
Stanislav Mekhanoshin c43784ff26 [AMDGPU] Increase kernel padding
To support prefetch mode 3 we need to pad current
cacheline and fill 3 cachelines after. Current padding
is only sufficient for mode 2.

Differential Revision: https://reviews.llvm.org/D65236

llvm-svn: 366938
2019-07-24 19:40:13 +00:00
JF Bastien 65217a4fa9 Revert "[yaml2obj] - Allow custom fields for the SHT_UNDEF sections."
It fails on macOS with the following error:
  https://reviews.llvm.org/D65140#1599522

llvm-svn: 366937
2019-07-24 18:29:33 +00:00
Simon Pilgrim 2bf871be4c Fix signed/unsigned comparison warning. NFCI.
llvm-svn: 366935
2019-07-24 17:44:22 +00:00
David Green cd7a6fa314 [ARM] Rewrite how VCMP are lowered, using a single node
This removes the VCEQ/VCNE/VCGE/VCEQZ/etc nodes, just using two called VCMP and
VCMPZ with an extra operand as the condition code. I believe this will make
some combines simpler, allowing us to just look at these codes and not the
operands. It also helps fill in a missing VCGTUZ MVE selection without adding
extra nodes for it.

Differential Revision: https://reviews.llvm.org/D65072

llvm-svn: 366934
2019-07-24 17:36:47 +00:00
Simon Pilgrim 7d318b2bb1 [DAGCombine] matchBinOpReduction - add partial reduction matching
This patch adds support for recognizing cases where a larger vector type is being used to reduce just the elements in the lower subvector:

e.g. <8 x i32> reduction pattern in a <16 x i32> vector:

<4,5,6,7,u,u,u,u,u,u,u,u,u,u,u,u>
<2,3,u,u,u,u,u,u,u,u,u,u,u,u,u,u>
<1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u>

matchBinOpReduction returns the lower extracted subvector in such cases, assuming isExtractSubvectorCheap accepts the extraction.

I've only enabled it for X86 reduction sums so far. I intend to enable it for the bitop/minmax cases in future patches, and eventually I think its worth turning it on all the time. This is mainly just a case of ensuring calls to matchBinOpReduction don't make assumptions on the vector width based on the original vector extraction.

Fixes the x86 partial reduction sum cases in PR33758 and PR42023.

Differential Revision: https://reviews.llvm.org/D65047

llvm-svn: 366933
2019-07-24 17:29:56 +00:00
David Green 047a0b6575 [ARM] Disable MVE fptosi and friends
The prevents us from trying to convert an i1 predicate vector to a float, or
vice-versa. Better patterns are possible, which will follow in a subsequent
commit. For now we just expand them.

Differential Revision: https://reviews.llvm.org/D65066

llvm-svn: 366931
2019-07-24 17:26:26 +00:00
Jessica Paquette c19c30776a [AArch64][GlobalISel] Make vector dup optimization look at last elt of ZeroVec
Fix an off-by-one error which made us not look at the last element of the
zero vector. This caused a miscompile in 188.ammp.

Differential Revision: https://reviews.llvm.org/D65168

llvm-svn: 366930
2019-07-24 17:18:51 +00:00
David Green b342bddbe2 [ARM] More MVE compare vector splat combines for ANDs
Adds some extra r register compare combines, this time for ANDs.

Differential Revision: https://reviews.llvm.org/D65062

llvm-svn: 366928
2019-07-24 17:08:09 +00:00
Nico Weber f548398674 gn build: Merge r366919
llvm-svn: 366927
2019-07-24 17:04:44 +00:00
David Bolvansky db913d9618 [InstCombine] Adjusted pow-exp tests for Windows [NFC]
Summary: https://bugs.llvm.org/show_bug.cgi?id=42740

Reviewers: efriedma, hans

Reviewed By: hans

Subscribers: spatel, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65220

llvm-svn: 366925
2019-07-24 17:01:20 +00:00
David Green 93b5f61295 [ARM] MVE compare vector splat combine
MVE VCMP instructions can use a general purpose register as the second operand.
This adds the combines for it, selecting from a compare of a vdup.

Differential Revision: https://reviews.llvm.org/D65061

llvm-svn: 366924
2019-07-24 16:58:41 +00:00
Yuanfang Chen fac3900c51 [llvm-objdump] Emit warning if --start-address/--stop-address specify range outside file's address range.
NB: the warning is about the input file itself regardless of the options used
such as `-r`, `-s` etc..

https://bugs.llvm.org/show_bug.cgi?id=41911

Reviewers: jhenderson, grimar, MaskRay, rupprecht

Reviewed by: MaskRay, jhenderson

Differential Revision: https://reviews.llvm.org/D64779

llvm-svn: 366923
2019-07-24 16:55:30 +00:00
Simon Pilgrim 3f01c7197f [SelectionDAG] makeEquivalentMemoryOrdering - early out for equal chains (PR42727)
If we are already using the same chain for the old/new memory ops then just return.

Fixes PR42727 which had getLoad() reusing an existing node.

llvm-svn: 366922
2019-07-24 16:53:14 +00:00
Dmitry Preobrazhensky 5e1dd02c90 [AMDGPU][MC][GFX10] Enabled GFX10 assembly with arbitrary wavesize assumed by the code
Reviewers: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D65216

llvm-svn: 366921
2019-07-24 16:50:17 +00:00
David Green bab4d8ac5a [ARM] Better OR's for MVE compares
This adds a DeMorgan combine for OR's of compares to turn them into AND's,
helping prevent them from going into and out of gpr registers. It also fills in
the VCLE and VCLT nodes that MVE can select, allowing it to invert more
compares.

Differential Revision: https://reviews.llvm.org/D65059

llvm-svn: 366920
2019-07-24 16:42:09 +00:00
Francis Visoiu Mistrih c5cc9efa07 [Remarks] Simplify the creation of remark serializers
Introduce two new functions to create a serializer, and add support for
more combinations to the YAMLStrTabSerializer.

llvm-svn: 366919
2019-07-24 16:36:35 +00:00
Stanislav Mekhanoshin 5cdacea297 [AMDGPU] Add all vgpr classes to asm parser
Differential Revision: https://reviews.llvm.org/D65158

llvm-svn: 366917
2019-07-24 16:21:18 +00:00
Matt Arsenault 0b7f226311 AMDGPU: Fix test after r366913
llvm-svn: 366916
2019-07-24 16:05:55 +00:00
Matt Arsenault 0e7d8698b5 AMDGPU/GlobalISel: Don't assume instruction can be erased when selecting exts
The G_ANYEXT handling can end up reaching selectCOPY, which mutates
the instruction in place.

llvm-svn: 366915
2019-07-24 16:05:53 +00:00
Sanjay Patel 10dad95a75 [SDAG] convert (sub x, 1) to (add x, -1) in ctpop expansion; NFC
We canonicalize to the add form, so create that directly for efficiency.

llvm-svn: 366914
2019-07-24 15:43:50 +00:00
Matt Arsenault 0bf5f7082c AMDGPU: Only allow FP types for format buffer intrinics
The code already somewhat assumes this is the case anyway.

llvm-svn: 366913
2019-07-24 15:37:51 +00:00
David Tenty b9179ff857 [AIX][lit] Don't depend on psutil on AIX
Summary:
On AIX psutil can run into problems with permissions to read the process
tree, which causes problems for python timeout tests which need to kill off
a test and it's children.

This patch adds a workaround by invoking shell via subprocess and using a
platform specific option to ps to list all the descendant processes so we can
kill them. We add some checks so lit can tell whether timeout tests are
supported with out exposing whether we are utilizing the psutil
implementation or the alternative.

Reviewers: hubert.reinterpretcast, andusy, davide, delcypher

Reviewed By: delcypher

Subscribers: davide, delcypher, christof, lldb-commits, libcxx-commits, llvm-commits

Tags: #lldb, #libc, #llvm

Differential Revision: https://reviews.llvm.org/D64251

llvm-svn: 366912
2019-07-24 15:04:27 +00:00
Anton Afanasyev 4fdcabf259 [Support] Fix `-ftime-trace-granularity` option
Summary:
Move `-ftime-trace-granularity` option to frontend options. Without patch
this option is showed up in the help for any tool that links libSupport.

Reviewers: sammccall

Subscribers: hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65202

llvm-svn: 366911
2019-07-24 14:55:40 +00:00
David Green 69fba7434e [ARM] Better AND's for MVE compares
Add a number of folds to convert and(vcmp, vcmp) into a single VPT block, where
the second vcmp becomes predicated on the first.

The VCMP; VPST; VCMP will eventually be converted to VPT; VCMP in the
VPTBlockPass.

Differential Revision: https://reviews.llvm.org/D65058

llvm-svn: 366910
2019-07-24 14:42:05 +00:00
David Green 4fc78c496e [ARM] MVE floating point compares and selects
Much like integers, this adds MVE floating point compares and select. It
requires a lot more buildvector/shuffle code because we may need to expand the
compares without mve.fp, and requires support for and/or because of the way we
lower llvm condition codes.

Some original code by David Sherwood

Differential Revision: https://reviews.llvm.org/D65054

llvm-svn: 366909
2019-07-24 14:28:22 +00:00
Owen Reynolds 18c2671352 [llvm-ar][test] Fix move operation tests
This fixes two tests that did not remove existing archives
before testing due to mistyped archive names.

llvm-svn: 366908
2019-07-24 14:26:18 +00:00
David Green a4a4698c16 [ARM] Basic And/Or/Xor handling for MVE predicates
This adds some basic, "worst case" handling for MVE predicate Or/And/Xor. It
does this by going into and out of GPRs, doing the operation on scalars.

Code by David Sherwood.

Differential Revision: https://reviews.llvm.org/D65053

llvm-svn: 366907
2019-07-24 14:17:54 +00:00
Paul Robinson c7046c91cd Silence a conversion warning after r366887. NFC
llvm-svn: 366906
2019-07-24 14:15:02 +00:00
Simi Pallipurath 724888af45 [ARM] Make sure that the constant pool does not keep in the middle of an IT block.
This change make sure that llvm does not emit an invalid IT block
by putting the constant pool in the middle of an IT block.

We have code to try to avoid putting a constant island in the middle of an
IT block, but it only works if we see an IT between the one currently
referencing CPE and possible insertion point. If the first instruction
we look at is the VLDRD after the IT , we never see the IT and does not
realize that the instruction doing the load could be in an IT block itself.

Differential Revision: https://reviews.llvm.org/D64621

Change-Id: I24cecb37cded75e8992870bd997f6226853bd920
llvm-svn: 366905
2019-07-24 13:54:14 +00:00
Sjoerd Meijer a19f5a76e6 Test commit. NFC.
Removed 2 trailing whitespaces in 2 files that used to be in different
repos to test my new github monorepo workflow.

llvm-svn: 366904
2019-07-24 13:30:36 +00:00
Jay Foad 565c54320e [InstSimplify] Rename SimplifyFPUnOp and SimplifyFPBinOp
Summary:
SimplifyFPBinOp is a variant of SimplifyBinOp that lets you specify
fast math flags, but the name is misleading because both functions
can simplify both FP and non-FP ops. Instead, overload SimplifyBinOp
so that you can optionally specify fast math flags.

Likewise for SimplifyFPUnOp.

Reviewers: spatel

Reviewed By: spatel

Subscribers: xbolva00, cameron.mcinally, eraman, hiraditya, haicheng, zzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64902

llvm-svn: 366902
2019-07-24 12:50:10 +00:00
Sanjay Patel 3624074426 [InstCombine] add tests for load narrowing; NFC
Baseline results for D64432.

llvm-svn: 366901
2019-07-24 12:44:21 +00:00
Thomas Preud'homme 168a6dc947 [FileCheck] Use ASSERT for fatal unit tests
Summary:
A number of EXPECT statements in FileCheck's unit tests are dependent
from results of other values being tested. This commit changes those
earlier test to use ASSERT instead of EXPECT to avoid cascade errors
when they are all related to the same issue.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64921

> llvm-svn: 366862

llvm-svn: 366899
2019-07-24 12:38:34 +00:00
Thomas Preud'homme a83dfd92be [FileCheck]] Canonicalize caret location testing
Summary:
Testing of caret location in diagnostic message is currently made with
CHECK directive with the following general format:
CHECK: {{^         \^$}}

James Henderson suggested the following would be more readable:
CHECK: {{^}}         ^{{$}}

and when whole lines can be matched (as is the case for command-line
testing where error messages do not include path):
CHECK:         ^
using the option --match-full-lines.

This commit implements these 2 changes on all existing caret position
tests. It also aligns the caret to the character it is trying to match
in the above line.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64923

> llvm-svn: 366861

llvm-svn: 366898
2019-07-24 12:38:29 +00:00
Thomas Preud'homme 4cd9b853b5 FileCheck [8/12]: Define numeric var from expr
Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch lift the restriction for a
numeric expression to either be a variable definition or a numeric
expression to try to match.

This commit allows a numeric variable to be set to the result of the
evaluation of a numeric expression after it has been matched
successfully. When it happens, the variable is allowed to be used on
the same line since its value is known at match time.

It also makes use of this possibility to reuse the parsing code to
parse a command-line definition by crafting a mirror string of the
-D option with the equal sign replaced by a colon sign, e.g. for option
'-D#NUMVAL=10' it creates the string
'-D#NUMVAL=10 (parsed as [[#NUMVAL:10]])' where the numeric expression
is parsed to define NUMVAL. This result in a few tests needing updating
for the location diagnostics on top of the tests for the new feature.

It also enables empty numeric expression which match any number without
defining a variable. This is done here rather than in commit #5 of the
patch series because it requires to dissociate automatic regex insertion
in RegExStr from variable definition which would make commit #5 even
bigger than it already is.

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, tra, rnk, kristina, hfinkel, rogfer01, JonChesterfield

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60388

> llvm-svn: 366860

llvm-svn: 366897
2019-07-24 12:38:22 +00:00
George Rimar 7d79b552e3 [llvm-objdump] - Import the test/Object/X86/no-start-symbol.test test case and rewrite it to use YAML.
This patch removes test/Object/X86/no-start-symbol.test (rewrites
it to use YAML and moves it to llvm-objdump tests folder).

(This test was initially introduced in rL239039, but now there
is no reason to keep the precompiled binary it seems).

DIfferential revision: https://reviews.llvm.org/D65136

llvm-svn: 366896
2019-07-24 12:24:43 +00:00
George Rimar cb487e9b44 [Object/llvm-readobj] - Cleanup testing of the dynamic objects.
This patch touches a few test cases:

It removes dtflags.elf-x86-64 binary and elf-dtflags.test.
elf-dtflags.test is excessive because we have the
elf-dynamic-tags.test which test all non-machine specific tags.

It removes testing of --dynamic-table from test\Object\readobj-shared-object.test
(we have the elf-dynamic-tags.test for that), and simplifies this test case.

It moves testing of the headers from readobj-shared-object.test
to elf-file-headers.test.

Adds test/tools/llvm-readobj/elf-file-types.test and test/tools/llvm-readobj/elf-loadname.test.

It opens road for removing the readobj-shared-object.test completely soon.

Differential revision: https://reviews.llvm.org/D65068

llvm-svn: 366895
2019-07-24 12:20:42 +00:00
George Rimar 242da4e83e [yaml2obj] - Allow custom fields for the SHT_UNDEF sections.
This is a follow-up refactoring patch for recently
introduced functionality which which reduces the code duplication
and also makes possible to redefine all possible fields of
the first SHT_NULL section (previously it was only possible to set
sh_link and sh_size).

Differential revision: https://reviews.llvm.org/D65140

llvm-svn: 366894
2019-07-24 12:16:22 +00:00
David Green c7e55d4f52 [ARM] MVE predicate register support
This adds support code for building and shuffling i1 predicate registers. It
generally uses two basic principles, either converting the predicate into an
scalar (through a PREDICATE_CAST) and doing scalar operations on it there, or
by converting the register to an full vector register and back.

Some of the code here is a not super efficient but will hopefully cover most
cases of moving i1 vectors around and can be improved in subsequent patches.

Some code by David Sherwood.

Differential Revision: https://reviews.llvm.org/D65052

llvm-svn: 366890
2019-07-24 11:51:36 +00:00
Igor Kudrin 3daefb0744 [DWARF][NFC] Add constants for reserved values of an initial length field.
Differential Revision: https://reviews.llvm.org/D65039

llvm-svn: 366887
2019-07-24 11:34:29 +00:00
George Rimar ec10d5c6c1 Recommit rr366796 "[Object/ELF.h] - Improve testing of the fields in ELFFile<ELFT>::sections()."
With a fix of the issue found by UBSan.

Original commit message:

This eliminates a one error untested and
also introduces a error for one more possible case
which lead to crash previously.

Differential revision: https://reviews.llvm.org/D64987

llvm-svn: 366886
2019-07-24 11:24:37 +00:00
David Green b9d96ceca0 [ARM] MVE integer compares and selects
This adds the very basics for MVE vector predication, adding integer VCMP and
VSEL instruction support. This is done through predicate registers (MVT::v16i1,
MVT::v8i1, MVT::v4i1), but otherwise using same mechanics as NEON to custom
lower setcc's through ARMISD::VCXX nodes (VCEQ, VCGT, VCEQZ, etc).

An extra VCNE was added, as this can be handled sensibly by MVE's expanded
number of VCMP condition codes. (There are also VCLE and VCLT which are added
later).

VPSEL is also added here, simply selecting on the vselect.

Original code by David Sherwood.

Differential Revision: https://reviews.llvm.org/D65051

llvm-svn: 366885
2019-07-24 11:08:14 +00:00
Sam Parker aeb21b96a0 [ARM][ParallelDSP] Fix pointer operand reordering
While combining two loads into a single load, we often need to
reorder the pointer operands for the new load. This reordering was
broken in the cases where there was a chain of values that built up
the pointer.

Differential Revision: https://reviews.llvm.org/D65193

llvm-svn: 366881
2019-07-24 09:38:39 +00:00
Haojian Wu 509ad30d85 [Remark] Suppress the "-Wreturn-type" compiler warning, NFC
llvm-svn: 366874
2019-07-24 07:55:01 +00:00
Thomas Preud'homme 5ecb880241 Revert "FileCheck [8/12]: Define numeric var from expr"
This reverts commit 1b05977538.

llvm-svn: 366872
2019-07-24 07:32:34 +00:00
Thomas Preud'homme 75299de191 Revert "[FileCheck]] Canonicalize caret location testing"
This reverts commit ba4e8d7913.

llvm-svn: 366871
2019-07-24 07:32:18 +00:00
Thomas Preud'homme 00c8dab219 Revert "[FileCheck] Use ASSERT for fatal unit tests"
This reverts commit fb596735fe.

llvm-svn: 366870
2019-07-24 07:32:11 +00:00
Roger Ferrer Ibanez 09e6304440 [RISCV] Implement benchmark::cycleclock::Now
This is a cherrypick of D64237 onto llvm/utils/benchmark and
libcxx/utils/google-benchmark.

Differential Revision: https://reviews.llvm.org/D65142

llvm-svn: 366868
2019-07-24 05:33:46 +00:00
Chen Zheng 8b7e82be12 [PowerPC][NFC] use opcode instead of MachineInstr for instrHasImmForm().
llvm-svn: 366867
2019-07-24 04:50:23 +00:00
Fangrui Song 305ace7cc8 [AArch64] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after r366857
llvm-svn: 366866
2019-07-24 01:59:44 +00:00
Petr Hosek 8b161bacf4 [SafeStack] Insert the deref before remaining elements
This is a follow up to D64971. While we need to insert the deref after
the offset, it needs to come before the remaining elements in the
original expression since the deref needs to happen before the LLVM
fragment if present.

Differential Revision: https://reviews.llvm.org/D65172

llvm-svn: 366865
2019-07-24 00:16:23 +00:00
Francis Visoiu Mistrih 4287c95b08 [Remarks] String tables should be move-only
Copying them is expensive. This allows the tables to be moved around at
lower cost, and allows a remarks::StringTable to be constructed from
a remarks::ParsedStringTable.

llvm-svn: 366864
2019-07-23 22:50:08 +00:00
Thomas Preud'homme fb596735fe [FileCheck] Use ASSERT for fatal unit tests
Summary:
A number of EXPECT statements in FileCheck's unit tests are dependent
from results of other values being tested. This commit changes those
earlier test to use ASSERT instead of EXPECT to avoid cascade errors
when they are all related to the same issue.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64921

llvm-svn: 366862
2019-07-23 22:41:51 +00:00
Thomas Preud'homme ba4e8d7913 [FileCheck]] Canonicalize caret location testing
Summary:
Testing of caret location in diagnostic message is currently made with
CHECK directive with the following general format:
CHECK: {{^         \^$}}

James Henderson suggested the following would be more readable:
CHECK: {{^}}         ^{{$}}

and when whole lines can be matched (as is the case for command-line
testing where error messages do not include path):
CHECK:         ^
using the option --match-full-lines.

This commit implements these 2 changes on all existing caret position
tests. It also aligns the caret to the character it is trying to match
in the above line.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64923

llvm-svn: 366861
2019-07-23 22:41:46 +00:00
Thomas Preud'homme 1b05977538 FileCheck [8/12]: Define numeric var from expr
Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch lift the restriction for a
numeric expression to either be a variable definition or a numeric
expression to try to match.

This commit allows a numeric variable to be set to the result of the
evaluation of a numeric expression after it has been matched
successfully. When it happens, the variable is allowed to be used on
the same line since its value is known at match time.

It also makes use of this possibility to reuse the parsing code to
parse a command-line definition by crafting a mirror string of the
-D option with the equal sign replaced by a colon sign, e.g. for option
'-D#NUMVAL=10' it creates the string
'-D#NUMVAL=10 (parsed as [[#NUMVAL:10]])' where the numeric expression
is parsed to define NUMVAL. This result in a few tests needing updating
for the location diagnostics on top of the tests for the new feature.

It also enables empty numeric expression which match any number without
defining a variable. This is done here rather than in commit #5 of the
patch series because it requires to dissociate automatic regex insertion
in RegExStr from variable definition which would make commit #5 even
bigger than it already is.

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, tra, rnk, kristina, hfinkel, rogfer01, JonChesterfield

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60388

llvm-svn: 366860
2019-07-23 22:41:38 +00:00
Jonas Devlieghere f8552e67e9 [DWARF] Use 32-bit format specifier for offset
This should fix PR42730.

llvm-svn: 366859
2019-07-23 22:34:21 +00:00
Amara Emerson 511f7f5785 [AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
We need to be able to load and store s128 for memcpy inlining, where we want to
generate Q register mem ops. Making these legal also requires that we add some
support in other instructions. Regbankselect should also know about these since
they have no GPR register class that can hold them, so need special handling to
live on the FPR bank.

Differential Revision: https://reviews.llvm.org/D65166

llvm-svn: 366857
2019-07-23 22:05:13 +00:00
Simon Pilgrim 78b1e777f5 Fix "control reaches end of non-void function" warning. NFCI.
llvm-svn: 366856
2019-07-23 21:59:48 +00:00
Eli Friedman c69273fa10 [docs] Clarify where the indirect UB due to write-write races comes from
This is based on https://bugs.llvm.org/show_bug.cgi?id=42435#c3.

Patch by Ralf Jung.

llvm-svn: 366855
2019-07-23 21:51:26 +00:00
Jessica Paquette a2fae1e3e9 [GlobalISel][AArch64] Save a copy on G_SELECT by fixing condition to GPR
The condition can never be fed by FPRs, so it should always be on a GPR.

Differential Revision: https://reviews.llvm.org/D65157

llvm-svn: 366854
2019-07-23 21:39:50 +00:00
Eli Friedman b27fc95e89 [ARM] Add opt-bisect support to ARMParallelDSP.
llvm-svn: 366851
2019-07-23 20:48:46 +00:00
Francis Visoiu Mistrih c5b5cc4575 [Remarks] Introduce a new format: yaml-strtab
This exposes better support to use a string table with a format through
an actual new remark::Format, called yaml-strtab.

This can now be used with -fsave-optimization-record=yaml-strtab.

llvm-svn: 366849
2019-07-23 20:42:46 +00:00
Francis Visoiu Mistrih cbbdc41838 [Remarks][NFC] Move the YAML serializer to its own header
llvm-svn: 366842
2019-07-23 19:28:03 +00:00
Yi-Hong Lyu 41a010a4ef [PowerPC] Remove redundant load immediate instructions
Currently PowerPC backend emits code like this:

  r3 = li 0
  std r3, 264(r1)
  r3 = li 0
  std r3, 272(r1)

This patch fixes that and other cases where a register already contains a value that is loaded so we will get:

  r3 = li 0
  std r3, 264(r1)
  std r3, 272(r1)

Differential Revision: https://reviews.llvm.org/D64220

llvm-svn: 366840
2019-07-23 19:11:07 +00:00
Nico Weber 62ac91f369 gn build: Merge r366832
llvm-svn: 366837
2019-07-23 19:02:47 +00:00
Craig Topper 76bc3d6e07 [X86] In lowerVectorShuffle, instead of creating a new node to canonicalize the shuffle mask by commuting, just commute the mask and swap V1/V2.
LegalizeDAG tries to legal the DAG by legalizing nodes before
their operands.

If we create a new node, we end up legalizing it after its operands.
This prevents some of the optimizations that can be done when the
operand is a build_vector since the build_vector will have been
legalized to something else.

Differential Revision: https://reviews.llvm.org/D65132

llvm-svn: 366835
2019-07-23 18:46:15 +00:00
Francis Visoiu Mistrih 78c92d2ec3 [Remarks] Add unit tests for YAML serialization
Add tests for both the string table and non string table case.

llvm-svn: 366832
2019-07-23 18:09:12 +00:00
Philip Reames ea5c94b497 [IndVars] Fix a subtle bug in optimizeLoopExits
The original code failed to account for the fact that one exit can have a pointer exit count without all of them having pointer exit counts.  This could cause two separate bugs:
1) We might exit the loop early, and leave optimizations undone.  This is what triggered the assertion failure in the reported test case.
2) We might optimize one exit, then exit without indicating a change.  This could result in an analysis invalidaton bug if no other transform is done by the rest of indvars.

Note that the pointer exit counts are a really fragile concept.  They show up only when we have a pointer IV w/o a datalayout to provide their size.  It's really questionable to me whether the complexity implied is worth it.

llvm-svn: 366829
2019-07-23 17:45:11 +00:00
Ryan Taylor 6f13637a3e [IR][Verifier] Allow IntToPtrInst to be !dereferenceable
Summary:
Allow IntToPtrInst to carry !dereferenceable metadata tag.
This is valid since !dereferenceable can be only be applied to
pointer type values.

Change-Id: If8a6e3c616f073d51eaff52ab74535c29ed497b4

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64954

llvm-svn: 366826
2019-07-23 17:19:56 +00:00
Sam Elliott 404551ac64 [RISCV][NFC] Correct RUN in rvi-pseudos-invalid.s
This test should test both riscv32 and riscv64.

llvm-svn: 366825
2019-07-23 17:14:42 +00:00
Rainer Orth 2b7f3a2b33 [CMake] Add -z defs on Solaris
Like other ELF targets, shared objects should be linked with -z defs on Solaris.

Tested on x86_64-pc-solaris2.11 and sparcv9-sun-solaris2.11.

Differential Revision: https://reviews.llvm.org/D64484

llvm-svn: 366821
2019-07-23 16:27:34 +00:00
Jessica Paquette 2b404d01e8 [GlobalISel][AArch64] Teach GISel to handle shifts in load addressing modes
When we select the XRO variants of loads, we can pull in very specific shifts
(of the size of an element). E.g.

```
ldr x1, [x2, x3, lsl #3]
```

This teaches GISel to handle these when they're coming from shifts
specifically.

This adds a new addressing mode function, `selectAddrModeShiftedExtendXReg`
which recognizes this pattern.

This also packs this up with `selectAddrModeRegisterOffset` into
`selectAddrModeXRO`. This is intended to be equivalent to `selectAddrModeXRO`
in AArch64ISelDAGtoDAG.

Also update load-addressing-modes to show that all of the cases here work.

Differential Revision: https://reviews.llvm.org/D65119

llvm-svn: 366819
2019-07-23 16:09:42 +00:00
Simon Pilgrim 0e8359aec1 [TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
If all the demanded elts are from one operand and are inline, then we can use the operand directly.

The changes are mainly from SSE41 targets which has blendvpd but not cmpgtq, allowing the v2i64 comparison to be simplified as we only need the signbit from alternate v4i32 elements.

llvm-svn: 366817
2019-07-23 15:35:55 +00:00
Vlad Tsyrklevich aa4f8d04a9 Revert "[Object/ELF.h] - Improve testing of the fields in ELFFile<ELFT>::sections()."
This reverts commit r366796 because it was causing ubsan buildbot
failures.

llvm-svn: 366815
2019-07-23 15:02:13 +00:00
Owen Reynolds 24f3e102a6 [llvm-ar] Fix support for archives with members larger than 4GB
llvm-ar outputs a strange error message when handling archives with
members larger than 4GB due to not checking file size when passing the
value as an unsigned 32 bit integer. This overflow issue caused
malformed archives to be created.:

https://bugs.llvm.org/show_bug.cgi?id=38058

This change allows for members above 4GB and will error in a case that
is over the formats size limit, a 10 digit decimal integer.

Differential Revision: https://reviews.llvm.org/D65093

llvm-svn: 366813
2019-07-23 14:44:21 +00:00
Sam Parker 57e87dd81b [ARM][LowOverheadLoops] Fix branch target codegen
While lowering test.set.loop.iterations, it wasn't checked how the
brcond was using the result and so the wls could branch to the loop
preheader instead of not entering it. The same was true for
loop.decrement.reg.
    
So brcond and br_cc and now lowered manually when using the hwloop
intrinsics. During this we now check whether the result has been
negated and whether we're using SETEQ or SETNE and 0 or 1. We can
then figure out which basic block the WLS and LE should be targeting.

Differential Revision: https://reviews.llvm.org/D64616

llvm-svn: 366809
2019-07-23 14:08:46 +00:00
Simon Pilgrim c60c12fb10 Fix MSVC warning about extending a uint32_t shift result to uint64_t. NFCI.
llvm-svn: 366808
2019-07-23 14:04:54 +00:00
Simon Pilgrim 5d4bb8628c [SLPVectorizer] Revert local change that got accidently got committed in rL366799
This wasn't part of D63281

llvm-svn: 366807
2019-07-23 13:42:01 +00:00
Sam Elliott 46ffaeb00c Revert [RISCV] Re-enable rv32i-aliases-invalid.s test
This reverts r366797 (git commit 53f9fec8e8)

llvm-svn: 366806
2019-07-23 13:30:56 +00:00
Roman Lebedev 402bf28ecc [NFC][InstCombine] Fixup commutative/negative tests with icmp preds in @llvm.umul.with.overflow tests
llvm-svn: 366802
2019-07-23 12:42:57 +00:00
Roman Lebedev 4153f17181 [InstSimplify][NFC] Tests for skipping 'div-by-0' checks before inverted @llvm.umul.with.overflow
It would be already handled by the non-inverted case if we were hoisting
the `not` in InstCombine, but we don't (granted, we don't sink it
in this case either), so this is a separate case.

llvm-svn: 366801
2019-07-23 12:42:49 +00:00
Roman Lebedev 87fdcb8749 [NFC][PhaseOredering][SimplifyCFG] Add more runlines to umul.with.overflow tests
This way it will be more obvious that the problem is both
in cost threshold and in hardcoded benefit check,
plus will show how the instsimplify cleans this all in the end.

llvm-svn: 366800
2019-07-23 12:42:41 +00:00
Simon Pilgrim 743d45ee25 [TargetLowering] Add SimplifyMultipleUseDemandedBits
This patch introduces the DAG version of SimplifyMultipleUseDemandedBits, which attempts to peek through ops (mainly and/or/xor so far) that don't contribute to the demandedbits/elts of a node - which means we can do this even in cases where we have multiple uses of an op, which normally requires us to demanded all bits/elts. The intention is to remove a similar instruction - SelectionDAG::GetDemandedBits - once SimplifyMultipleUseDemandedBits has matured.

The InstCombine version of SimplifyMultipleUseDemandedBits can constant fold which I haven't added here yet, and so far I've only wired this up to some basic binops (and/or/xor/add/sub/mul) to demonstrate its use.

We do see a couple of regressions that need to be addressed:

    AMDGPU unsigned dot product codegen retains an AND mask (for ZERO_EXTEND) that it previously removed (but otherwise the dotproduct codegen is a lot better).
	
    X86/AVX2 has poor handling of vector ANY_EXTEND/ANY_EXTEND_VECTOR_INREG - it prematurely gets converted to ZERO_EXTEND_VECTOR_INREG.

The code owners have confirmed its ok for these cases to fixed up in future patches.

Differential Revision: https://reviews.llvm.org/D63281

llvm-svn: 366799
2019-07-23 12:39:08 +00:00
Sam Elliott 53f9fec8e8 [RISCV] Re-enable rv32i-aliases-invalid.s test
We were getting test failures on some builders, which pointed to @LINE
being an undefined variable. I think that these failures should have
been fixed by https://reviews.llvm.org/rL366434, so I'm re-enabling the
test.

llvm-svn: 366797
2019-07-23 11:40:55 +00:00
George Rimar fccffa871c [Object/ELF.h] - Improve testing of the fields in ELFFile<ELFT>::sections().
This eliminates a one error untested and
also introduces a error for one more possible case
which lead to crash previously.

Differential revision: https://reviews.llvm.org/D64987

llvm-svn: 366796
2019-07-23 11:37:14 +00:00
George Rimar 1957d68957 [yaml2obj] - Add a support for defining null sections in YAMLs.
ELF spec shows (Figure 4-10: Section Header Table Entry:Index 0,
http://www.sco.com/developers/gabi/latest/ch4.sheader.html)
that section header at index 0 (null section) can have sh_size and
sh_link fields set to non-zero values.

It says (https://docs.oracle.com/cd/E19683-01/817-3677/6mj8mbtc9/index.html):

"If the number of sections is greater than or equal to SHN_LORESERVE (0xff00),
this member has the value zero and the actual number of section header table
entries is contained in the sh_size field of the section header at index 0.
Otherwise, the sh_size member of the initial entry contains 0."

and:

"If the section name string table section index is greater than or equal to SHN_LORESERVE
(0xff00), this member has the value SHN_XINDEX (0xffff) and the actual index of the section
name string table section is contained in the sh_link field of the section header at index 0.
Otherwise, the sh_link member of the initial entry contains 0."

At this moment it is not possible to create custom section headers at index 0 using yaml2obj.

This patch implements this.

Differential revision: https://reviews.llvm.org/D64913

llvm-svn: 366794
2019-07-23 11:03:37 +00:00
Simon Pilgrim 87adcf8c47 [SLPVectorizer] Remove null-pointer test. NFCI.
cast<CallInst> shouldn't return null and we dereference the pointer in a lot of other places, causing both MSVC + cppcheck to warn about dereferenced null pointers

llvm-svn: 366793
2019-07-23 10:51:43 +00:00
David Green fdedf240f8 [ARM] Rename NEONModImm to VMOVModImm. NFC
Rename NEONModImm to VMOVModImm as it is used in both NEON and MVE.

llvm-svn: 366790
2019-07-23 09:19:24 +00:00
Hideto Ueno 9f5d80d79c [Attributor][NFC] Re-run clang-format on the Attributor.cpp
llvm-svn: 366789
2019-07-23 08:29:22 +00:00
Hideto Ueno 19c07afe17 [Attributor] Deduce "dereferenceable" attribute
Summary:
Deduce dereferenceable attribute in Attributor.

These will be added in a later patch.
* dereferenceable(_or_null)_globally (D61652)
* Deduction based on load instruction (similar to D64258)

Reviewers: jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64876

llvm-svn: 366788
2019-07-23 08:16:17 +00:00
Eugene Leviant c7e6d14c6c [llvm-objcopy] Allow strip symtab in executables and DSOs
Re-commit of the patch after addressing -Wl,--emit-relocs case.
Differential revision: https://reviews.llvm.org/D61672

llvm-svn: 366787
2019-07-23 08:03:30 +00:00
Yi Kong 78b5e9bc25 Fix gold-plugin Windows build
r365588 missed one instance of integer file descriptor use in
gold-plugin.cpp.

llvm-svn: 366786
2019-07-23 07:41:17 +00:00
George Rimar ab658f42a7 [yaml2elf] - Treat the SHN_UNDEF section as kind of regular section.
We have a logic that adds a few sections implicitly.
Though the SHT_NULL section with section number 0
is an exception.

In D64913 I want to teach yaml2obj to redefine the null section.
And in this patch I add it to the sections list,
to make it kind of a regular section.

Differential revision: https://reviews.llvm.org/D65087

llvm-svn: 366785
2019-07-23 07:38:44 +00:00
Hideto Ueno 2d654df763 [AMDGPU][NFC] Simplify test file for amdgcn intrinsics
Summary: Remove unchecked attribute in the call site and use FileCheck String Substitution for `convergent` check.

Reviewers: nhaehnle

Reviewed By: nhaehnle

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64901

llvm-svn: 366781
2019-07-23 06:48:47 +00:00
Craig Topper a658cb0b12 [DAGCombiner] Make ShrinkLoadReplaceStoreWithStore return an SDValue instead of an SDNode*. NFCI
The function was calling getNode() on an SDValue to return and the
caller turned the result back into a SDValue. So just return the
original SDValue to avoid this.

llvm-svn: 366779
2019-07-23 05:13:39 +00:00
Craig Topper f5247244f2 [DAGCombiner] Use SDNode::isOperandOf to simplify some code. NFCI
llvm-svn: 366778
2019-07-23 05:13:35 +00:00
Robert Widmann fcf3c55a8c [LLVM-C] Improve Bindings to The Internalize Pass
Summary: Adds a binding to the internalize pass that allows the caller to pass a function pointer that acts as the visibility-preservation predicate.  Previously, one could only pass an unsigned value (not LLVMBool?) that directed the pass to consider "main" or not.

Reviewers: whitequark, deadalnix, harlanhaskins

Reviewed By: whitequark, harlanhaskins

Subscribers: kren1, hiraditya, llvm-commits, harlanhaskins

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62456

llvm-svn: 366777
2019-07-23 04:56:44 +00:00
Zi Xuan Wu 57d17ec2e1 [PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store
Replace float load/store pair with integer load/store pair when it's only used in load/store,
because float load/store instructions cost more cycles then integer load/store.

A typical scenario is when there is a call with more than 13 float arguments passing, we need pass them by stack.
So we need a load/store pair to do such memory operation if the variable is global variable.

Differential Revision: https://reviews.llvm.org/D64195

llvm-svn: 366775
2019-07-23 03:34:40 +00:00
Richard Trieu 3a52c3857f Inline function call into assert to fix unused variable warning.
llvm-svn: 366774
2019-07-23 03:10:06 +00:00
Richard Trieu 81a5045cd6 Move variable out from debug only section.
MFI is no longer just needed for an assert.  Move it out of the debug only
section to allow non-assert builds to be able to find it.

llvm-svn: 366773
2019-07-23 02:59:15 +00:00
Shoaib Meenai 99ccc3c9f1 [llvm-lipo] Implement -info
Prints architecture type of all input files.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D64668

llvm-svn: 366772
2019-07-23 00:42:03 +00:00
Stefan Stipanovic 6058b86373 Fixing build error from commit 95cbc3d
[Attributor] Liveness analysis.

Liveness analysis abstract attribute used to indicate which BasicBlocks are dead and can therefore be ignored.
Right now we are only looking at noreturn calls.

Reviewers: jdoerfert, uenoku

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D64162

llvm-svn: 366769
2019-07-22 23:58:23 +00:00
Philip Reames 2f5543aa72 [Statepoints] Fix a bug in statepoint lowering for functions w/no-realign-stack
We were silently using the ABI alignment for all of the stores generated for deopt and gc values.  We'd gotten the alignment of the stack slot itself properly reduced (via MachineFrameInfo's clamping), but having the MMO on the store incorrect was enough for us to generate an aligned store to a unaligned location.

The simplest fix would have been to just pass the alignment to the helper function, but once we do that, the helper function doesn't really help.  So, inline it and directly call the MMO version of DAG.getStore with a properly constructed MMO.

Note that there's a separate performance possibility here.  Even if we *can* realign stacks, we probably don't *want to* if all of the stores are in slowpaths.  But that's a later patch, if at all.  :)

llvm-svn: 366765
2019-07-22 23:33:18 +00:00
Peter Collingbourne ddccb494ee Fix pointer width in test from r366754.
llvm-svn: 366764
2019-07-22 23:32:41 +00:00
Nico Weber bd519c3a0b gn build: Wrap two comments to 80 columns
llvm-svn: 366763
2019-07-22 23:23:38 +00:00
Jonas Devlieghere 0e7ba06e82 [DWARF] Add more error handling to debug line parser.
This patch exnteds the error handling in the debug line parser to get
rid of the existing MD5 assertion. I want to reuse the debug line parser
from LLVM in LLDB where we cannot crash on invalid input.

Differential revision: https://reviews.llvm.org/D64544

llvm-svn: 366762
2019-07-22 23:23:34 +00:00
Philip Reames 67713e2687 [Statepoints] Add a test which shows a miscompile with no-realign-stacks
llvm-svn: 366760
2019-07-22 23:08:56 +00:00
Stefan Stipanovic 5a9ba27c71 Revert "Fixing build error from commit 9285295."
This reverts commit 95cbc3da88.

llvm-svn: 366759
2019-07-22 22:55:05 +00:00
David Blaikie 9ec6f9e07e llvm-objcopy/test: add REQUIRES: shell for use of umask
(follow-up to r365162)

llvm-svn: 366755
2019-07-22 22:23:52 +00:00
Peter Collingbourne 710605c085 Analysis: Don't look through aliases when simplifying GEPs.
It is not safe in general to replace an alias in a GEP with its aliasee
if the alias can be replaced with another definition (i.e. via strong/weak
resolution (linkonce_odr) or via symbol interposition (default visibility
in ELF)) while the aliasee cannot. An example of how this can go wrong is
in the included test case.

I was concerned that this might be a load-bearing misoptimization (it's
possible for us to use aliases to share vtables between base and derived
classes, and on Windows, vtable symbols will always be aliases in RTTI
mode, so this change could theoretically inhibit trivial devirtualization
in some cases), so I built Chromium for Linux and Windows with and without
this change. The file sizes of the resulting binaries were identical, so it
doesn't look like this is going to be a problem.

Differential Revision: https://reviews.llvm.org/D65118

llvm-svn: 366754
2019-07-22 22:13:46 +00:00
Stefan Stipanovic 95cbc3da88 Fixing build error from commit 9285295.
[Attributor] Liveness analysis.

Liveness analysis abstract attribute used to indicate which BasicBlocks are dead and can therefore be ignored.
Right now we are only looking at noreturn calls.

Reviewers: jdoerfert, uenoku

Subscribers: hiraditya, llvm-commits

Differential revision: https://reviews.llvm.org/D64162

llvm-svn: 366753
2019-07-22 22:10:59 +00:00
Roman Lebedev 3a94765bfc [NFC][PatternMatch] Refactor code into a proper "matcher for any integral constant"
Having it as a proper matcher is better for reusability elsewhere
(in a follow-up patch.)

llvm-svn: 366752
2019-07-22 22:09:24 +00:00
Roman Lebedev 0689427280 [InstSimplify][NFC] Tests for skipping 'div-by-0' checks before @llvm.umul.with.overflow
These may remain after @llvm.umul.with.overflow was canonicalized
from the code that was originally doing the check via division.

llvm-svn: 366751
2019-07-22 22:09:11 +00:00
Roman Lebedev 1693b80bd5 [SimplifyCFG][NFC] Test that we fail to flatten CFG in JPEG "sign" value extend pattern
This comes up in JPEG decoding, see e.g.
Figure F.12 – Extending the sign bit of a decoded value in V
of ITU T.81 (JPEG specification).

llvm-svn: 366750
2019-07-22 22:09:02 +00:00
Roman Lebedev fca23d74c9 [SimplifyCFG][NFC] Test that we fail to flatten CFG after forming @llvm.umul.with.overflow
Even if we formed @llvm.umul.with.overflow, we are still stuck
with that guard against div-by-zero, which is no longer needed,
because we didn't flatten the CFG.

llvm-svn: 366749
2019-07-22 22:08:55 +00:00
Roman Lebedev 77d37037f0 [InstCombine][NFC] Tests for canonicalization of unsigned multiply overflow check
llvm-svn: 366748
2019-07-22 22:08:45 +00:00
Roman Lebedev 6b248fca33 [NFC][PhaseOrdering] Add tests showcasing the problems of unsigned multiply overflow check
While we can form the @llvm.mul.with.overflow easily,
we are still left with that check that was guarding against div-by-0.
And in the second case we won't even flatten the CFG.

llvm-svn: 366747
2019-07-22 22:08:35 +00:00
Roman Lebedev d5a52aeab6 [IndVarSimplify][NFC] Autogenerate check lines in loop_evaluate_1.ll
Being affected by upcoming patch.

llvm-svn: 366746
2019-07-22 22:08:27 +00:00
Matt Arsenault 827427f65b AMDGPU: Don't use SDNodeXForm for DS offset output
The xform has no real valuewhen it's using out of a complex pattern
output. The complex pattern was already creating TargetConstants with
i16, so this was just unnecessary machinery.

This allows global isel to import the simple cases once the complex
pattern is implemented.

llvm-svn: 366743
2019-07-22 21:38:11 +00:00
Eric Christopher 77dc6d2479 Temporarily Revert "[Attributor] Liveness analysis." as it's breaking the build.
This reverts commit 9285295f75.

llvm-svn: 366737
2019-07-22 21:04:23 +00:00
Stefan Stipanovic 9285295f75 [Attributor] Liveness analysis.
Liveness analysis abstract attribute used to indicate which BasicBlocks are dead and can therefore be ignored.
Right now we are only looking at noreturn calls.

Reviewers: jdoerfert, uenoku

Subscribers: hiraditya, llvm-commits

Differential revision: https://reviews.llvm.org/D64162

llvm-svn: 366736
2019-07-22 20:54:30 +00:00
Craig Topper 510e6fadaa [X86] When using AND+PACKUS in lowerV16I8Shuffle, generate the build vector directly in v16i8 with the correct 0x00 or 0xFF elements rather than using another VT and bitcasting it.
The build_vector will become a constant pool load. By using the
desired type initially, it ensures we don't generate a bitcast
of the constant pool load which will need to be folded with
the load.

While experimenting with another patch, I noticed that when the
load type and the constant pool type don't match, then
SimplifyDemandedBits can't handle it. While we should probably
fix that, this was a simple way to fix the issue I saw.

llvm-svn: 366732
2019-07-22 19:58:49 +00:00
Jason Liu 8dd563ef4b [NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention
Summary:

Since we are planning to add ADDIStocHA for 32bit in later patch, we decided
 to change 64bit one first to follow naming convention with 8 behind opcode.

Patch by: Xiangling_L

Differential Revision: https://reviews.llvm.org/D64814

llvm-svn: 366731
2019-07-22 19:55:33 +00:00
Stefan Stipanovic 69ebb02001 [Attributor] NoAlias on return values.
Porting function return value attribute noalias to attributor.
This will be followed with a patch for callsite and function argumets.

Reviewers: jdoerfert

Subscribers: lebedev.ri, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D63067

llvm-svn: 366728
2019-07-22 19:36:27 +00:00
Sean Fertile 942537d9fa Stubs out TLOF for AIX and add support for common vars in assembly output.
Stubs out a TargetLoweringObjectFileXCOFF class, implementing only
SelectSectionForGlobal for common symbols. Also adds an override of
EmitGlobalVariable in PPCAIXAsmPrinter which adds a number of defensive errors
and adds support for emitting common globals.

llvm-svn: 366727
2019-07-22 19:15:29 +00:00
Petr Hosek f6cd6ffbc9 [SafeStack] Insert the deref after the offset
While debugging code that uses SafeStack, we've noticed that LLVM
produces an invalid DWARF. Concretely, in the following example:

  int main(int argc, char* argv[]) {
    std::string value = "";
    printf("%s\n", value.c_str());
    return 0;
  }

DWARF would describe the value variable as being located at:

  DW_OP_breg14 R14+0, DW_OP_deref, DW_OP_constu 0x20, DW_OP_minus

The assembly to get this variable is:

  leaq    -32(%r14), %rbx

The order of operations in the DWARF symbols is incorrect in this case.
Specifically, the deref is incorrect; this appears to be incorrectly
re-inserted in repalceOneDbgValueForAlloca.

With this change which inserts the deref after the offset instead of
before it, LLVM produces correct DWARF:

  DW_OP_breg14 R14-32

Differential Revision: https://reviews.llvm.org/D64971

llvm-svn: 366726
2019-07-22 18:52:42 +00:00
Peter Collingbourne ef5cfc2dae WholeProgramDevirt: Teach the pass to respect the global's alignment.
The bytes inserted before an overaligned global need to be padded according
to the alignment set on the original global in order for the initializer
to meet the global's alignment requirements. The previous implementation
that padded to the pointer width happened to be correct for vtables on most
platforms but may do the wrong thing if the vtable has a larger alignment.

This issue is visible with a prototype implementation of HWASAN for globals,
which will overalign all globals including vtables to 16 bytes.

There is also no padding requirement for the bytes inserted after the global
because they are never read from nor are they significant for alignment
purposes, so stop inserting padding there.

Differential Revision: https://reviews.llvm.org/D65031

llvm-svn: 366725
2019-07-22 18:50:45 +00:00
Sean Fertile 324d33dd4e [PowerPC] Fix comment on MO_PLT Target Operand Flag. [NFC]
Patch by Xiangling Liao.

llvm-svn: 366724
2019-07-22 18:47:59 +00:00
Sean Fertile 8034daca5f [Object][XCOFF] Remove extra includes from XCOFF related files. [NFC]
Differential Revision: https://reviews.llvm.org/D60885

llvm-svn: 366723
2019-07-22 18:47:55 +00:00
Peter Collingbourne c3b8661df5 LowerTypeTests: Teach the pass to respect global alignments.
We were previously ignoring alignment entirely when combining globals
together in this pass. There are two main things that we need to do here:
add additional padding before each global to meet the alignment requirements,
and set the combined global's alignment to the maximum of all of the original
globals' alignments.

Since we now need to calculate layout as we go anyway, use the calculated
layout to produce GlobalLayout instead of using StructLayout.

Differential Revision: https://reviews.llvm.org/D65033

llvm-svn: 366722
2019-07-22 18:47:03 +00:00
Nilanjana Basu 06b8fe8d03 Changes to emit CodeView debug info nested type records properly using MCStreamer directives
llvm-svn: 366720
2019-07-22 18:22:55 +00:00
Stanislav Mekhanoshin 401461584d [AMDGPU] Test update. NFC.
llvm-svn: 366715
2019-07-22 18:08:53 +00:00
Simon Pilgrim 3ebd2fe91a [SLPVectorizer] Fix some MSVC/cppcheck uninitialized variable warnings. NFCI.
llvm-svn: 366712
2019-07-22 17:57:36 +00:00
Vlad Tsyrklevich 5874a28ac5 Revert "Reland [ELF] Loose a condition for relocation with a symbol"
This reverts commit r366686 as it appears to be causing buildbot
failures on sanitizer-x86_64-linux-android and sanitizer-x86_64-linux.

llvm-svn: 366708
2019-07-22 17:48:53 +00:00
Matt Arsenault 542720b2bc TableGen: Support physical register inputs > 255
This was truncating register value that didn't fit in unsigned char.
Switch AMDGPU sendmsg intrinsics to using a tablegen pattern.

llvm-svn: 366695
2019-07-22 15:02:34 +00:00
Sam Parker 4379a40088 [ARM][LowOverheadLoops] Revert remaining pseudos
ARMLowOverheadLoops would assert a failure if it did not find all the
pseudo instructions that comprise the hardware loop. Instead of doing
this, iterate through all the instructions of the function and revert
any remaining pseudo instructions that haven't been converted.

Differential Revision: https://reviews.llvm.org/D65080

llvm-svn: 366691
2019-07-22 14:16:40 +00:00
Matt Arsenault 4668ea4072 AMDGPU/GlobalISel: Fix broken tests
llvm-svn: 366688
2019-07-22 13:33:11 +00:00
Nikola Prica 0166cff09b Reland [ELF] Loose a condition for relocation with a symbol
This patch was not the reason of the buildbot failure.

Deleted code was introduced as a work around for a bug in the gold linker
(http://sourceware.org/PR16794). Test case that was given as a reason for
this part of code, the one on previous link, now works for the gold.
This condition is too strict and when a code is compiled with debug info
it forces generation of numerous relocations with symbol for architectures
that do not have relocation addend.

Reviewers: arsenm, espindola

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D64327

llvm-svn: 366686
2019-07-22 13:07:01 +00:00
Matt Arsenault 937d0ee5d8 AMDGPU/GlobalISel: Remove unnecessary code
The minnum/maxnum case are dead, and the cvt is handled by the
default.

llvm-svn: 366685
2019-07-22 13:05:25 +00:00
David Green 8876a312a8 [ARM] Fix for MVE VPT block pass
We need to ensure that the number of T's is correct when adding multiple
instructions into the same VPT block.

Differential revision: https://reviews.llvm.org/D65049

llvm-svn: 366684
2019-07-22 12:51:38 +00:00
Simon Pilgrim b3d719e1cf [X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED)
This patch enables us to find the source loads for each element, splitting them into a Load and ByteOffset, and attempts to recognise consecutive loads that are in fact from the same source load.

A helper function, findEltLoadSrc, recurses to find a LoadSDNode and determines the element's byte offset within it. When attempting to match consecutive loads, byte offsetted loads then attempt to matched against a previous load that has already been confirmed to be a consecutive match.

Next step towards PR16739 - after this we just need to account for shuffling/repeated elements to create a vector load + shuffle.

Fixed out of bounds load assert identified in rL366501

Differential Revision: https://reviews.llvm.org/D64551

llvm-svn: 366681
2019-07-22 12:44:10 +00:00
Matt Arsenault 8d372008b1 AMDGPU/GlobalISel: Fix tests without asserts
The legality check is only done under NDEBUG, so the failure cases are
different in a release build.

llvm-svn: 366680
2019-07-22 12:43:41 +00:00
Christudasan Devadasan 006cf8c03d Added address-space mangling for stack related intrinsics
Modified the following 3 intrinsics:
int_addressofreturnaddress,
int_frameaddress & int_sponentry.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D64561

llvm-svn: 366679
2019-07-22 12:42:48 +00:00
Simon Pilgrim bdb9295520 [X86][SSE] Add EltsFromConsecutiveLoads test case identified in rL366501
Test case that led to rL366441 being reverted at rL366501

llvm-svn: 366678
2019-07-22 12:17:56 +00:00