Commit Graph

3174 Commits

Author SHA1 Message Date
Sanjay Patel fdb3b036cc [InstCombine] add vector tests, fix comments; NFC
The scalar folds are done indirectly and use potentially
expensive value tracking calls. That can be improved
along with the enhancement to support vector types.

llvm-svn: 325051
2018-02-13 21:19:42 +00:00
Sanjay Patel cb8ac00f73 [InstCombine] (bool X) * Y --> X ? Y : 0
This is both a functional improvement for vectors and an
efficiency improvement for scalars. The existing code below
the new folds does the same thing for scalars, but in an 
indirect and expensive way.

llvm-svn: 325048
2018-02-13 20:41:22 +00:00
Sanjay Patel 2e2958497f [InstCombine] fix test comment and add vector test; NFC
llvm-svn: 325039
2018-02-13 18:48:27 +00:00
Sanjay Patel b13fcd52ed [InstCombine, InstSimplify] (re)move tests, regenerate checks; NFC
The InstCombine integer mul test file had tests that belong in InstSimplify 
(including fmul tests). Move things to where they belong and auto-generate
complete checks for everything.

llvm-svn: 325037
2018-02-13 18:22:53 +00:00
Vedant Kumar 388fac5de6 [Utils] Salvage debug info from all no-op casts
We already try to salvage debug values from no-op bitcasts and inttoptr
instructions: we should handle ptrtoint instructions as well.

This saves an additional 24,444 debug values in a stage2 build of clang,
and (according to llvm-dwarfdump --statistics) provides an additional
289 unique source variables.

llvm-svn: 324982
2018-02-13 03:34:23 +00:00
Vedant Kumar 4011c26cc7 [Utils] Salvage debug info of DCE'ed mul/sdiv/srem instructions
Here are the number of additional debug values salvaged in a stage2
build of clang:

  63 SALVAGE: MUL
  1250 SALVAGE: SDIV

(No values were salvaged from `srem` instructions in this experiment,
but it's a simple case to handle so we might as well.)

llvm-svn: 324976
2018-02-13 01:09:52 +00:00
Vedant Kumar 31ec356a48 [Utils] Salvage debug info of DCE'ed shl/lhsr/ashr instructions
Here are the number of additional debug values salvaged in a stage2
build of clang:

  1912 SALVAGE: ASHR
   405 SALVAGE: LSHR
   249 SALVAGE: SHL

llvm-svn: 324975
2018-02-13 01:09:49 +00:00
Vedant Kumar 47b16c45d7 [Utils] Salvage the debug info of DCE'ed 'sub' instructions
This salvages 14 debug values in a stage2 build of clang.

llvm-svn: 324974
2018-02-13 01:09:47 +00:00
Vedant Kumar 96b7dc041b [Utils] Salvage the debug info of DCE'ed 'xor' instructions
This salvages 259 debug values in a stage2 build of clang.

Differential Revision: https://reviews.llvm.org/D43207

llvm-svn: 324973
2018-02-13 01:09:46 +00:00
Daniel Neilson 2363da9236 [InstCombine] Simplify MemTransferInst's source and dest alignments separately
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
InstCombine pass to cease using the deprecated MemoryIntrinsic::getAlignment() method, and
instead we use the separate getSourceAlignment and getDestAlignment APIs to simplify
the source and destination alignment attributes separately.

Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774,
rL324781, rL324784, rL324955 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.

Reference
   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

Reviewers: majnemer, bollu, efriedma

Reviewed By: efriedma

Subscribers: efriedma, llvm-commits

Differential Revision: https://reviews.llvm.org/D42871

llvm-svn: 324960
2018-02-12 23:06:55 +00:00
Vedant Kumar a8b8d3225b Move the debuginfo-dce-or test into debuginfo-variables.ll, NFC
llvm-svn: 324933
2018-02-12 21:02:45 +00:00
Sanjay Patel 4a4f35f324 [InstCombine] X / (X * Y) --> 1.0 / Y
This is similar to the instsimplify fold added with D42385 
( rL323716 )
...but this can't be in instsimplify because we're creating/morphing
a different instruction.

llvm-svn: 324927
2018-02-12 19:39:21 +00:00
Sanjay Patel ee4257f676 [InstCombine] add tests for missing fdiv fold; NFC
llvm-svn: 324926
2018-02-12 19:23:39 +00:00
Sanjay Patel e4fcb00290 [InstCombine] regenerate checks; NFC
llvm-svn: 324924
2018-02-12 19:14:01 +00:00
Sanjay Patel 510d647a4d [InstCombine] X / (X * Y) -> 1 / Y if the multiplication does not overflow
The related cases for (X * Y) / X were handled in rL124487.

https://rise4fun.com/Alive/6k9

The division in these tests is subsequently eliminated by existing instcombines
for 1/X.

llvm-svn: 324843
2018-02-11 17:20:32 +00:00
Sanjay Patel aee107f30d [InstCombine] add tests for div-mul folds; NFC
The related cases for (X * Y) / X were handled in rL124487.

llvm-svn: 324840
2018-02-11 16:52:44 +00:00
Craig Topper 4dccffc84a [X86] Change signatures of avx512 packed fp compare intrinsics to return a vXi1 mask type to be closer to an fcmp.
Summary:
This patch changes the signature of the avx512 packed fp compare intrinsics to return a vXi1 vector and no longer take a mask as input. The casts to scalar type will now need to be explicit in the IR. The masking node will now be an explicit and in the IR.

This makes the intrinsic look much more similar to an fcmp instruction that we wish we could use for these but can't. We already use icmp instructions for integer compares.

Previously the lowering step of isel would turn the intrinsic into an X86 specific ISD node and a emit the masking nodes as well as some bitcasts. This means DAG combines can't see the vXi1 type until somewhat late, making it more difficult to combine out gpr<->mask transition sequences. By exposing the vXi1 type explicitly in the IR and initial SelectionDAG we give earlier DAG combines and even InstCombine the chance to see it and optimize it.

This should make any issues with gpr<->mask sequences the same between integer and fp. Meaning we only have to fix them once.

Reviewers: spatel, delena, RKSimon, zvi

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43137

llvm-svn: 324827
2018-02-10 23:33:55 +00:00
Simon Pilgrim 19495198af [InstCombine] Add constant vector support for ~(C >> Y) --> ~C >> Y
Includes adding m_NonNegative constant pattern matcher

llvm-svn: 324825
2018-02-10 21:46:09 +00:00
Vedant Kumar 04386d8e3d [Utils] Salvage debug info from dead 'or' instructions
Extend salvageDebugInfo to preserve the debug info from a dead 'or'
with a constant.

Patch by Ismail Badawi!

Differential Revision: https://reviews.llvm.org/D43129

llvm-svn: 324764
2018-02-09 19:19:55 +00:00
Simon Pilgrim 0919a8c130 [InstCombine] Add vector xor tests
This doesn't cover everything in InstCombiner.visitXor yet, but increases coverage for a lot of tests

llvm-svn: 324753
2018-02-09 17:45:45 +00:00
Simon Pilgrim 9620f4b746 [InstCombine] Add constant vector support for X udiv C, where C >= signbit
llvm-svn: 324728
2018-02-09 10:43:59 +00:00
Simon Pilgrim 3f462e90cc Regenerate test
llvm-svn: 324639
2018-02-08 19:28:05 +00:00
Simon Pilgrim f30656add3 [InstCombine] Add vector udiv tests
Tests for X udiv C, where C >= signbit

llvm-svn: 324635
2018-02-08 18:58:00 +00:00
Simon Pilgrim 1889f26b94 [InstCombine] Add m_Negative pattern matching
Allows us to add non-uniform constant vector support for "X urem C -> X < C ? X : X - C, where C >= signbit."

llvm-svn: 324631
2018-02-08 18:36:01 +00:00
Simon Pilgrim 11a02589c1 [InstCombine] Add vector urem tests.
Improve coverage of InstCombiner::visitURem for vector types

llvm-svn: 324629
2018-02-08 18:10:08 +00:00
Simon Pilgrim ab689cb638 [InstCombine] Regenerate vector mul tests.
llvm-svn: 324627
2018-02-08 17:54:24 +00:00
Simon Pilgrim 2a90acd17a [InstCombine] Fix issue with X udiv (POW2_C1 << N) for non-splat constant vectors
foldUDivShl was assuming that the input was a scalar or a splat constant

llvm-svn: 324613
2018-02-08 15:19:38 +00:00
Simon Pilgrim 94cc89d5f2 [InstCombine] Fix issue with X udiv 2^C -> X >> C for non-splat constant vectors
foldUDivPow2Cst was assuming that the input was a scalar or a splat constant

llvm-svn: 324608
2018-02-08 14:46:10 +00:00
Simon Pilgrim 0b9f3912ce [InstCombine] Improve mul(x, pow2) -> shl combine for vector constants
Refactor getLogBase2Vector into getLogBase2 to accept all scalars/vectors. Generalize from ConstantDataVector to support all constant vectors.

llvm-svn: 324603
2018-02-08 14:10:01 +00:00
Simon Pilgrim 9f2ae7e2d1 [InstCombine][ValueTracking] Match non-uniform constant power-of-two vectors
Generalize existing constant matching to work with non-uniform constant vectors as well.

Differential Revision: https://reviews.llvm.org/D42818

llvm-svn: 324369
2018-02-06 18:39:23 +00:00
Simon Pilgrim e11c64162c Regenerate vector-urem test. NFCI.
llvm-svn: 324357
2018-02-06 16:10:12 +00:00
Sanjay Patel 49aafec2e6 [InstCombine] don't try to evaluate instructions with >1 use (revert r324014)
This example causes a compile-time explosion:

define i16 @foo(i16 %in) {
  %x = zext i16 %in to i32
  %a1 = mul i32 %x, %x
  %a2 = mul i32 %a1, %a1
  %a3 = mul i32 %a2, %a2
  %a4 = mul i32 %a3, %a3
  %a5 = mul i32 %a4, %a4
  %a6 = mul i32 %a5, %a5
  %a7 = mul i32 %a6, %a6
  %a8 = mul i32 %a7, %a7
  %a9 = mul i32 %a8, %a8
  %a10 = mul i32 %a9, %a9
  %a11 = mul i32 %a10, %a10
  %a12 = mul i32 %a11, %a11
  %a13 = mul i32 %a12, %a12
  %a14 = mul i32 %a13, %a13
  %a15 = mul i32 %a14, %a14
  %a16 = mul i32 %a15, %a15
  %a17 = mul i32 %a16, %a16
  %a18 = mul i32 %a17, %a17
  %a19 = mul i32 %a18, %a18
  %a20 = mul i32 %a19, %a19
  %a21 = mul i32 %a20, %a20
  %a22 = mul i32 %a21, %a21
  %a23 = mul i32 %a22, %a22
  %a24 = mul i32 %a23, %a23
  %T = trunc i32 %a24 to i16
  ret i16 %T
}

 

llvm-svn: 324276
2018-02-05 21:50:32 +00:00
Sanjay Patel 1c84dd9a8f [InstCombine] add test corresponding to r324252 (PR36225); NFC
As PR36225 shows, we definitely don't want to enable the
canEvaluate* logic with phis. 

There's still a question of whether we should just revert 
r324014 completely because it exposes a compile-time sinkhole
(although that problem might exist independently).

llvm-svn: 324266
2018-02-05 19:59:52 +00:00
Sanjay Patel e9a153f414 [InstCombine] add unsigned saturation subtraction canonicalizations
This is the instcombine part of unsigned saturation canonicalization.
Backend patches already commited: 
https://reviews.llvm.org/D37510
https://reviews.llvm.org/D37534

It converts unsigned saturated subtraction patterns to forms recognized 
by the backend:
(a > b) ? a - b : 0 -> ((a > b) ? a : b) - b)
(b < a) ? a - b : 0 -> ((a > b) ? a : b) - b)
(b > a) ? 0 : a - b -> ((a > b) ? a : b) - b)
(a < b) ? 0 : a - b -> ((a > b) ? a : b) - b)
((a > b) ? b - a : 0) -> - ((a > b) ? a : b) - b)
((b < a) ? b - a : 0) -> - ((a > b) ? a : b) - b)
((b > a) ? 0 : b - a) -> - ((a > b) ? a : b) - b)
((a < b) ? 0 : b - a) -> - ((a > b) ? a : b) - b)

Patch by Yulia Koval!

Differential Revision: https://reviews.llvm.org/D41480

llvm-svn: 324255
2018-02-05 17:53:29 +00:00
David Green 9688ed61fe Remove unneeded -debug argument from new test
llvm-svn: 324176
2018-02-03 17:33:50 +00:00
David Green 7174023f57 [InstCombine] Allow common type conversions to i8/i16/i32
This, in instcombine, allows conversions to i8/i16/i32 (very
common cases) even if the resulting type is not legal according
to the data layout. This can often open up extra combine
opportunities.

Differential Revision: https://reviews.llvm.org/D42424

llvm-svn: 324174
2018-02-03 16:51:03 +00:00
Sanjay Patel a767ee5af0 [InstCombine] make sure tests are providing coverage for the stated pattern; NFC
Without extra instructions and uses, swapMayExposeCSEOpportunities() would change
the icmp (as seen in the check lines), so we were not actually testing patterns 
that should be handled by D41480.

llvm-svn: 324143
2018-02-02 21:40:54 +00:00
Sanjay Patel 5b8cb26bcc [InstCombine] add baseline tests for unsigned saturated sub (D41480); NFC
llvm-svn: 324109
2018-02-02 17:43:16 +00:00
Sanjay Patel 3343fcef86 [InstCombine] allow multi-use values in canEvaluate* if all uses are in 1 inst
This is the enhancement suggested in D42536 to fix a shortcoming in 
regular InstCombine's canEvaluate* functionality.
When we have multiple uses of a value, but they're all in one instruction, we can 
allow that expression to be narrowed or widened for the same cost as a single-use 
value.

AFAICT, this can only matter for multiply: sub/and/or/xor/select would be simplified 
away if the operands are the same value; add becomes shl; shifts with a variable shift 
amount aren't handled.

Differential Revision: https://reviews.llvm.org/D42739

llvm-svn: 324014
2018-02-01 21:55:53 +00:00
David Green 184df0c35d Revert commit rL323951
Looks like it's causing timeouts out on at least ppc64le
buildbots.

llvm-svn: 323959
2018-02-01 13:05:25 +00:00
David Green e11f0545db [InstCombine] Allow common type conversions to i8/i16/i32
This, in instcombine, allows conversions to i8/i16/i32 (very
common cases) even if the resulting type is not legal according
to the data layout. This can often open up extra combine
opportunities.

Differential Revision: https://reviews.llvm.org/D42424

llvm-svn: 323951
2018-02-01 11:06:18 +00:00
Marek Olsak 13e4741275 AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D41663

llvm-svn: 323908
2018-01-31 20:18:04 +00:00
Sanjay Patel fd58ade81c [InstCombine] move related tests into the same file; NFC
llvm-svn: 323882
2018-01-31 15:47:59 +00:00
Sanjay Patel 8c74a9a155 [InstCombine] add tests to show limit of canEvaluate* ; NFC
llvm-svn: 323881
2018-01-31 15:28:39 +00:00
Vedant Kumar e48597a50e [InstCombine] Preserve debug values for eliminable casts
A cast from A to B is eliminable if its result is casted to C, and if
the pair of casts could just be expressed as a single cast. E.g here,
%c1 is eliminable:

  %c1 = zext i16 %A to i32
  %c2 = sext i32 %c1 to i64

InstCombine optimizes away eliminable casts. This patch teaches it to
insert a dbg.value intrinsic pointing to the final result, so that local
variables pointing to the eliminable result are preserved.

Differential Revision: https://reviews.llvm.org/D42566

llvm-svn: 323570
2018-01-26 22:02:52 +00:00
Sanjay Patel 1d68112c4b [InstCombine] narrow masked zexted binops (PR35792)
This is guarded by shouldChangeType(), so the tests show that
we don't do the fold if the narrower type is not legal. Note
that there is a proposal (D42424) that would change the results
for the specific cases shown in these tests. That difference is
also discussed in PR35792:
https://bugs.llvm.org/show_bug.cgi?id=35792

Alive proofs for the cases handled here as well as the bitwise 
logic binops that we should already do better on:
https://rise4fun.com/Alive/c97
https://rise4fun.com/Alive/Lc5E
https://rise4fun.com/Alive/kdf

llvm-svn: 323437
2018-01-25 16:34:36 +00:00
Sanjay Patel 0f95dd234d [InstCombine] add tests for PR35792; NFC
llvm-svn: 323436
2018-01-25 16:03:44 +00:00
Sanjay Patel 60c13c7712 [InstCombine] fix datalayout in test file
The only part of the datalayout that should matter for these tests
is the part that specifies the legal int widths ('n*'). But there
was a bug - that part of the string was not correctly separated with
the expected '-' character, so we were testing as if there were no
legal int widths at all. Removed the leading cruft so we have some 
legal ints to test with.

I noticed this while testing a potential change to the way we 
transform shifts and sexts in D42424.

llvm-svn: 323377
2018-01-24 21:36:45 +00:00
Sanjay Patel 9530f18864 [InstCombine] (X << Y) / X -> 1 << Y
...when the shift is known to not overflow with the matching
signed-ness of the division.

This closes an optimization gap caused by canonicalizing mul
by power-of-2 to shl as shown in PR35709:
https://bugs.llvm.org/show_bug.cgi?id=35709

Patch by Anton Bikineev!

Differential Revision: https://reviews.llvm.org/D42032

llvm-svn: 323068
2018-01-21 16:14:51 +00:00
Sanjay Patel 439132185d [InstCombine] add baseline tests for (X << Y) / X -> 1 << Y; NFC
This fold is proposed in D42032.

llvm-svn: 323043
2018-01-20 16:13:40 +00:00