Commit Graph

145064 Commits

Author SHA1 Message Date
Daniel Berlin b355c4ff5f NewGVN: Make ranking prefer undef to constants. Fix direction of
shouldSwapOperands to be correct.

llvm-svn: 295582
2017-02-18 23:06:47 +00:00
Daniel Berlin 588e0be39d PredicateInfo: Clean up predicate info a little, using insertion
helpers, and fixing support for the renaming the comparison.

llvm-svn: 295581
2017-02-18 23:06:38 +00:00
Simon Pilgrim 2f2d8dc630 Fix signed/unsigned comparison warning.
llvm-svn: 295580
2017-02-18 22:56:17 +00:00
Craig Topper 811756b4dc [X86][XOP] Reduce the size of a multiclass by moving more stuff to parameters instead of doing 128-bit and 256-bit simultaneously.
This requires some instructions to be renamed to move the Y earlier in the instruction name. The new names are more consistent with other instructions.

llvm-svn: 295579
2017-02-18 22:53:43 +00:00
Craig Topper f6564c991b [TableGen] Make sure EnforceSameSize populates the type sets if necessary.
This was found by another commit I'm working on.

llvm-svn: 295578
2017-02-18 22:53:38 +00:00
Simon Pilgrim b092166a76 [AArch64] Fix enumeral/non-enumeral conditional expression warning.
gcc only allows you to mix enums / ints if they have the same signedness.

llvm-svn: 295577
2017-02-18 22:50:28 +00:00
Simon Pilgrim 7a87eebcad [X86] Fix enumeral/non-enumeral comparison warning.
gcc only allows you to mix enums / ints if they have the same signedness.

llvm-svn: 295576
2017-02-18 22:40:58 +00:00
Simon Pilgrim 2e78c94ea5 [X86][SSE] Avoid repeated calls to SDValue::getValueType.
Added assertion to check input type of X86ISD::VZEXT during target known bits calculation.

llvm-svn: 295575
2017-02-18 22:25:27 +00:00
Sanjay Patel 53c5c3d65d [InstCombine] add nsw/nuw X, signbit --> or X, signbit
Changing to 'or' (rather than 'xor' when no wrapping flags are set)
allows icmp simplifies to happen as expected.

Differential Revision: https://reviews.llvm.org/D29729

llvm-svn: 295574
2017-02-18 22:20:09 +00:00
Sanjay Patel fe67255961 [InstSimplify] add nsw/nuw (xor X, signbit), signbit --> X
The change to InstCombine in:
https://reviews.llvm.org/D29729
...exposes this missing fold in InstSimplify, so adding this
first to avoid a regression.

llvm-svn: 295573
2017-02-18 21:59:09 +00:00
Sanjay Patel 308eb22118 [InstSimplify] add tests for add nsw/nuw (xor X, signbit), signbit --> X; NFC
llvm-svn: 295572
2017-02-18 21:51:14 +00:00
Craig Topper de10312bea Recommit "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."
Clang has now been fixed to not use these intrinsics.

llvm-svn: 295571
2017-02-18 21:50:58 +00:00
Sanjay Patel dc8a24ea4c [x86] remove stale comments from tests; NFC
llvm-svn: 295569
2017-02-18 21:07:37 +00:00
Sanjay Patel 12c2093e1e [x86] fold sext (xor Bool, -1) --> sub (zext Bool), 1
This is the same transform that is current used for:
select Bool, 0, -1

llvm-svn: 295568
2017-02-18 21:03:28 +00:00
Piotr Padlewski cc5868c186 [MemorySSA] NFC small fixes
Summary:
2 small fixes extracted from
https://reviews.llvm.org/D29064

Reviewers: kuhar, davide, dberlin, george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30109

llvm-svn: 295566
2017-02-18 20:34:36 +00:00
Craig Topper ba2a726cc6 Revert "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."
This reverts r295564. I missed that clang was still using the intrinsics despite our half implemented autoupgrade support.

llvm-svn: 295565
2017-02-18 20:14:20 +00:00
Craig Topper 884db3f85d [X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR.
It seems we were already upgrading 128-bit VPCMOV, but the intrinsic was still defined and being used in isel patterns. While I was here I also simplified the tablegen multiclasses.

llvm-svn: 295564
2017-02-18 19:51:25 +00:00
Craig Topper 03a9adc2ba [X86][IR] Simplify the XOP vpcmov autoupgrade code. NFC
llvm-svn: 295563
2017-02-18 19:51:19 +00:00
Craig Topper aa49f14496 [X86][IR] Merge together some very similar AutoUpgrade handling. NFC
llvm-svn: 295562
2017-02-18 19:51:14 +00:00
Matt Arsenault 2021f08080 AMDGPU: Fix assembler subtarget predicate for gfx9
This was accepting GFX9 instructions on VI.

llvm-svn: 295557
2017-02-18 19:12:26 +00:00
Matt Arsenault a3b3b489fb AMDGPU: Fix disassembly of aperture registers
llvm-svn: 295555
2017-02-18 18:41:41 +00:00
Matt Arsenault e823d92f7f AMDGPU: Merge initial gfx9 support
llvm-svn: 295554
2017-02-18 18:29:53 +00:00
Sanjay Patel 6d5dddb85f [InstCombine] add tests for trunc(insertelement); NFC
llvm-svn: 295553
2017-02-18 18:27:04 +00:00
Easwaran Raman 617f63640b Refactor instruction simplification code in visitors. NFC.
Several visitors check if operands to the instruction are constants,
either as it is or after looking up SimplifiedValues, check if the
result is a constant and update the SimplifiedValues map. This
refactoring splits it into a common function that does the checking of
whether the operands are constants and updating of the SimplifiedValues
table, and an instruction specific part that is implemented by each
instruction visitor as a lambda and passed to the common function.

Differential revision: https://reviews.llvm.org/D30104

llvm-svn: 295552
2017-02-18 17:22:52 +00:00
Sanjay Patel 86554de2bd [InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC
We're ok shrinking splats, but not shuffles in general.

See https://reviews.llvm.org/D30123 for discussion.

llvm-svn: 295547
2017-02-18 15:24:31 +00:00
Brian Cain cc24826e1e opt-viewer: Fix syntax highlighting
Syntax highlighting has been done line-at-a-time. Done this way, the lexer
resets the context at each line, distorting the formatting.

This change will render the whole file at once and feed the highlighted text
line-at-a-time to be wrapped by the SourceFileRenderer.

Leading/trailing newlines were being ignored by Pygments but since each line
was rendered in its own row, it didn't matter. This bug was masked by the
line-at-a-time algorithm. So now we need to add "stripnl=False" to the 
CppLexer to change its behavior to match the expectation.

llvm-svn: 295546
2017-02-18 15:13:58 +00:00
Craig Topper a505169ca5 [AVX-512] Remove 128/256-bit masked fp max/min intrinsics. Upgrade them to legacy unmasked intrinsics and select instructions.
llvm-svn: 295543
2017-02-18 07:07:50 +00:00
Dehao Chen b70afdb5e8 Add default OptLevel value for createSimpleLoopUnrollPass to fix the build break introduced by r295538. (NFC)
llvm-svn: 295542
2017-02-18 06:42:16 +00:00
Jan Vesely 4b1243facb AMDGPU/R600: Assert on infinite loop in EmitClauseMarkers
Differential Revision: https://reviews.llvm.org/D29792

llvm-svn: 295539
2017-02-18 04:24:10 +00:00
Dehao Chen 7d230325ef Increases full-unroll threshold.
Summary:
The default threshold for fully unroll is too conservative. This patch doubles the full-unroll threshold

This change will affect the following speccpu2006 benchmarks (performance numbers were collected from Intel Sandybridge):

Performance:

403	0.11%
433	0.51%
445	0.48%
447	3.50%
453	1.49%
464	0.75%

Code size:

403	0.56%
433	0.96%
445	2.16%
447	2.96%
453	0.94%
464	8.02%

The compiler time overhead is similar with code size.

Reviewers: davidxl, mkuper, mzolotukhin, hfinkel, chandlerc

Reviewed By: hfinkel, chandlerc

Subscribers: mehdi_amini, zzheng, efriedma, haicheng, hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D28368

llvm-svn: 295538
2017-02-18 03:46:51 +00:00
Davide Italiano 982bf827b5 [IR/Verifier] Don't visit DISubprograms more than needed.
Before this patch we happened to visit twice, one when scanning
MDNodes and the other one while visiting the function. Remove
the explicit call to visitDISubprogram there, so we don't emit
the same error twice in case the verifier fail and we save some
time when running it.
Thanks to Justin Bogner for the report and Adrian for the quick
review!

PR: 31995
llvm-svn: 295537
2017-02-18 03:02:44 +00:00
Dylan McKay 83788ff349 [AVR] Set UseIntegratedAssembler
llvm-svn: 295535
2017-02-18 02:26:11 +00:00
Justin Bogner 7bc978b543 OptDiag: Allow constructing DiagnosticLocation from DISubprograms
This avoids creating a DILocation just to represent a line number,
since creating Metadata is expensive. Creating a DiagnosticLocation
directly is much cheaper.

llvm-svn: 295531
2017-02-18 02:00:27 +00:00
Zachary Turner 607418771e Remove the is_trivially_copyable check entirely.
This is still breaking builds because some compilers think
this type is not trivially copyable even when it should be.

Reverting this static_assert until I have time to investigate.

llvm-svn: 295529
2017-02-18 01:51:00 +00:00
Zachary Turner 3720124545 Use llvm workaround for missing is_trivially_copyable.
some versions of GCC don't have this, so LLVM provides a
workaround.

llvm-svn: 295526
2017-02-18 01:46:01 +00:00
Zachary Turner 181fe17b6f Don't assume little endian in StreamReader / StreamWriter.
In an effort to generalize this so it can be used by more than
just PDB code, we shouldn't assume little endian.

llvm-svn: 295525
2017-02-18 01:35:33 +00:00
Matthias Braun 2a707a3d3d machine-region-info.mir: Slightly simplify test, -mtriple
llvm-svn: 295520
2017-02-18 00:48:43 +00:00
Justin Bogner d890f95bf6 OptDiag: Decouple backend diagnostics from debug info metadata
This creates and uses a DiagnosticLocation type rather than using
DebugLoc for this purpose in the backend diagnostics. This is NFC for
now, but will allow us to create locations for diagnostics without
having to create new metadata nodes when we don't have a DILocation.

llvm-svn: 295519
2017-02-18 00:42:23 +00:00
Matthias Braun 431305927f MachineRegionInfo: Fix pass initialization
- Adapt MachineBasicBlock::getName() to have the same behavior as the IR
  BasicBlock (Value::getName()).
- Add it to lib/CodeGen/CodeGen.cpp::initializeCodeGen so that it is linked in
  the CodeGen library.
- MachineRegionInfoPass's name conflicts with RegionInfoPass's name ("region").
- MachineRegionInfo should depend on MachineDominatorTree,
  MachinePostDominatorTree and MachineDominanceFrontier instead of their
  respective IR versions.
- Since there were no tests for this, add a X86 MIR test.

Patch by Francis Visoiu Mistrih<fvisoiumistrih@apple.com>

llvm-svn: 295518
2017-02-18 00:41:16 +00:00
Justin Bogner efc3fbf6a2 Verifier: Disallow a line number without a file in DISubprogram
A line number doesn't make much sense if you don't say where it's
from. Add a verifier check for this and update some tests that had
bogus debug info.

llvm-svn: 295516
2017-02-17 23:57:42 +00:00
Sanjay Patel f8346550bf [InstCombine] add tests for trunc(shuffle X, C, M); NFC
llvm-svn: 295513
2017-02-17 23:16:54 +00:00
Matthias Braun d9a59a8df8 AArch64LoadStoreOptimizer: Correctly clear kill flags
When promoting the Load of a Store-Load pair to a COPY all kill flags
between the store and the load need to be cleared.

rdar://30402435

Differential Revision: https://reviews.llvm.org/D30110

llvm-svn: 295512
2017-02-17 23:15:03 +00:00
Simon Pilgrim 8670993dc1 [X86] Add MOVBE targets to load combine tests
Test folded endian swap tests with MOVBE instructions.

llvm-svn: 295508
2017-02-17 23:00:21 +00:00
Guozhi Wei 7ec2c72095 [PPC] Give unaligned memory access lower cost on processor that supports it
Newer ppc supports unaligned memory access, it reduces the cost of unaligned memory access significantly. This patch handles this case in PPCTTIImpl::getMemoryOpCost.

This patch fixes pr31492.

Differential Revision: https://reviews.llvm.org/D28630

This is resubmit of r292680, which was reverted by r293092. The internal application failures were actually caused by a source code bug.

llvm-svn: 295506
2017-02-17 22:29:39 +00:00
Eugene Zelenko be37db1882 [CodeGen] Revert changes in LowLevelType to pre-r295499 to fix broken buildbots.
llvm-svn: 295505
2017-02-17 22:23:34 +00:00
Krzysztof Parzyszek 1aaf41af54 [Hexagon] Start using regmasks on calls
Reapply r295371 with a fix for the Windows bot failures.

llvm-svn: 295504
2017-02-17 22:14:51 +00:00
Davide Italiano bca05df38b [NewGVN] isOnlyReachableViaThisEdge() is dead now. NFCI.
llvm-svn: 295503
2017-02-17 22:12:30 +00:00
Simon Pilgrim 7db8f42fe3 [X86] Simplify by pulling out valuetype. NFCI.
llvm-svn: 295502
2017-02-17 22:10:10 +00:00
Eugene Zelenko 9676ebec15 [CodeGen] Attempt to fix buildbots broken in r295499.
llvm-svn: 295501
2017-02-17 22:07:26 +00:00
Davide Italiano 6db0ecafd7 [NewGVN] createVariableOrConstant is not required anymore. NFCI.
llvm-svn: 295500
2017-02-17 21:55:47 +00:00