llvm-project

Author	SHA1	Message	Date
Jia Liu	e1d619691b	some comment fix for X86 and ARM llvm-svn: 150902	2012-02-19 02:03:36 +00:00
Jia Liu	b22310fda6	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878	2012-02-18 12:03:15 +00:00
Craig Topper	4daa67483d	Remove most of the intrinsics for XOP VPCMOV instruction. They all aliased to the same instruction with different types. This would be better accomplished with casts in the not yet created xopintrin.h header file. llvm-svn: 149795	2012-02-05 00:55:56 +00:00
Craig Topper	ca29bcfc10	Move some XOP patterns into instruction definition. Replae VPCMOV intrinsic patterns with custom lowering to a target specific nodes. llvm-svn: 149216	2012-01-30 01:10:15 +00:00
Craig Topper	86e44bc829	Add HasXOP predicate check covering a bunch of XOP intrinsic patterns. llvm-svn: 149054	2012-01-26 07:51:55 +00:00
Jan Sjödin	21f83d9f36	Add XOP Intrinsics and tests llvm-svn: 147949	2012-01-11 15:20:20 +00:00
Craig Topper	2ba766ae84	Add disassembler support for VPERMIL2PD and VPERMIL2PS. llvm-svn: 147368	2011-12-30 06:23:39 +00:00
Craig Topper	cd93de93fa	Separate the concept of having memory access in operand 4 from the concept of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation. llvm-svn: 147366	2011-12-30 04:48:54 +00:00
Jan Sjödin	7c0face455	XOP instructions and encoding tests. llvm-svn: 146407	2011-12-12 19:37:49 +00:00