b2c80da4ae
Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
...
llvm-svn: 126518
2011-02-25 21:41:48 +00:00
14a07365cb
Fix formatting of debug helper string.
...
llvm-svn: 126471
2011-02-25 03:59:03 +00:00
6470647383
Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfo
...
and make the actual map private.
llvm-svn: 126376
2011-02-24 10:00:08 +00:00
f8b22b3483
Roll out r126169 and r126170 in an attempt to fix the selfhost bot.
...
llvm-svn: 126185
2011-02-22 03:24:52 +00:00
800f85baf9
Merge information about the number of zero, one, and sign bits of live-out registers
...
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.
llvm-svn: 126170
2011-02-22 00:46:27 +00:00
b7ae3ccb84
Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
...
This time with a fix that avoids using invalidated DenseMap iterator.
llvm-svn: 125984
2011-02-18 22:43:42 +00:00
0a1a36dc46
Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure.
...
llvm-svn: 125830
2011-02-18 04:58:10 +00:00
f922a431ee
Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
...
llvm-svn: 125794
2011-02-17 23:33:27 +00:00
69229316aa
convert ConstantVector::get to use ArrayRef.
...
llvm-svn: 125537
2011-02-15 00:14:00 +00:00
34442e6ebf
revert my ConstantVector patch, it seems to have made the llvm-gcc
...
builders unhappy.
llvm-svn: 125504
2011-02-14 18:15:46 +00:00
d9f5b88548
Switch ConstantVector::get to use ArrayRef instead of a pointer+size
...
idiom. Change various clients to simplify their code.
llvm-svn: 125487
2011-02-14 07:55:32 +00:00
e95d195014
Revisit my fix for PR9028: the issue is that DAGCombine was
...
generating i8 shift amounts for things like i1024 types. Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h
llvm-svn: 125465
2011-02-13 19:09:16 +00:00
d5f0b1148a
when legalizing extremely wide shifts, make sure that
...
the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.
This fixes PR9028.
llvm-svn: 125458
2011-02-13 09:10:56 +00:00
2a720d933a
fix visitShift to properly zero extend the shift amount if the provided operand
...
is narrower than the shift register. Doing an anyext provides undefined bits in
the top part of the register.
llvm-svn: 125457
2011-02-13 09:02:52 +00:00
0af77fd45b
Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger!
...
llvm-svn: 124472
2011-01-28 04:00:15 +00:00
70f8e5962a
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
...
llvm-svn: 124203
2011-01-25 18:09:58 +00:00
533479544b
Speculatively revert r124138.
...
llvm-svn: 124142
2011-01-24 20:04:37 +00:00
8cc5355c90
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
...
llvm-svn: 124138
2011-01-24 19:24:37 +00:00
2f93128109
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
...
llvm-svn: 123170
2011-01-10 12:39:04 +00:00
2fb5b31578
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
...
These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
llvm-svn: 123155
2011-01-10 02:58:51 +00:00
793d7b7626
Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 123096
2011-01-08 23:10:50 +00:00
6eb516dbea
Do not model all INLINEASM instructions as having unmodelled side effects.
...
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
llvm-svn: 123044
2011-01-07 23:50:32 +00:00
8265d56638
Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
...
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.
The test changes are needed to keep those spill-q tests from testing aligned
spills and restores. If the only aligned stack objects are spill slots, we
no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.
llvm-svn: 122995
2011-01-07 04:59:04 +00:00
ac730dd2d1
Avoid zero extend bit test operands to pointer type if all the masks fit in
...
the original type of the switch statement key.
rdar://8781238
llvm-svn: 122935
2011-01-06 01:02:44 +00:00
3e5fbd74ed
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
...
something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
2010-12-21 02:38:05 +00:00
cb404360ca
reduce indentation by using continue, no functionality change.
...
llvm-svn: 121662
2010-12-13 01:11:17 +00:00
583abbc4df
PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
...
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.
llvm-svn: 121120
2010-12-07 08:25:19 +00:00
c24048a718
If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
...
llvm-svn: 121059
2010-12-06 22:39:26 +00:00
ea41dfe385
add TLI support indicating that jumps are more expensive than logical operations
...
and use this to disable a specific optimization. Patch by Micah Villmow!
llvm-svn: 120435
2010-11-30 18:12:52 +00:00
527da1b6e2
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
...
llvm-svn: 119990
2010-11-23 03:31:01 +00:00
24656c9583
Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
...
This currently only catches the most basic case, a two-case switch, but can be
extended later.
llvm-svn: 119964
2010-11-22 09:45:38 +00:00
cf7fefb25c
Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test.
...
llvm-svn: 119898
2010-11-20 07:26:51 +00:00
ddc7ce548c
Bug 8621 fix - pointer cast stripped from inline asm constraint argument.
...
llvm-svn: 119590
2010-11-17 23:58:47 +00:00
6cbf6c1db5
typo (4th checkin for one fix)
...
llvm-svn: 118913
2010-11-12 18:36:03 +00:00
116efac780
Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
...
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.
llvm-svn: 118904
2010-11-12 17:50:46 +00:00
64634c36dd
tidy up.
...
llvm-svn: 118896
2010-11-12 17:24:29 +00:00
6cf9bb45ad
Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.
...
llvm-svn: 118789
2010-11-11 16:24:49 +00:00
f5dda01f33
Inside the calling convention logic LocVT is always a simple
...
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
llvm-svn: 118167
2010-11-03 11:35:31 +00:00
bc741405a7
If value map does not have register for an argument then try to find frame index before giving up.
...
llvm-svn: 118022
2010-11-02 17:19:03 +00:00
94f2a2578c
Use frameindex, if available, as a last resort to emit debug info for a parameter.
...
llvm-svn: 118020
2010-11-02 17:01:30 +00:00
e8360b7182
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
...
llvm-svn: 117667
2010-10-29 17:29:13 +00:00
e660f4d072
Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
...
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
llvm-svn: 117413
2010-10-26 23:11:10 +00:00
05561e8b7b
Assign source ordering to nodes created for StoreInst.
...
llvm-svn: 117404
2010-10-26 22:14:52 +00:00
0e36e0340a
X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
...
This is needed for indirect calls.
llvm-svn: 117061
2010-10-21 20:49:23 +00:00
83ce5f181f
CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
...
This should be the minimum set of functions that could possibly need it.
llvm-svn: 116978
2010-10-21 00:08:21 +00:00
a94cc6dfe8
Make CodeGen TBAA-aware.
...
llvm-svn: 116890
2010-10-20 00:31:05 +00:00
bbdc5d2ef9
Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
...
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268
llvm-svn: 116879
2010-10-19 23:27:08 +00:00
5e683250ee
X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
...
if any floating point arguments are passed to an external function.
llvm-svn: 116665
2010-10-16 08:25:41 +00:00
d3ea25e66e
Whitespace!
...
llvm-svn: 116664
2010-10-16 08:25:21 +00:00
aadc5596f1
ComputeLinearIndex doesn't need its TLI argument.
...
llvm-svn: 115792
2010-10-06 16:18:29 +00:00
Owen Anderson