Commit Graph

409446 Commits

Author SHA1 Message Date
Matthias Springer 446f0c609f [mlir][linalg][bufferize][NFC] Update comments in BufferizableOpInterface
Differential Revision: https://reviews.llvm.org/D116932
2022-01-10 22:34:26 +09:00
Louis Dionne e6d7b2f0de [libc++] Fix link to bug tracker 2022-01-10 08:33:28 -05:00
Simon Pilgrim 5eb47961c4 [CostModel][X86] Update ROTL/ROTR vXi8/vXi16 costs on AVX512BW targets
Refresh based off recent improvements to codegen and the helper script from D103695
2022-01-10 13:18:25 +00:00
Louis Dionne 49b9b9dc9c [libc++] Fix the documentation and re-enable documentation CI
The documentation CI job is very cheap, so we can afford to keep it
around even with reduced capacity. This commit fixes the documentation
(which had an invalid reference in it) and re-enables that CI step.

Differential Revision: https://reviews.llvm.org/D116897
2022-01-10 08:05:58 -05:00
Matthias Springer cb64c541f9 [mlir][linalg][bufferize][NFC] Clean up bufferization entry point
Differential Revision: https://reviews.llvm.org/D116892
2022-01-10 21:50:36 +09:00
Haojian Wu 37ec65e1d7 [clangd] Enable expand-auto for decltype(auto).
Based on https://reviews.llvm.org/D116919.

Fixes https://github.com/clangd/clangd/issues/121

Differential Revision: https://reviews.llvm.org/D116921
2022-01-10 13:46:56 +01:00
Martin Storsjö 392aa97acc [llvm-objcopy] Implement the PE-COFF specific --subsystem option
This implements the parsing of the highly PE-COFF specific option
in ConfigManager.cpp, setting Optional<> values in COFFConfig, which
then are used in COFFObjcopy.

This should fix https://github.com/mstorsjo/llvm-mingw/issues/239.

Differential Revision: https://reviews.llvm.org/D116556
2022-01-10 14:44:15 +02:00
Tim Northover 581e855623 AArch64: don't claim to preserve registers used by prologue code 2022-01-10 12:27:04 +00:00
Petar Avramovic d9d2516aaf AMDGPU/GlobalISel: Rework legalization for extract/insert vector elt
Use G_MERGE_VALUES and G_UNMERGE_VALUES on vector elements instead of
G_EXTRACT and G_INSERT when doing custom legalization for
G_EXTRACT_VECTOR_ELT and G_INSERT_VECTOR_ELT.
With this approach legalization artifact combiner gets direct access
to all vector elements.

Differential Revision: https://reviews.llvm.org/D116115
2022-01-10 13:15:20 +01:00
Florian Hahn 003ac239d8
[SROA] Reduce the number of times a IRBuilder is constructed (NFC).
This patch reduces the number of times IRBuilders need to be constructed
in SROA.cpp by passing existing ones by reference to the appropriate
places.
2022-01-10 12:09:13 +00:00
Haojian Wu 55d96ac3dc [AST] Add RParen loc for decltype AutoTypeloc.
Differential Revision: https://reviews.llvm.org/D116919
2022-01-10 12:46:27 +01:00
Haojian Wu abe3003ead [AST] Use recovery-expr to preserve incomplete-type-member-access expression.
Fixes https://github.com/clangd/clangd/issues/502

Differential Revision: https://reviews.llvm.org/D116922
2022-01-10 12:45:20 +01:00
Alex Zinenko c44d521b30 [mlir] address post-commit review for D116759 2022-01-10 12:40:58 +01:00
Florian Hahn aecad5828e
[SCEVExpander] Only create trunc when needed.
9345ab3a45 updated generateOverflowCheck to skip creating checks that
always evaluate to false. This in turn means that we only need to
create TruncTripCount if it is actually used.

Sink the TruncTripCount creating into ComputeEndCheck, so it is only
created when there's an actual check.
2022-01-10 11:31:27 +00:00
Jeremy Morse 3a094d8b27 [Dexter] Allow tests to specify command line options
This patch adds a "DexCommandLine" command, allowing dexter tests to
specify what command line options the test should be started with. I've
also plumbed it through into the debuggers.

This eases the matter of pointing Dexter at larger tests, or controlling
different paths through a single binary from a Dexter test.

Differential Revision: https://reviews.llvm.org/D115330
2022-01-10 11:30:06 +00:00
Mubashar Ahmad d17fb46e89 [Clang][AArch64][ARM] PMUv3.4 Option Added
An option has been added to Clang to enable or disable
the PMU v3.4 architecture extension.

Differential Revision: https://reviews.llvm.org/D116748
2022-01-10 11:28:19 +00:00
Sam McCall 1ab13793be [clangd] Include fixer for missing functions in C
A function call `unresolved()` in C will generate an implicit declaration
of the missing function and warn `ext_implicit_function_decl` or so.
(Compared to in C++ where we get `err_undeclared_var_use`).
We want to try to resolve these names.

Unfortunately typo correction is disabled in sema for performance
reasons unless this warning is promoted to error.
(We need typo correction for include-fixer.)
It's not clear to me where a switch to force this correction on should
go, include-fixer is kind of a hack. So hack more by telling sema we're
promoting them to error.

Fixes https://github.com/clangd/clangd/issues/937

Differential Revision: https://reviews.llvm.org/D115490
2022-01-10 12:17:19 +01:00
Alex Zinenko 2f672e2ffa [mlir] Don't inline calls from dead SCCs
During iterative inlining of the functions in a multi-step call chain, the
inliner could add the same call operation several times to the worklist, which
led to use-after-free when this op was considered more than once.

Closes #52887.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D116820
2022-01-10 12:07:14 +01:00
David Green e92d63b467 Revert "[LoopFlatten] Move it to a LoopPassManager"
This commit caused performance regressions due to differences in the
expected code during loop flattening. Reverting it until the fix is
ready, which hopefully wont take too long.

This reverts commit 86825fc2fb.
2022-01-10 11:03:49 +00:00
Stephan Herhut 33cec20dbd [mlir][memref] Tighten verification of memref.reinterpret_cast
We allow the omission of a map in memref.reinterpret_cast under the assumption,
that the cast might cast to an identity layout. This change adds verification
that the static knowledge that is present in the reinterpret_cast supports
this assumption.

Differential Revision: https://reviews.llvm.org/D116601
2022-01-10 11:55:47 +01:00
David Sherwood e3c84fb948 [LoopVectorize] Add support for tail folding using scalable vectors
This patch fixes up an issue with InnerLoopVectorizer::getOrCreateVectorTripCount
whereby we weren't correctly generating the runtime trip count
for scalable vectors when tail-folding.

It also removes some asserts in the tail-folding path for cases when
the VF is not scalable.

In this patch I have only permitted tail-folding to be enabled
explicitly for scalable vectors when the user has specified one
of the following flags:

  -prefer-predicate-over-epilogue=predicate-dont-vectorize
  -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue

For now it's best not to enable tail-folding with scalable vectors for
low trip counts or when optimising for code size, since there has been
no analysis on whether this is worth it.

Various tests have been added here:

  Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
  Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll

The tests cannot be target independent because they require masked
load/store support, i.e. TTI.isLegalMaskedLoad and TTI.isLegalMaskedStore
need to return true.

Differential Revision: https://reviews.llvm.org/D113003
2022-01-10 10:55:40 +00:00
Cullen Rhodes eee993ae4c [AArch64][SVE] Fold predicate into compare
Codegen of added testcase before this patch:

  ptrue   p0.s
  cmpgt   p1.s, p0/z, z0.s, z1.s
  cmpge   p2.s, p0/z, z2.s, z1.s
  and     p0.b, p0/z, p1.b, p2.b
  ret

Patterns originally authored by Will Lovett.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D116749
2022-01-10 10:52:06 +00:00
Shraiysh Vaishay a8586b573e [mlir][OpenMP] Change the syntax of omp.atomic.read op
This patch changes the syntax of omp.atomic.read to take the address of
destination, instead of having the value in a result. This will allow
using omp.atomic.read operation within an omp.atomic.capture operation
thus making its implementation less complex.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D116396
2022-01-10 16:19:45 +05:30
David Sherwood 8e773f4491 [NFC] Add tests for splats of illegal integer vector types
Differential Revision: https://reviews.llvm.org/D116810
2022-01-10 10:37:36 +00:00
Sam McCall 16fd5c2784 [clangd] Support configuration of inlay hints.
The idea is that the feature will always be advertised at the LSP level, but
depending on config we'll return partial or no responses.

We try to avoid doing the analysis for hints we're not going to return.

Examples of syntax:
```
InlayHints:
  Enabled: No
---
InlayHints:
  ParameterNames: No
---
InlayHints:
  ParameterNames: Yes
  DeducedTypes: Yes
```

Differential Revision: https://reviews.llvm.org/D116713
2022-01-10 10:49:35 +01:00
Sam McCall 27ea0c4e72 [Parse] Use empty RecoveryExpr when if/while/do/switch conditions fail to parse
This allows the body to be parsed.
An special-case that would replace a missing if condition with OpaqueValueExpr
was removed as it's now redundant (unless recovery-expr is disabled).

For loops are not handled at this point, as the parsing is more complicated.

Differential Revision: https://reviews.llvm.org/D113752
2022-01-10 10:38:27 +01:00
Florian Hahn ad1b8772cf
[SCEVExpander] Only create multiplication if needed.
9345ab3a45 updated generateOverflowCheck to skip creating checks that
always evaluate to false. This in turn means that we only need to
compute |Step| * Trip count  if the result of the multiplication is
actually used.

Sink the multiplication into ComputeEndCheck, so it is only created
when there's an actual check.
2022-01-10 08:49:25 +00:00
LLVM GN Syncbot 38916195c9 [gn build] Port c0fdc74887 2022-01-10 08:36:39 +00:00
Haojian Wu 4a4b8e4f99 [AST] Add more source information for DecltypeTypeLoc.
Adds the paren source location, and removes the hack in clangd.

Differential Revision: https://reviews.llvm.org/D116793
2022-01-10 09:34:18 +01:00
mydeveloperday 5c2e7c9ca0 [clang-format] Ensure we can correctly parse lambda in the template argument list
https://github.com/llvm/llvm-project/issues/46505

The presence of a lambda in an argument template list ignored the [] as a lambda at all, this caused the contents of the <> to be incorrectly analyzed.

```
struct Y : X < [] {
  return 0;
} > {};
```
Fixes: #46505

Reviewed By: curdeius

Differential Revision: https://reviews.llvm.org/D116806
2022-01-10 08:29:35 +00:00
Lang Hames 5ff916ab72 [ORC][JITLink] Add dependence on OrcShared to JITLink.
JITLink depends on OrcShared as of c0fdc74887. This should fix the build
failure at https://lab.llvm.org/buildbot#builders/61/builds/19796.
2022-01-10 19:25:46 +11:00
Vincent Lee 7a161eb43b [lld-macho] Fix shadowed variable
This fixes a windows build failure from D115416.
2022-01-10 00:20:35 -08:00
Nikita Popov 92d55e7336 [MemoryBuiltins] Remove isNoAliasFn() in favor of isNoAliasCall()
We currently have two similar implementations of this concept:
isNoAliasCall() only checks for the noalias return attribute.
isNoAliasFn() also checks for allocation functions.

We should switch to only checking the attribute. SLC is responsible
for inferring the noalias return attribute for non-new allocation
functions (with a missing case fixed in
348bc76e35).
For new, clang is responsible for setting the attribute,
if -fno-assume-sane-operator-new is not passed.

Differential Revision: https://reviews.llvm.org/D116800
2022-01-10 09:18:15 +01:00
Lang Hames c0fdc74887 [ORC] Add helper functions for running finalize / dealloc actions.
runFinalizeActions takes an AllocActions vector and attempts to run its finalize
actions. If any finalize action fails then all paired dealloc actions up to the
failing pair are run, and the error(s) returned. If all finalize actions succeed
then a vector containing the dealloc actions is returned.

runDeallocActions takes a vector<WrapperFunctionCall> containing dealloc action
calls and runs them all, returning any error(s).

These helpers are intended to simplify the implementation of
JITLinkMemoryManager::InFlightAlloc::finalize and
JITLinkMemoryManager::deallocate overrides by taking care of execution (and
potential roll-back) of allocation actions.
2022-01-10 19:13:58 +11:00
Craig Topper b645bcd98a [RISCV] Generalize (srl (and X, 0xffff), C) -> (srli (slli X, (XLen-16), (XLen-16) + C) optimization.
This can be generalized to (srl (and X, C2), C) ->
(srli (slli X, (XLen-C3), (XLen-C3) + C). Where C2 is a mask with
C3 trailing ones.

This can avoid constant materialization for C2. This is beneficial
even when C2 can be selected to ANDI because the SLLI can become
C.SLLI, but C.ANDI cannot cover all the immediates of ANDI.

This also enables CSE in some cases of i8 sdiv by constant codegen.
2022-01-09 23:37:10 -08:00
Stephen Neuendorffer 3523876873 Fix exported MLIR_TABLEGEN_EXE
LLVM_OPTIMIZED_TABLEGEN results in MLIR_TABLEGEN_EXE pointing to
an absolute path in the build directory.  This doesn't work
when exporting to an install directory.  This patch fixes the exported
information for an install directory to refer to the installed
mlir-tblgen.  (Note that this is probably a debug version if
LLVM_OPTIMIZED_TABLEGEN is set)
2022-01-09 23:27:08 -08:00
Pavel Kosov 34a91d7748 [SchedModels][CortexA55] Fix scheduling of FP loads
Patch fixes scheduling of FP load instructions with pre/post increment adding WriteAdr for address operand.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D116361

OS Laboratory. Huawei Russian Research Institute. Saint-Petersburg
2022-01-10 10:14:45 +03:00
Jonas Devlieghere d232abc33b [lldb] Remove LLDB_RECORD_RESULT macro 2022-01-09 22:54:17 -08:00
Dave Lee c4cdf86569 [lldb] Skip TestTargetXMLArch if no support for x86 target
If LLVM is configured without X86 as one of its TARGETS_TO_BUILD, then lldb
will crash when using X86 disassembler (which it does while running `image
show-unwind`).
2022-01-09 22:40:03 -08:00
Zi Xuan Wu 8ddc816929 [CSKY] Lower leaf DAG node such as global symbol, frame address and jumptable, etc.
Lower global symbols such as call/external symbol.
Lower other leaf DAG node such as frame address/block address/jumptable/vastart.

Normally some leaf symbols need reside in constant pool as ABI prefers, and are addressed by
lrw or jsri instructions.

Every symbol in constant pool is lowered with one entry in target constant pool. The
entry has different type corresponding to different leaf node such as blockaddress,
jumptable, or global value.
2022-01-10 14:35:07 +08:00
Siva Chandra Reddy cd4deef28e [libc] Re-enable thrd_test.
Other threads related tests have been using the API that is tested here
without any problems. The main reason for disabling the test has also been
fixed many months ago.
2022-01-10 06:18:51 +00:00
Dave Lee ed3a4a4948 [lldb] Skip TestVSCode_coreFile if no x86 target support 2022-01-09 22:01:31 -08:00
Jonas Devlieghere d51402ac6b [lldb] Remove reproducer instrumentation
This patch removes most of the reproducer instrumentation. It keeps
around the LLDB_RECORD_* macros for logging. See [1] for more details.

[1] https://lists.llvm.org/pipermail/lldb-dev/2021-September/017045.html

Differential revision: https://reviews.llvm.org/D116847
2022-01-09 21:40:55 -08:00
Dave Lee 4a8549354c [lldb] Guard libstdc++ specific 'frame var' test
While working on D116788 (properly error out of `frame var`), this libstdc++
specific `frame var` invocation was found in the tests. This test is in the
generic directory, but has this one case that requires libstdc++. The fix here
is to put the one `expect()` inside of a condition that checks for libstdc++.

Differential Revision: https://reviews.llvm.org/D116901
2022-01-09 21:37:42 -08:00
Dave Lee aad27a8907 [lldb] Check for arm64 in TestDisassembleRawData
This test checks for `aarch64` but the lit config could also contain `arm64`.
This change adds `arm64` to make the test pass in all cases.

Differential Revision: https://reviews.llvm.org/D116912
2022-01-09 21:36:55 -08:00
Dave Lee 268a42d697 [lldb] Require x86 support for dwo-relative-path test 2022-01-09 21:35:32 -08:00
Craig Topper 296e8cae5c [RISCV] Isel (sra (sext_inreg X, i16), C) -> (srai (slli X, (XLen-16), (XLen-16) + C).
Similar for (sra (sext_inreg X, i8), C).

With Zbb, sext_inreg of i8 and i16 are legal for sext.b and sext.h.
This transform makes the Zbb codegen the same as without Zbb. The
shifts are more compressible. This also exposes an opportunity for
CSE with another slli in the i16 sdiv by constant codegen.
2022-01-09 21:23:43 -08:00
Alexander Shaposhnikov 8acc3b4ab0 [lld][ELF] Support adrp+ldr GOT optimization for AArch64
This diff adds first bits to support relocation relaxations for AArch64
discussed on https://github.com/ARM-software/abi-aa/pull/106.
In particular, the case of

adrp x0, :got: symbol
ldr x0, [x0, :got_lo12: symbol]

is handled.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D112063
2022-01-10 05:20:37 +00:00
jacquesguan 6b8362eb8d [RISCV] Disable EEW=64 for index values when XLEN=32.
Disable EEW=64 for vector index load/store when XLEN=32.

Differential Revision: https://reviews.llvm.org/D106518
2022-01-10 10:51:27 +08:00
jinge90 6fab274275 Control-flow Enforcement Technology (CET), published by Intel, introduces
indirect branch tracking(IBT) feature aiming to ensure the target address
of an indirect jump/call is not tampered.
When IBT is enabled, each function or target of any indirect jump/call will start
with an 'endbr32/64' instruction otherwise the program will crash during execution.
To build an application with CET enabled. we need to ensure:

  1. build the source code with "-fcf-protection=full"
  2. all the libraries linked with .o files must be CET enabled too

This patch aims to enable CET for compiler-rt builtins library, we add an option
"COMPILER_RT_ENABLE_CET" whose default value is OFF to enable CET for compiler-rt
in building time and when this option is "ON", "-fcf-protection=full" is added to
BUILTINS_CFLAG and the "endbr32/64" will be placed in the beginning of each assembly
function. We also enabled CET for crtbegin, crtend object files in this patch.

Reviewed by: MaskRay, compnerd, manojgupta, efriedma
Differential Revision: https://reviews.llvm.org/D109811

Signed-off-by: jinge90 <ge.jin@intel.com>
2022-01-10 11:01:11 +08:00