6 Commits

Author	SHA1	Message	Date
Jonas Paulsson	611b533f1d	[SchedModel] Fix for read advance cycles with implicit pseudo operands. ... The SchedModel allows the addition of ReadAdvances to express that certain operands of the instructions are needed at a later point than the others. RegAlloc may add pseudo operands that are not part of the instruction descriptor, and therefore cannot have any read advance entries. This meant that in some cases the desired read advance was nullified by such a pseudo operand, which still had the original latency. This patch fixes this by making sure that such pseudo operands get a zero latency during DAG construction. Review: Matthias Braun, Ulrich Weigand. https://reviews.llvm.org/D49671 llvm-svn: 345606	2018-10-30 15:04:40 +00:00
Matt Arsenault	ffb132e74b	AMDGPU: Increase default stack alignment ... 8 and 16-byte values are common, so increase the default alignment to avoid realigning the stack in most functions. llvm-svn: 328821	2018-03-29 20:22:04 +00:00
Yaxun Liu	2a22c5deff	[AMDGPU] Switch to the new addr space mapping by default ... This requires corresponding clang change. Differential Revision: https://reviews.llvm.org/D40955 llvm-svn: 324101	2018-02-02 16:07:16 +00:00
Matt Arsenault	a202538bfa	AMDGPU: Remove error on calls for amdgcn ... Repurpose the -amdgpu-function-calls flag. Rather than require it to emit a call, only use it to run the always inline path or not. llvm-svn: 310003	2017-08-03 23:24:05 +00:00
Matt Arsenault	8e8f8f43b0	AMDGPU: Fix clobbering CSR VGPRs when spilling SGPR to it ... llvm-svn: 309783	2017-08-02 01:52:45 +00:00
Matt Arsenault	b62a4eb524	AMDGPU: Initial implementation of calls ... Includes a hack to fix the type selected for the GlobalAddress of the function, which will be fixed by changing the default datalayout to use generic pointers for 0. llvm-svn: 309732	2017-08-01 19:54:18 +00:00