Commit Graph

139666 Commits

Author SHA1 Message Date
Michael Kuperstein b2443ed62b [X86] Enable interleaved memory access by default
This lets the loop vectorizer generate interleaved memory accesses on x86.

Differential Revision: https://reviews.llvm.org/D25350

llvm-svn: 284779
2016-10-20 21:04:31 +00:00
Daniel Berlin cd2deacac6 [MSSA] Avoid unnecessary use walks when calling getClobberingMemoryAccess
Summary:
This allows us to mark when uses have been optimized.
This lets us avoid rewalking (IE when people call getClobberingAccess on everything), and also
enables us to later relax the requirement of use optimization during updates with less cost.

Reviewers: george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25172

llvm-svn: 284771
2016-10-20 20:13:45 +00:00
Kevin Enderby c8bb42283e Another additional error check for invalid Mach-O files for the
load commands that use the MachO::twolevel_hints_command type
which includes only the LC_TWOLEVEL_HINTS load command.

This is not used in llvm libObject code or in llvm tool code.  But
does appear in one of the binary test files.  While this load command is
obsolete it is easier to add code for it in libObject than edit or change
the binary test case.

llvm-svn: 284769
2016-10-20 20:10:30 +00:00
Zachary Turner 6e2c89b54a Fix case of file include path.
llvm-svn: 284763
2016-10-20 18:34:37 +00:00
Zachary Turner 4d49eb9fa0 [CodeView] Refactor serialization to use StreamInterface.
This was all using ArrayRef<>s before which presents a problem
when you want to serialize to or deserialize from an actual
PDB stream.  An ArrayRef<> is really just a special case of
what can be handled with StreamInterface though (e.g. by using
a ByteStream), so changing this to use StreamInterface allows
us to plug in a PDB stream and get all the record serialization
and deserialization for free on a MappedBlockStream.

Subsequent patches will try to remove TypeTableBuilder and
TypeRecordBuilder in favor of class that operate on
Streams as well, which should allow us to completely merge
the reading and writing codepaths for both types and symbols.

Differential Revision: https://reviews.llvm.org/D25831

llvm-svn: 284762
2016-10-20 18:31:19 +00:00
Konstantin Zhuravlyov 521e5ef4ce [AMDGPU] Make note record name a static const member of target streamer
Differential Revision: https://reviews.llvm.org/D25746

llvm-svn: 284760
2016-10-20 18:22:36 +00:00
Konstantin Zhuravlyov 08326b6256 [AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)
Differential Revision: https://reviews.llvm.org/D25693

llvm-svn: 284759
2016-10-20 18:12:38 +00:00
Dehao Chen f03f51555a Using branch probability to guide critical edge splitting.
Summary:
The original heuristic to break critical edge during machine sink is relatively conservertive: when there is only one instruction sinkable to the critical edge, it is likely that the machine sink pass will not break the critical edge. This leads to many speculative instructions executed at runtime. However, with profile info, we could model the splitting benefits: if the critical edge has 50% taken rate, it would always be beneficial to split the critical edge to avoid the speculated runtime instructions. This patch uses profile to guide critical edge splitting in machine sink pass.

The performance impact on speccpu2006 on Intel sandybridge machines:

spec/2006/fp/C++/444.namd                  25.3  +0.26%
spec/2006/fp/C++/447.dealII               45.96  -0.10%
spec/2006/fp/C++/450.soplex               41.97  +1.49%
spec/2006/fp/C++/453.povray               36.83  -0.96%
spec/2006/fp/C/433.milc                   23.81  +0.32%
spec/2006/fp/C/470.lbm                    41.17  +0.34%
spec/2006/fp/C/482.sphinx3                48.13  +0.69%
spec/2006/int/C++/471.omnetpp             22.45  +3.25%
spec/2006/int/C++/473.astar               21.35  -2.06%
spec/2006/int/C++/483.xalancbmk           36.02  -2.39%
spec/2006/int/C/400.perlbench              33.7  -0.17%
spec/2006/int/C/401.bzip2                  22.9  +0.52%
spec/2006/int/C/403.gcc                   32.42  -0.54%
spec/2006/int/C/429.mcf                   39.59  +0.19%
spec/2006/int/C/445.gobmk                 26.98  -0.00%
spec/2006/int/C/456.hmmer                 24.52  -0.18%
spec/2006/int/C/458.sjeng                 28.26  +0.02%
spec/2006/int/C/462.libquantum            55.44  +3.74%
spec/2006/int/C/464.h264ref               46.67  -0.39%

geometric mean                                   +0.20%

Manually checked 473 and 471 to verify the diff is in the noise range.

Reviewers: rengolin, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24818

llvm-svn: 284757
2016-10-20 18:06:52 +00:00
Simon Pilgrim 365be4f95c [CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv uniformconst costs for 256/512 bit integer vectors
We weren't checking for uniform const costs before the general cost, resulting in very high estimates.

llvm-svn: 284755
2016-10-20 18:00:35 +00:00
Pirama Arumuga Nainar 05b0f93ad3 Fix *_EXTEND_VECTOR_INREG legalization
Summary:
While promoting *_EXTEND_VECTOR_INREG nodes whose inputs are already
promoted, perform the appropriate sign extension for the promoted node
before doing the *_EXTEND_VECTOR_INREG operation.  If not, the undefined
high-order bits of the promoted operand may (a) be garbage inc ase of
zext) or (b) contribute the wrong sign-bit (in case of sext)

Updated the promote-vec3.ll test after this change.  The diff shows
explicit zeroing in case of zext and intermediate sign extension in case
of sext.

Reviewers: RKSimon

Subscribers: llvm-commits, srhines

Differential Revision: https://reviews.llvm.org/D25790

llvm-svn: 284752
2016-10-20 17:56:36 +00:00
Simon Pilgrim 1388c0acc1 [CostModel][X86] Added tests for sdiv/udiv costs for uniform const and uniform const power-of-2
Shows poor costings in AVX1/AVX512BW for certain vector types

llvm-svn: 284748
2016-10-20 17:16:38 +00:00
Sanjay Patel 0051efcf97 [Target] remove TargetRecip class; 2nd try
This is a retry of r284495 which was reverted at r284513 due to use-after-scope bugs
caused by faulty usage of StringRef.

This version also renames a pair of functions:
getRecipEstimateDivEnabled()
getRecipEstimateSqrtEnabled()
as suggested by Eric Christopher.

original commit msg:

[Target] remove TargetRecip class; move reciprocal estimate isel functionality to TargetLowering

This is a follow-up to https://reviews.llvm.org/D24816 - where we changed reciprocal estimates to be function attributes
rather than TargetOptions.

This patch is intended to be a structural, but not functional change. By moving all of the
TargetRecip functionality into TargetLowering, we can remove all of the reciprocal estimate
state, shield the callers from the string format implementation, and simplify/localize the
logic needed for a target to enable this.

If a function has a "reciprocal-estimates" attribute, those settings may override the target's
default reciprocal preferences for whatever operation and data type we're trying to optimize.
If there's no attribute string or specific setting for the op/type pair, just use the target
default settings.

As noted earlier, a better solution would be to move the reciprocal estimate settings to IR
instructions and SDNodes rather than function attributes, but that's a multi-step job that
requires infrastructure improvements. I intend to work on that, but it's not clear how long
it will take to get all the pieces in place.

Differential Revision: https://reviews.llvm.org/D25440

llvm-svn: 284746
2016-10-20 16:55:45 +00:00
Benjamin Kramer d65ec2ceb2 Put the move ctor for PassManager back for now, it breaks some builds.
For some reason using the default move ctor creates undefined references
to it.

llvm-svn: 284745
2016-10-20 16:50:07 +00:00
Simon Pilgrim 025e26dd32 [CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv general costs for 256/512 bit integer vectors
We weren't accounting for legal types on every subtarget, meaning that many of the costs were using defaults.

We still don't correctly cost (or test) the 512-bit sdiv/udiv by uniform const cases, nor the power-of-2 cases.

llvm-svn: 284744
2016-10-20 16:39:11 +00:00
Valery Pykhtin e55fd41f73 [AMDGPU] add fcopysign(f64, f32) pattern
Differential revision: https://reviews.llvm.org/D25827

llvm-svn: 284743
2016-10-20 16:17:54 +00:00
Benjamin Kramer b667ef79ea [Support] Put back the MSVC hack for AlignedCharArray.
MSVC 2015 still errors when passing an alignas'd object by value as an
argument.

llvm-svn: 284738
2016-10-20 15:53:04 +00:00
Benjamin Kramer abe323ef8e [Support] Remove llvm::alignOf now that all uses are gone.
Also clean up the legacy hacks for AlignedCharArray. I'm keeping
LLVM_ALIGNAS alive for a bit longer because GCC 4.8.0 (which we still
support apparently) shipped a buggy alignas(). All other supported
compilers have a working alignas.

llvm-svn: 284736
2016-10-20 15:36:38 +00:00
Benjamin Kramer b2505005c7 Retire llvm::alignOf in favor of C++11 alignof.
No functionality change intended.

llvm-svn: 284733
2016-10-20 15:02:18 +00:00
Benjamin Kramer 26b2593b24 [GVN] Use defaulted members. No functional change.
llvm-svn: 284726
2016-10-20 13:09:12 +00:00
Simon Dardis 226752c15d [mips][mcjit] Add the majority of N32 support.
The missing piece is relocation composition for %hi(%neg(%gp_rel(x))) and
similar.

Patch by: Daniel Sanders

llvm-svn: 284724
2016-10-20 13:02:23 +00:00
Simon Pilgrim 16cc616ebc [CostModel][X86] Added tests for sdiv/udiv costs for scalar and 128/256/512 bit integer vectors
Shows current bug in AVX1/AVX512BW costs for 256 bit vector types

llvm-svn: 284723
2016-10-20 12:34:00 +00:00
Benjamin Kramer 2a8bef8769 Do a sweep over move ctors and remove those that are identical to the default.
All of these existed because MSVC 2013 was unable to synthesize default
move ctors. We recently dropped support for it so all that error-prone
boilerplate can go.

No functionality change intended.

llvm-svn: 284721
2016-10-20 12:20:28 +00:00
Pavel Labath 59838f7ea6 Reapply "Add Chrono.h - std::chrono support header"
This is a resubmission of r284590. The mingw build should be fixed now. The
problem was we were matching time_t with _localtime_64s, which was incorrect on
_USE_32BIT_TIME_T systems. Instead I use localtime_s, which should always
evaluate to the correct function.

llvm-svn: 284720
2016-10-20 12:05:50 +00:00
Simon Pilgrim 618d3aedaf [DAGCombiner] Add general constant vector support to (srl (shl x, c), c) -> (and x, cst2)
We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector

llvm-svn: 284717
2016-10-20 11:10:21 +00:00
Simon Pilgrim 46aa89399d Wdocumentation fix
llvm-svn: 284715
2016-10-20 10:53:38 +00:00
Simon Pilgrim 25059360d5 Fix spelling mistake in comment.
llvm-svn: 284714
2016-10-20 10:42:14 +00:00
Simon Pilgrim 071da46a35 Fix MSVC bool -> uint64_t promotion warning
llvm-svn: 284713
2016-10-20 10:37:58 +00:00
Benjamin Kramer 656d821aa8 [Go bindings] Update for r284678 API changes.
Alignment moved from createBasicType to createAutoVariable.

llvm-svn: 284707
2016-10-20 09:14:39 +00:00
Jonas Paulsson 8010b631d5 [SystemZ] Post-RA scheduler implementation
Post-RA sched strategy and scheduling instruction annotations for z196, zEC12
and z13.

This scheduler optimizes decoder grouping and balances processor resources
(including side steering the FPd unit instructions).

The SystemZHazardRecognizer keeps track of the scheduling state, which can
be dumped with -debug-only=misched.

Reviers: Ulrich Weigand, Andrew Trick.
https://reviews.llvm.org/D17260

llvm-svn: 284704
2016-10-20 08:27:16 +00:00
George Rimar de69e9f5db [Object/ELF] - Check index argument in getSymbol().
Without this check LLD crashes when SHT_GROUP section has invalid symbol index
because of next code:

template <class ELFT>
StringRef elf::ObjectFile<ELFT>::getShtGroupSignature(const Elf_Shdr &Sec) {
..
  const Elf_Sym *Sym = Obj.getSymbol(Symtab, Sec.sh_info);
..
}
If sh_info is too large, &Symbols[Index] just asserts.

No testcases provided because llvm-objdump/llvm-readelf does 
not use getSymbol() function.

I`ll commit testcase for LLD separatelly.

Differential revision: https://reviews.llvm.org/D25516

llvm-svn: 284702
2016-10-20 08:03:10 +00:00
Peter Collingbourne c7766778a0 X86: Allow expressions to appear as u8imm operands.
llvm-svn: 284688
2016-10-20 01:58:34 +00:00
Peter Collingbourne de1f039360 X86: Deduplicate some lowering code. NFCI.
llvm-svn: 284686
2016-10-20 01:21:26 +00:00
Victor Leschuk 2461a2e2c5 DebugInfo: remove broken bitcode upgrade test
llvm-svn: 284682
2016-10-20 00:26:36 +00:00
Reid Kleckner 40d7230f2f Use __func__ directly now that all supported compilers support it
Remove the portability macro now that it is unused.

llvm-svn: 284681
2016-10-20 00:22:23 +00:00
Victor Leschuk 2ede126b1b DebugInfo: preparation to implement DW_AT_alignment
- Add alignment attribute to DIVariable family
 - Modify bitcode format to match new DIVariable representation
 - Update tests to match these changes (also add bitcode upgrade test)
 - Expect that frontend passes non-zero align value only when it is not default
   (was forcibly aligned by alignas()/_Alignas()/__atribute__(aligned())

Differential Revision: https://reviews.llvm.org/D25073

llvm-svn: 284678
2016-10-20 00:13:12 +00:00
Derek Schuff 7edf93bc5b [WebAssembly] Update extending load test for new i1 behavior
r284611 changed the behavior of the DAG legalizer for sign-extending i1
values. Update the wasm extending load test to match.

llvm-svn: 284677
2016-10-20 00:10:34 +00:00
Reid Kleckner 990504e625 Remove LLVM_NOEXCEPT and replace it with noexcept
Now that we have dropped MSVC 2013, all supported compilers support
noexcept and we can drop this portability macro.

llvm-svn: 284672
2016-10-19 23:52:38 +00:00
Kevin Enderby 210030ba95 Next set of additional error checks for invalid Mach-O files for the
load commands that use the MachO::thread_command type
but are not used in llvm libObject code but used in llvm tool code.

This includes the LC_UNIXTHREAD and LC_THREAD
load commands.

A quick note about the philosophy of the error checking in
libObject for Mach-O files, the idea behind the checking is
that we never will return a Mach-O file out of libObject that
contains unknown things in the load commands.

To do this the 32-bit ARM and PPC general tread states
needed to be defined as two test case binaries contained
them.  If other thread states for other CPUs need to be
added we will do that as needed.

Going forward the LC_MAIN load command is used to
set the entry point in Mach-O executables these days
instead of an LC_UNIXTHREAD as was done in the past.
So today only in core files are LC_THREAD load commands
and thread states usually found.

Other thread states have not yet been defined in
include/Support/MachO.h at this time.  But that can be
added as needed with their corresponding checking also
added.

llvm-svn: 284668
2016-10-19 23:44:34 +00:00
Reid Kleckner e1d6998f5d Update Compiler.h to fail fast when building with MSVC 2013
llvm-svn: 284665
2016-10-19 23:34:58 +00:00
Rong Xu fe90d86c8e [PGO] Fix a use-after-move. NFC.
llvm-svn: 284664
2016-10-19 23:31:59 +00:00
Reid Kleckner 98508a8344 Revert "DenseSet: Appease msc18 to define derived constructors explicitly."
This reverts commit r284570. MSVC 18 / 2013 is not supported anymore.

llvm-svn: 284661
2016-10-19 23:04:57 +00:00
Reid Kleckner 6130a2df5c Update docs to reflect new minimum MSVC version requirement
Mailing list discussion about this:
http://lists.llvm.org/pipermail/llvm-dev/2016-September/104631.html

Code changes to simplify the ifdefs will come next, and can be reverted
without affecting the policy if someone needs it.

llvm-svn: 284660
2016-10-19 23:04:41 +00:00
Rong Xu 2c684cfd94 [PGO] Fix bogus warning for merging empty llvm profile file
Profile runtime can generate an empty raw profile (when there is no function in
the shared library). This empty profile is treated as a text format profile.  A
test format profile without the flag of "#IR" is thought to be a clang
generated profile.  So in llvm profile merging, we will get a bogus warning of
"Merge IR generated profile with Clang generated profile."

The fix here is to skip the empty profile (when the buffer size is 0) for
profile merge.

Reviewers: vsk, davidxl

Differential Revision: http://reviews.llvm.org/D25687

llvm-svn: 284659
2016-10-19 22:51:17 +00:00
Lang Hames 1009b0b30f [BuildingAJIT] Use the remote target triple to construct the TargetMachine in
Chapter 5.

Chapter 5 demonstrates remote JITing: code is executed on the remote, not the
machine running the REPL, so it's the remote's triple (and TargetMachine) that
we need.

llvm-svn: 284657
2016-10-19 22:41:03 +00:00
Mehdi Amini db46b7d217 Add computeHostNumPhysicalCores() implementation for Darwin
Differential Revision: https://reviews.llvm.org/D25800

llvm-svn: 284656
2016-10-19 22:36:07 +00:00
Wei Ding 3cb2a1e8d1 AMDGPU : Add a function to enable and disable IEEEBit for SC and shader
respectively.

Differential Revision: http://reviews.llvm.org/D25789

llvm-svn: 284655
2016-10-19 22:34:49 +00:00
Lang Hames 412d045e81 Remove the JIT EH/small code model tests for now.
These tests rely on two sections being allocated with a limited displacement
from one to the other to work. We've never guaranteed this, and consequently
these tests usually fail. That led to them being XFAILed, but now they XPASS
whenever the sections do happen to be allocated nearby in memory. So I'm
removing these for now to get rid of the noise. We can re-instate them if/when
we take the time to implement a displacement-respecting allocator.

llvm-svn: 284654
2016-10-19 22:19:38 +00:00
Chris Bieneman 4646fe0ac9 [CMake] Make the runtimes directory work with bootstrap builds
This patch builds on clang r284648, and allows the runtime directory to make the bootstrap builds depend on the builtin libraries.

This patch also make the bootstrap build depend on configuring the other runtimes because the libcxx headers are copied during configuration. I have left a TODO in the code to remove that once I come up with a better solution.

llvm-svn: 284650
2016-10-19 21:50:25 +00:00
Sanjay Patel efd8885772 [InstSimplify] fold negation of sign-bit
0 - X --> X, if X is 0 or the minimum signed value
0 - X --> 0, if X is 0 or the minimum signed value and the sub is NSW

I noticed this pattern might be created in the backend after the change from D25485, 
so we'll want to add a similar fold for the DAG.

The use of computeKnownBits in InstSimplify may be something to investigate if the
compile time of InstSimplify is noticeable. We could replace computeKnownBits with 
specific pattern matchers or limit the recursion.

Differential Revision: https://reviews.llvm.org/D25785

llvm-svn: 284649
2016-10-19 21:23:45 +00:00
Lang Hames 9ca9a31948 [BuildingAJIT] Make the chapter 5 server export symbols.
This will allow chapter 5 to work on Linux.

llvm-svn: 284637
2016-10-19 20:22:12 +00:00