Devang Patel
116a9d7c38
Merge .debug_loc entries whenever possible to reduce debug_loc size.
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llvm-svn: 124904
2011-02-04 22:57:18 +00:00
Nick Lewycky
d650b30488
Mark that the return is using EAX so that we don't use it for some other
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purpose. Fixes PR9080!
llvm-svn: 124903
2011-02-04 22:44:08 +00:00
Devang Patel
26ffa01889
DebugLoc associated with a machine instruction is used to emit location entries. DebugLoc associated with a DBG_VALUE is used to identify lexical scope of the variable. After register allocation, while inserting DBG_VALUE remember original debug location for the first instruction and reuse it, otherwise dwarf writer may be mislead in identifying the variable's scope.
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llvm-svn: 124845
2011-02-04 01:43:25 +00:00
Rafael Espindola
f5754b851c
Add -march to fix the bots.
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llvm-svn: 124774
2011-02-03 04:21:01 +00:00
Rafael Espindola
d11311f291
Fix PR9127 by reversing the operands even if they have more then one use.
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Reversing the operands allows us to fold, but doesn't force us to. Also, at
this point the DAG is still being optimized, so the check for hasOneUse is not
very precise.
llvm-svn: 124773
2011-02-03 03:58:05 +00:00
Devang Patel
56cc5fdf09
Keep track of incoming argument's location while emitting LiveIns.
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llvm-svn: 124611
2011-01-31 21:38:14 +00:00
Benjamin Kramer
946e1522b6
Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off.
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This happens all the time when a smul is promoted to a larger type.
On x86-64 we now compile "int test(int x) { return x/10; }" into
movslq %edi, %rax
imulq $1717986919, %rax, %rax
movq %rax, %rcx
shrq $63, %rcx
sarq $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax"
addl %ecx, %eax
This fires 96 times in gcc.c on x86-64.
llvm-svn: 124559
2011-01-30 16:38:43 +00:00
Evan Cheng
d983eba7dc
Re-apply r124518 with fix. Watch out for invalidated iterator.
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llvm-svn: 124526
2011-01-29 04:46:23 +00:00
Evan Cheng
65b8ccf6ac
Revert r124518. It broke Linux self-host.
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llvm-svn: 124522
2011-01-29 02:43:04 +00:00
Evan Cheng
d4eff31476
Re-commit r124462 with fixes. Tail recursion elim will now dup ret into unconditional predecessor to enable TCE on demand.
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llvm-svn: 124518
2011-01-29 01:29:26 +00:00
Evan Cheng
aaa9606b2f
Revert r124462. There are a few big regressions that I need to fix first.
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llvm-svn: 124478
2011-01-28 07:12:38 +00:00
Rafael Espindola
2f72a84284
Add a triple.
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llvm-svn: 124471
2011-01-28 03:57:55 +00:00
Rafael Espindola
6c17d54891
Print the visibility of declarations.
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llvm-svn: 124468
2011-01-28 03:20:10 +00:00
Evan Cheng
417fca86c4
- Stop simplifycfg from duplicating "ret" instructions into unconditional
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branches. PR8575, rdar://5134905, rdar://8911460.
- Allow codegen tail duplication to dup small return blocks after register
allocation is done.
llvm-svn: 124462
2011-01-28 02:19:21 +00:00
NAKAMURA Takumi
0cfdac078e
Target/X86: Tweak win64's tailcall.
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llvm-svn: 124272
2011-01-26 02:04:09 +00:00
NAKAMURA Takumi
9d29eff198
Fix whitespace.
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llvm-svn: 124270
2011-01-26 02:03:37 +00:00
Devang Patel
70f8e5962a
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
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llvm-svn: 124203
2011-01-25 18:09:58 +00:00
Devang Patel
533479544b
Speculatively revert r124138.
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llvm-svn: 124142
2011-01-24 20:04:37 +00:00
Devang Patel
8cc5355c90
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
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llvm-svn: 124138
2011-01-24 19:24:37 +00:00
Chris Lattner
bf638d2a0d
fix a missing shuffle pattern, PR9009. Patch by Artiom Myaskouvskey!
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llvm-svn: 124102
2011-01-24 03:42:46 +00:00
Eric Christopher
785db078b4
Expand invalid return values for umulo and smulo. Handle these similarly
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to add/sub by doing the normal operation and then checking for overflow
afterwards. This generally relies on the DAG handling the later invalid
operations as well.
Fixes the 64-bit part of rdar://8622122 and rdar://8774702.
llvm-svn: 123908
2011-01-20 08:54:28 +00:00
Benjamin Kramer
45d183ccf0
Fix an off-by-one error in ctpop combining.
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llvm-svn: 123664
2011-01-17 18:00:28 +00:00
Benjamin Kramer
24c5184dca
Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.
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This shaves off 4 popcounts from the hacked 186.crafty source.
This is enabled even when a native popcount instruction is available. The
combined code is one operation longer but it should be faster nevertheless.
llvm-svn: 123621
2011-01-17 12:04:57 +00:00
Rafael Espindola
ec517cdf24
Update tests.
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llvm-svn: 123591
2011-01-16 18:02:57 +00:00
Chris Lattner
35a2e65bcb
fix PR8514, a bug where the "heroic" transformation of shift/and
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into and/shift would cause nodes to move around and a dangling pointer
to happen. The code tried to avoid this with a HandleSDNode, but
got the details wrong.
llvm-svn: 123578
2011-01-16 08:48:11 +00:00
Chris Lattner
218092e68e
fix PR8981, a crash trying to form a conditional inc with a floating point compare.
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llvm-svn: 123560
2011-01-16 02:56:53 +00:00
Chris Lattner
2d186574a6
reapply my fix for PR8961 with a tweak to properly handle
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multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
llvm-svn: 123559
2011-01-16 02:27:38 +00:00
Chris Lattner
e93e4f118c
revert my fastisel patch again which apparently still gives the
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llvm-gcc-i386-linux-selfhost buildbot heartburn...
llvm-svn: 123431
2011-01-14 06:14:33 +00:00
Chris Lattner
5ca1391003
reapply r123414 now that the botz are calmed down and the fix is already in.
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llvm-svn: 123427
2011-01-14 04:24:28 +00:00
Chris Lattner
21a64979f1
r123414 broke llvm-gcc bootstrap apparently, revert
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llvm-svn: 123422
2011-01-14 02:07:32 +00:00
Chris Lattner
0c34cb429e
fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
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after sext's generated for addressing that got folded. Previously we compiled
test5 into:
_test5: ## @test5
## BB#0:
movq -8(%rsp), %rax ## 8-byte Reload
movq (%rdi,%rax), %rdi
addq %rdx, %rdi
movslq %esi, %rax
movq %rax, -8(%rsp) ## 8-byte Spill
movq %rdi, %rax
ret
which is insane and wrong. Now we produce:
_test5: ## @test5
## BB#0:
movslq %esi, %rax
movq (%rdi,%rax), %rax
addq %rdx, %rax
ret
llvm-svn: 123414
2011-01-14 00:01:01 +00:00
Eric Christopher
da2d2f4d1f
Experiment with changing the default 32-bit linux stack alignment to
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16 bytes for PR8969. Update all testcases accordingly.
llvm-svn: 123367
2011-01-13 06:47:10 +00:00
Jakob Stoklund Olesen
74ded57bb8
Try again enabling LiveDebugVariables.
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llvm-svn: 123342
2011-01-12 23:36:21 +00:00
Jakob Stoklund Olesen
43812bfa92
The world is not ready for LiveDebugVariables yet.
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llvm-svn: 123290
2011-01-11 23:20:33 +00:00
Jakob Stoklund Olesen
8c98495f43
Enable LiveDebugVariables by default.
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llvm-svn: 123282
2011-01-11 22:45:28 +00:00
Dale Johannesen
d2b48119b0
Fix PR 8916 (qv for analysis), at least the immediate problem.
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There's an inherent tension in DAGCombine between assuming
that things will be put in canonical form, and the Depth
mechanism that disables transformations when recursion gets
too deep. It would not surprise me if there's a lot of little
bugs like this one waiting to be discovered. The mechanism
seems fragile and I'd suggest looking at it from a design viewpoint.
llvm-svn: 123191
2011-01-10 21:53:07 +00:00
Evan Cheng
078b0b095e
Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.
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llvm-svn: 123048
2011-01-08 01:24:27 +00:00
Evan Cheng
6eb516dbea
Do not model all INLINEASM instructions as having unmodelled side effects.
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Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
llvm-svn: 123044
2011-01-07 23:50:32 +00:00
Devang Patel
acbee0b0d9
Speculatively revert r123032.
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llvm-svn: 123039
2011-01-07 22:33:41 +00:00
Devang Patel
6381e1584c
Appropriately truncate debug info range in dwarf output.
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Enable live debug variables pass.
llvm-svn: 123032
2011-01-07 21:30:41 +00:00
Evan Cheng
a048c83fe4
Revert r122955. It seems using movups to lower memcpy can cause massive regression (even on Nehalem) in edge cases. I also didn't see any real performance benefit.
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llvm-svn: 123015
2011-01-07 19:35:30 +00:00
Benjamin Kramer
1ec7ecce86
Try to unbreak the arm buildbot.
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llvm-svn: 122999
2011-01-07 11:35:21 +00:00
Duncan Sands
61c5708b51
Fix the other problem reported in PR8582. Testcase and patch by
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Nadav Rotem.
llvm-svn: 122983
2011-01-06 23:45:22 +00:00
Evan Cheng
7998b1d6fe
Use movups to lower memcpy and memset even if it's not fast (like corei7).
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The theory is it's still faster than a pair of movq / a quad of movl. This
will probably hurt older chips like P4 but should run faster on current
and future Intel processors. rdar://8817010
llvm-svn: 122955
2011-01-06 07:58:36 +00:00
Evan Cheng
3ae2b79aa3
Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy
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etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.
llvm-svn: 122952
2011-01-06 06:52:41 +00:00
Evan Cheng
c052ba7ff3
Revert r122936. I'll re-implement the change.
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llvm-svn: 122949
2011-01-06 06:17:53 +00:00
Bill Wendling
2b898548e8
Fix test to coincide with r122934 change from PR8919.
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llvm-svn: 122937
2011-01-06 01:09:35 +00:00
Evan Cheng
06536e7158
r105228 reduced the memcpy / memset inline limit to 4 with -Os to avoid blowing
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up freebsd bootloader. However, this doesn't make much sense for Darwin, whose
-Os is meant to optimize for size only if it doesn't hurt performance.
rdar://8821501
llvm-svn: 122936
2011-01-06 01:04:47 +00:00
Evan Cheng
ac730dd2d1
Avoid zero extend bit test operands to pointer type if all the masks fit in
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the original type of the switch statement key.
rdar://8781238
llvm-svn: 122935
2011-01-06 01:02:44 +00:00
Evan Cheng
260acf32ee
Optimize:
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r1025 = s/zext r1024, 4
r1026 = extract_subreg r1025, 4
to:
r1026 = copy r1024
llvm-svn: 122925
2011-01-05 23:06:49 +00:00