Commit Graph

214 Commits

Author SHA1 Message Date
Jason Molenda 5a87c0fb37 Update the checks in EmulateInstructionARM::GetFramePointerRegisterNumber
and EmulateInstructionARM::GetFramePointerDWARFRegisterNumber to recognize
the Apple arm convention (of using r7 for the frame pointer, regardless of
thumb or arm) even if the OS does not match Darwin/MacOSX/iOS.  Also 
corrects the behavior for thumb code on non-Apple platforms.
<rdar://problem/14661537> 

llvm-svn: 198648
2014-01-06 23:39:35 +00:00
Ed Maste 90359963ab Handle endianness in the Opcode class
Previously, an opcode set via SetOpcode32 (for example) was later
extracted via GetData() as a byte sequence in host order rather than
target order.

Review: http://llvm-reviews.chandlerc.com/D1838
llvm-svn: 196808
2013-12-09 19:45:33 +00:00
Ed Maste eefd43f331 Fix header comment line length
llvm-svn: 194397
2013-11-11 18:30:28 +00:00
Jason Molenda b57e4a1bc6 Roll back the changes I made in r193907 which created a new Frame
pure virtual base class and made StackFrame a subclass of that.  As
I started to build on top of that arrangement today, I found that it
wasn't working out like I intended.  Instead I'll try sticking with
the single StackFrame class -- there's too much code duplication to
make a more complicated class hierarchy sensible I think.

llvm-svn: 193983
2013-11-04 09:33:30 +00:00
Jason Molenda f23bf7432c Add a new base class, Frame. It is a pure virtual function which
defines a protocol that all subclasses will implement.  StackFrame
is currently the only subclass and the methods that Frame vends are
nearly identical to StackFrame's old methods.

Update all callers to use Frame*/Frame& instead of pointers to
StackFrames.

This is almost entirely a mechanical change that touches a lot of
the code base so I'm committing it alone.  No new functionality is
added with this patch, no new subclasses of Frame exist yet.

I'll probably need to tweak some of the separation, possibly moving
some of StackFrame's methods up in to Frame, but this is a good
starting point.

<rdar://problem/15314068>

llvm-svn: 193907
2013-11-02 02:23:02 +00:00
Ed Maste d45f88b4d0 Correct typo: Intructions -> Instructions
llvm-svn: 191972
2013-10-04 19:01:18 +00:00
Joerg Sonnenberger 340a17595e Convert to UNIX line endings.
llvm-svn: 191367
2013-09-25 10:37:32 +00:00
Virgile Bello ee5f7b7438 Rename EmulationStateARM::sd_regs to avoid name clash (MSVC).
llvm-svn: 189366
2013-08-27 16:24:28 +00:00
Sean Callanan 70c86e1781 Fixed the instruction emulation so that it doesn't
print to standard output as part of normal
operation.

<rdar://problem/14247606>

llvm-svn: 184797
2013-06-25 00:32:45 +00:00
Andy Gibbs 70f94f9712 Fix some more mismatched integer types causing compiler warnings.
llvm-svn: 184737
2013-06-24 14:04:57 +00:00
Filipe Cabecinhas f104a830d4 Update countTrailingZeros function usage to match llvm's r182667.
llvm-svn: 182683
2013-05-24 22:24:17 +00:00
Greg Clayton 57abc5d6a6 <rdar://problem/13854277>
<rdar://problem/13594769>

Main changes in this patch include:
- cleanup plug-in interface and use ConstStrings for plug-in names
- Modfiied the BSD Archive plug-in to be able to pick out the correct .o file when .a files contain multiple .o files with the same name by using the timestamp
- Modified SymbolFileDWARFDebugMap to properly verify the timestamp on .o files it loads to ensure we don't load updated .o files and cause problems when debugging

The plug-in interface changes:

Modified the lldb_private::PluginInterface class that all plug-ins inherit from:

Changed:

virtual const char * GetPluginName() = 0;

To: 

virtual ConstString GetPluginName() = 0;

Removed:

virtual const char * GetShortPluginName() = 0;

- Fixed up all plug-in to adhere to the new interface and to return lldb_private::ConstString values for the plug-in names. 
- Fixed all plug-ins to return simple names with no prefixes. Some plug-ins had prefixes and most ones didn't, so now they all don't have prefixed names, just simple names like "linux", "gdb-remote", etc.

llvm-svn: 181631
2013-05-10 21:47:16 +00:00
Greg Clayton 7b0992d9cd After discussing with Chris Lattner, we require C++11, so lets get rid of the macros and just use C++11.
llvm-svn: 179805
2013-04-18 22:45:39 +00:00
Greg Clayton e01e07b6e7 Since we use C++11, we should switch over to using std::unique_ptr when C++11 is being used. To do this, we follow what we have done for shared pointers and we define a STD_UNIQUE_PTR macro that can be used and it will "do the right thing". Due to some API differences in std::unique_ptr and due to the fact that we need to be able to compile without C++11, we can't use move semantics so some code needed to change so that it can compile with either C++.
Anyone wanting to use a unique_ptr or auto_ptr should now use the "STD_UNIQUE_PTR(TYPE)" macro.

llvm-svn: 179779
2013-04-18 18:10:51 +00:00
Daniel Malea 23720cc66c Adding CMake build system to LLDB. Some known issues remain:
- generate-vers.pl has to be called by cmake to generate the version number
- parallel builds not yet supported; dependency on clang must be explicitly specified

Tested on Linux.
- Building on Mac will require code-signing logic to be implemented.
- Building on Windows will require OS-detection logic and some selective directory inclusion

Thanks to Carlo Kok (who originally prepared these CMakefiles for Windows) and Ben Langmuir
who ported them to Linux!

llvm-svn: 175795
2013-02-21 20:58:22 +00:00
Daniel Malea 89660bf795 More Linux warnings fixes (remove default labels as needed):
- as per http://llvm.org/docs/CodingStandards.html#don-t-use-default-labels-in-fully-covered-switches-over-enumerations

Patch by Matt Kopec!

llvm-svn: 169633
2012-12-07 20:51:09 +00:00
Jason Molenda e2db91b8b0 Fix the bit pattern for vst1 in EmulateInstructionARM::GetThumbOpcodeForInstruction
so it is recognized correctly.  The second patch needed for <rdar://problem/10652166>.

llvm-svn: 167094
2012-10-31 02:00:46 +00:00
Jason Molenda 60f0bd4944 Add a new capability to RegisterContextLLDB: To recognize when the
Full UnwindPlan is trying to do an impossible unwind; in that case
invalidate the Full UnwindPlan and replace it with the architecture
default unwind plan.

This is a scenario that happens occasionally with arm unwinds in
particular; the instruction analysis based full unwindplan can
mis-parse the functions and the stack walk stops prematurely.  Now
we can do a simpleminded frame-chain walk to find the caller frame
and continue the unwind.  It's not ideal but given the complicated
nature of analyzing the arm functions, and the lack of eh_frame
information on iOS, it is a distinct improvement and fixes some
long-standing problems with the unwinder on that platform.  

This is fixing <rdar://problem/12091421>.  I may re-use this
invalidate feature in the future if I can identify other cases where
the full unwindplan's unwind information is clearly incorrect.

This checkin also includes some cleanup for the volatile register
definition in the arm ABI plugin for <rdar://problem/10652166> 
although work remains to be done for that bug.

llvm-svn: 166757
2012-10-26 06:08:58 +00:00
Greg Clayton 67cc06366c Reimplemented the code that backed the "settings" in lldb. There were many issues with the previous implementation:
- no setting auto completion
- very manual and error prone way of getting/setting variables
- tons of code duplication
- useless instance names for processes, threads

Now settings can easily be defined like option values. The new settings makes use of the "OptionValue" classes so we can re-use the option value code that we use to set settings in command options. No more instances, just "does the right thing".

llvm-svn: 162366
2012-08-22 17:17:09 +00:00
Greg Clayton 23f59509a8 Ran the static analyzer on the codebase and found a few things.
llvm-svn: 160338
2012-07-17 03:23:13 +00:00
Jason Molenda 1d42c7bc32 Switch nearly all of the use of the UnwindPlan::Row's to go through
a shared pointer to ease some memory management issues with a patch
I'm working on.

The main complication with using SPs for these objects is that most
methods that build up an UnwindPlan will construct a Row to a given
instruction point in a function, then add additional regsaves in
the next instruction point to that row and push it again.  A little
care is needed to not mutate the previous instruction point's Row
once these are switched to being held behing shared pointers.

llvm-svn: 160214
2012-07-14 04:52:53 +00:00
Greg Clayton 7051231709 <rdar://problem/11358639>
Switch over to the "*-apple-macosx" for desktop and "*-apple-ios" for iOS triples.

Also make the selection process for auto selecting platforms based off of an arch much better.

llvm-svn: 156354
2012-05-08 01:45:38 +00:00
Greg Clayton af54653c32 Make sure EmulateInstructionARM doesn't have to have "armv4", "armv6", "armv7" as the exact architecture name, the arch name can just start with any of these strings. We need to be able to recognize different variants that might come along and not fail to backtrace completely (which happens when we aren't able to find an architecture that matches) when we don't have exact matches.
llvm-svn: 155045
2012-04-18 21:16:06 +00:00
Jason Molenda 9cf296d177 Add armv7s to recognized cpu type for arm instruction emulation.
llvm-svn: 154974
2012-04-18 01:28:49 +00:00
Johnny Chen a4ac217d6c rdar://problem/11031743
For EmulateInstructionARM::EmulatePUSH(), fix the logical branch for when pc is pushed to behave
like the other cases where:

    context.SetRegisterToRegisterPlusOffset (reg_info, sp_reg, addr - sp);

is called to inform of the operation to set a register value to a memory location calculated from
a base register plus an offset.

llvm-svn: 152670
2012-03-13 21:07:03 +00:00
Greg Clayton 9d3d6886e6 Fixed some warnings after enabling some stricter warnings in the Xcode project
settings.

Also fixed an issue where we weren't creating anonymous namepaces correctly:
<rdar://problem/10371295>

llvm-svn: 143403
2011-10-31 23:51:19 +00:00
Johnny Chen 8557d298d4 Fix two logic errors uncovered by the static analyzer.
For the default case (illegal encoding type), just return false instead of break.

A8.6.84 LDRSH (register)
A8.6.309 VLD1 (single element to all lanes)

llvm-svn: 137699
2011-08-16 01:16:02 +00:00
Johnny Chen 7feabf0643 Fix a logic error (Division by zero) uncovered by the static analyzer.
A8.6.391 VST1 (multiple single elements)
alignment = if align == '00' then 1 else 4 << UInt(align);

llvm-svn: 137477
2011-08-12 17:59:58 +00:00
Johnny Chen 160ee8b43d Fix some warnings from static analyzer.
The initialization of 'replicated_element' to 0 is needed, otherwise we get a garbage value to start with.

llvm-svn: 137405
2011-08-12 01:10:45 +00:00
Greg Clayton 34132754bd Fixed some issues with ARM backtraces by not processing any push/pop
instructions if they are conditional. Also fixed issues where the PC wasn't
getting bit zero stripped for ARM targets when a stack frame was thumb. We
now properly call through the GetOpcodeLoadAddress() functions to make sure
the addresses are properly stripped for any targets that may decorate up
their addresses.

We now don't pass the SIGSTOP signals along. We can revisit this soon, but
currently this was interfering with debugging some older ARM targets that
don't have vCont support in the GDB server.

llvm-svn: 134461
2011-07-06 04:07:21 +00:00
Johnny Chen b1fa6b466b Bail out if we have an invalid thumb instruction.
llvm-svn: 132511
2011-06-02 23:19:06 +00:00
Johnny Chen 8a71c0b771 Turn the commented-out assert()'s into appropriate bail-out actions.
llvm-svn: 132507
2011-06-02 23:07:03 +00:00
Johnny Chen 6ef2735631 When emulating an ill-formed instruction, we should bail out instead of asserting and bringing down the whole process.
llvm-svn: 132506
2011-06-02 22:50:51 +00:00
Greg Clayton 850cc8998c Remove asserts that will crash LLDB. These should be changed to return
true/false in an extra boolean parameter and not cause the the binary that
us using the LLDB framework to crash.

llvm-svn: 132501
2011-06-02 22:23:35 +00:00
Johnny Chen 8a742f5f37 EmulateShiftReg() also accepts shifter type of SRType_ROR.
llvm-svn: 132484
2011-06-02 21:00:34 +00:00
Greg Clayton 8d400e1750 Fixed an issue in the EmulateInstructionARM there the IT opcode was trying to
parse NOP instructions. I added the new table entries for the NOP for the
plain NOP, Yield, WFE, WFI, and SEV variants. Modified the opcode emulation
function EmulateInstructionARM::EmulateMOVRdSP(...) to notify us when it is
creating a frame. Also added an abtract way to detect the frame pointer 
register for both the standard ARM ABI and for Darwin.

Fixed GDBRemoteRegisterContext::WriteAllRegisterValues(...) to correctly be
able to individually write register values back if case the 'G' packet is
not implemented or returns an error.

Modified the StopInfoMachException to "trace" stop reasons. On ARM we currently
use the BVR/BCR register pairs to say "stop when the PC is not equal to the 
current PC value", and this results in a EXC_BREAKPOINT mach exception that
has 0x102 in the code.

Modified debugserver to create the short option string from long option
definitions to make sure it doesn't get out of date. The short option string
was missing many of the newer short option values due to a modification of
the long options defs, and not modifying the short option string.

llvm-svn: 131911
2011-05-23 18:04:09 +00:00
Greg Clayton cd482e359e Added a way to resolve an load address from a target:
bool
Address::SetLoadAddress (lldb::addr_t load_addr, Target *target);

Added an == and != operator to RegisterValue.

Modified the ThreadPlanTracer to use RegisterValue objects to store the
register values when single stepping. Also modified the output to be a bit
less wide.

Fixed the ABIMacOSX_arm to not overwrite stuff on the stack. Also made the
trivial function call be able to set the ARM/Thumbness of the target 
correctly, and also sets the return value ARM/Thumbness.

Fixed the encoding on the arm s0-s31 and d16 - d31 registers when the default
register set from a standard GDB server register sets.

llvm-svn: 131517
2011-05-18 01:58:14 +00:00
Greg Clayton 31f1d2f535 Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their
respective ABI plugins as they were plug-ins that supplied ABI specfic info.

Also hookep up the UnwindAssemblyInstEmulation so that it can generate the
unwind plans for ARM.

Changed the way ABI plug-ins are handed out when you get an instance from
the plug-in manager. They used to return pointers that would be mananged
individually by each client that requested them, but now they are handed out
as shared pointers since there is no state in the ABI objects, they can be
shared.

llvm-svn: 131193
2011-05-11 18:39:18 +00:00
Greg Clayton 7349bd9078 While implementing unwind information using UnwindAssemblyInstEmulation I ran
into some cleanup I have been wanting to do when reading/writing registers.
Previously all RegisterContext subclasses would need to implement:

virtual bool
ReadRegisterBytes (uint32_t reg, DataExtractor &data);

virtual bool
WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0);

There is now a new class specifically designed to hold register values: 
        lldb_private::RegisterValue
        
The new register context calls that subclasses must implement are:

virtual bool
ReadRegister (const RegisterInfo *reg_info, RegisterValue &reg_value) = 0;

virtual bool
WriteRegister (const RegisterInfo *reg_info, const RegisterValue &reg_value) = 0;

The RegisterValue class must be big enough to handle any register value. The
class contains an enumeration for the value type, and then a union for the 
data value. Any integer/float values are stored directly in an appropriate
host integer/float. Anything bigger is stored in a byte buffer that has a length
and byte order. The RegisterValue class also knows how to copy register value
bytes into in a buffer with a specified byte order which can be used to write
the register value down into memory, and this does the right thing when not
all bytes from the register values are needed (getting a uint8 from a uint32
register value..). 

All RegiterContext and other sources have been switched over to using the new
regiter value class.

llvm-svn: 131096
2011-05-09 20:18:18 +00:00
Greg Clayton e5b3498eef Added the start of the CFI row production using the
emulate instruction classes.

llvm-svn: 130556
2011-04-29 22:50:31 +00:00
Greg Clayton 84c39663a9 Added a new OptionValue subclass for lldb::Format: OptionValueFormat. Added
new OptionGroup subclasses for:
- output file for use with options: 
        long opts: --outfile <path> --append--output
        short opts: -o <path> -A
        
- format for use with options:
        long opts: --format <format>

- variable object display controls for depth, pointer depth, wether to show
  types, show summary, show location, flat output, use objc "po" style summary.
  
Modified ValueObjectMemory to be able to be created either with a TypeSP or
a ClangASTType.

Switched "memory read" over to use OptionGroup subclasses: one for the outfile
options, one for the command specific options, and one for the format.

llvm-svn: 130334
2011-04-27 22:04:39 +00:00
Greg Clayton 79ea878bf9 Got the EmulateInstruction CFI code a lot closer to producing CFI data.
Switch the EmulateInstruction to use the standard RegisterInfo structure
that is defined in the lldb private types intead of passing the reg kind and
reg num everywhere. EmulateInstruction subclasses also need to provide
RegisterInfo structs given a reg kind and reg num. This eliminates the need
for the GetRegisterName() virtual function and allows more complete information
to be passed around in the read/write register callbacks. Subclasses should
always provide RegiterInfo structs with the generic register info filled in as
well as at least one kind of register number in the RegisterInfo.kinds[] array.

llvm-svn: 130256
2011-04-26 23:48:45 +00:00
Johnny Chen a85bf380ba Modify EmulateInstructionARM::SetArchitecture() to treat "arm" and "thumb" as wild card architectures
for now, in order to fix the test failure for the 'arm_emulation' directory.
There might be a better way.

llvm-svn: 130227
2011-04-26 18:51:57 +00:00
Greg Clayton 2ed751bd47 Changed the emulate instruction function to take emulate options which
are defined as enumerations. Current bits include:

        eEmulateInstructionOptionAutoAdvancePC
        eEmulateInstructionOptionIgnoreConditions

Modified the EmulateInstruction class to have a few more pure virtuals that
can help clients understand how many instructions the emulator can handle:

        virtual bool
        SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0;


Where instruction types are defined as:

//------------------------------------------------------------------
/// Instruction types
//------------------------------------------------------------------    
typedef enum InstructionType
{
    eInstructionTypeAny,                // Support for any instructions at all (at least one)
    eInstructionTypePrologueEpilogue,   // All prologue and epilogue instructons that push and pop register values and modify sp/fp
    eInstructionTypePCModifying,        // Any instruction that modifies the program counter/instruction pointer
    eInstructionTypeAll                 // All instructions of any kind

}  InstructionType;


This allows use to tell what an emulator can do and also allows us to request
these abilities when we are finding the plug-in interface.

Added the ability for an EmulateInstruction class to get the register names
for any registers that are part of the emulation. This helps with being able
to dump and log effectively.

The UnwindAssembly class now stores the architecture it was created with in
case it is needed later in the unwinding process.

Added a function that can tell us DWARF register names for ARM that goes
along with the source/Utility/ARM_DWARF_Registers.h file: 

        source/Utility/ARM_DWARF_Registers.c
        
Took some of plug-ins out of the lldb_private namespace.

llvm-svn: 130189
2011-04-26 04:39:08 +00:00
Caroline Tice de2fb9cf76 Change code for reading emulation data files to read the new file
format.  (The newly formatted files will go in as a separate commit in a
few minutes).

llvm-svn: 129981
2011-04-22 05:08:45 +00:00
Caroline Tice 3ac6711aec Add the infrastructure to test instruction emulations automatically.
The idea is that the instruction to be emulated is actually executed
on the hardware to be emulated, with the before and after state of the
hardware being captured and 'freeze-dried' into .dat files.  The
emulation testing code then loads the before & after state from the
.dat file, emulates the instruction using the before state, and
compares the resulting state to the 'after' state.  If they match, the
emulation is accurate, otherwise there is a problem.

The final format of the .dat files needs a bit more work; the plan is
to generalize them a bit and to convert the plain values to key-value pairs. 
But I wanted to get this first pass committed.

This commit adds arm instruction emulation testing to the testsuite, along with
many initial .dat files.

It also fixes a bug in the llvm disassembler, where 32-bit thumb opcodes
were getting their upper & lower 16-bits reversed.

There is a new Instruction sub-class, that is intended to be loaded
from a .dat file rather than read from an executable.  There is also a
new EmulationStateARM class, for handling the before & after states.
EmulationStates for other architetures can be added later when we
emulate their instructions.

llvm-svn: 129832
2011-04-19 23:30:03 +00:00
Caroline Tice 17f5fa2b1c Fix bug where source & target registers were swapped in an
emulation function.

llvm-svn: 129474
2011-04-13 21:49:04 +00:00
Caroline Tice 69955f6cdc Fix various minor bugs in the ARM instruction emulation code.
llvm-svn: 129422
2011-04-13 00:42:12 +00:00
Caroline Tice 88544c5f2c Implement ARM emulation function to handle "SUBS PC, LR and related instructions".
llvm-svn: 129279
2011-04-11 15:51:10 +00:00
Caroline Tice 25d61ac2ed Fix various things in the instruction emulation code:
- Add ability to control whether or not the emulator advances the
    PC register (in the emulation state), if the instruction itself
    does not change the pc value..

    - Fix a few typos in asm description strings.

    - Fix bug in the carry flag calculation.

llvm-svn: 129168
2011-04-08 23:33:06 +00:00