c2c2eb7d01
AMDGPU: Add D16 instructions preserve unused bits feature
...
- Predicate D16 patterns on this new feature
- Added this new feature to gfx900/2/4
Differential Revision: https://reviews.llvm.org/D46366
llvm-svn: 331551
2018-05-04 20:06:57 +00:00
9c1a6e7e24
[AMDGPU][MC] Corrected default values for unused SDWA operands
...
See bug 36355: https://bugs.llvm.org/show_bug.cgi?id=36355
Differential Revision: https://reviews.llvm.org/D44481
Reviewers: artem.tamazov, arsenm
llvm-svn: 327720
2018-03-16 15:40:27 +00:00
da4a7c01bf
[AMDGPU][MC] Corrected GATHER4 opcodes
...
See bug 36252: https://bugs.llvm.org/show_bug.cgi?id=36252
Differential Revision: https://reviews.llvm.org/D43874
Reviewers: artem.tamazov, arsenm
llvm-svn: 327278
2018-03-12 15:03:34 +00:00
c40d9f2e5d
AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
...
- Add gfx704
- Change bonaire to gfx704
- Remove gfx804
- Remove gfx901
- Remove gfx903
Differential Revision: https://reviews.llvm.org/D40046
llvm-svn: 320194
2017-12-08 20:52:28 +00:00
c492500e7e
[AMDGPU][mc][tests] Updated generated lit tests for GFX8/9
...
Summary:
Added tests to better cover features introduced by commit rL318675.
See http://llvm.org/viewvc/llvm-project?view=revision&revision=318675
llvm-svn: 318841
2017-11-22 15:47:27 +00:00
c8f8cda0cd
AMDGPU: Correct operand types for v_mad_mix*
...
These aren't really packed instructions, so the default
op_sel_hi should be 0 since this indicates a conversion.
The operand types are scalar values that behave similar
to an f16 scalar that may be converted to f32.
Doesn't change the default printing for op_sel_hi, just
the parsing.
llvm-svn: 312179
2017-08-30 22:18:40 +00:00
abf2839478
[AMDGPU][MC][GFX9] Added support of VOP3 'op_sel' modifier
...
See bug 33591: https://bugs.llvm.org//show_bug.cgi?id=33591
Reviewers: vpykhtin, artem.tamazov, SamWot, arsenm
Differential Revision: https://reviews.llvm.org/D35424
llvm-svn: 308740
2017-07-21 13:54:11 +00:00
095ec3da81
[AMDGPU][MC] Added missing VOP3P opcodes
...
Added support of the following opcodes:
v_pk_sub_u16
v_pk_mad_i16
v_pk_mad_u16
See Bug 33593: https://bugs.llvm.org//show_bug.cgi?id=33593
Reviewers: vpykhtin, artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D34890
llvm-svn: 308281
2017-07-18 09:24:10 +00:00
b2d24e23ce
[AMDGPU][mc][gfx9] Added support of op_sel/op_sel_hi for V_MAD_MIX*
...
See https://bugs.llvm.org//show_bug.cgi?id=33595
Reviewers: vpykhtin, artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D35021
llvm-svn: 307402
2017-07-07 14:29:06 +00:00
314eafb73d
[AMDGPU][mc][tests][NFC] Bulk ISA tests: Massive update. Add Gfx9 dasm tests.
...
A new Gfx9 dasm test added with approx 29000 cases.
Existing tests extended by (approx.):
* Gfx7 asm: 5000 test cases
* Gfx8 asm: 5000 test cases
* Gfx9 asm: 14400 test cases
* Gfx8 dasm: 5200 test cases
llvm-svn: 305702
2017-06-19 15:55:02 +00:00
d6656b945e
[AMDGPU][mc][tests][NFC] Bulk ISA tests: update for Gfx7/Gfx8, add for Gfx9.
...
llvm-svn: 301247
2017-04-24 20:42:27 +00:00
Konstantin Zhuravlyov