6 Commits

Author	SHA1	Message	Date
Stephen Lin	f799e3f944	Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. ... This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258	2013-07-13 20:38:47 +00:00
Andrew Trick	8523b16ff5	Instruction scheduling itinerary for Intel Atom. ... Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558	2012-02-01 23:20:51 +00:00
Chris Lattner	6a144a2227	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic. ... llvm-svn: 145171	2011-11-27 06:54:59 +00:00
Evan Cheng	15fed7af3c	Catch more cases where 2-address pass should 3-addressify instructions. rdar://9002648. ... llvm-svn: 126811	2011-03-02 01:08:17 +00:00
Evan Cheng	d4fcc05304	After 3-addressifying a two-address instruction, update the register maps; add a missing check when considering whether it's profitable to commute. rdar://8977508. ... llvm-svn: 125259	2011-02-10 02:20:55 +00:00
Dan Gohman	52183c3cc9	Add some tests and update an existing test to reflect recent ... x86 isel peeps. llvm-svn: 92509	2010-01-04 20:53:54 +00:00