Commit Graph

187548 Commits

Author SHA1 Message Date
Matt Arsenault 2a495975ed R600: Fix extloads of i1 on R600/Evergreen
llvm-svn: 222631
2014-11-23 02:57:54 +00:00
Matt Arsenault 28638f1e2c R600: Fix assert on copy of an i1 on pre-SI
i1 is not a legal type on Evergreen, so this combine proceeded
and tried to produce a bitcast between i1 and i8.

llvm-svn: 222630
2014-11-23 02:57:52 +00:00
Matt Arsenault b7ebdffe3c R600/SI: Add additional tests for i1 loads
llvm-svn: 222629
2014-11-23 02:57:50 +00:00
Matt Arsenault 79db0a70bc R600/SI: Fix broken check lines and modernize prefixes
Use -LABEL and remove -CHECK

llvm-svn: 222628
2014-11-23 02:57:49 +00:00
Matt Arsenault 8499ea6a90 R600/SI: Fix missing -verify-machineinstrs on a test
llvm-svn: 222627
2014-11-23 02:57:47 +00:00
Saleem Abdulrasool ec5c624550 CodeGen: tweak struct ABI handling
Cygwin and MinGW fail to conform to the underlying system's structure passing
ABI.  Make the check more precise to ensure that we correctly generate code for
the itanium environment.

llvm-svn: 222626
2014-11-23 02:16:24 +00:00
David Majnemer fb3805576b InstCombine: Propagate exact for (sdiv X, Pow2) -> (udiv X, Pow2)
llvm-svn: 222625
2014-11-22 20:00:41 +00:00
David Majnemer ec6e481bc5 InstCombine: Propagate exact for (sdiv X, Y) -> (udiv X, Y)
llvm-svn: 222624
2014-11-22 20:00:38 +00:00
David Majnemer fa4699e65f InstCombine: Propagate exact for (sdiv -X, C) -> (sdiv X, -C)
llvm-svn: 222623
2014-11-22 20:00:34 +00:00
Simon Pilgrim a279410ede Tidied up target triple OS detection. NFC
Use Triple::isOS*() helper functions where possible.

llvm-svn: 222622
2014-11-22 19:12:10 +00:00
Craig Topper c3c002d0b6 Reduce size of some tables in tablegen register info output.
Primarily done by using SequenceToOffsetTable to reduce the register pressure set tables and then sizing the indices into the tables appropriately. Size a few other table entries based on content as well. Reduces X86RegisterInfo.o by ~9k.

llvm-svn: 222621
2014-11-22 18:30:18 +00:00
David Majnemer a3aeb15613 InstCombine: Propagate exact in (udiv (lshr X,C1),C2) -> (udiv x,C1<<C2)
llvm-svn: 222620
2014-11-22 18:16:54 +00:00
Renato Golin 94a272d479 Try to fix ARM buildbots
llvm-svn: 222619
2014-11-22 16:59:03 +00:00
Daniel Sanders 1f07d06d61 Support matching signext attribute in the parallel_num_threads_codegen test to appease clang-cmake-mips builder.
The Mips target adds the signext attribute to signed 32-bit integers in order
to support the N32/N64 correctly. Integers must be promoted to 64-bit bit on
these ABI's.

llvm-svn: 222618
2014-11-22 16:21:18 +00:00
Daniel Sanders 8ff9e737af Support matching signext attribute in vla-lambda-capturing test to appease clang-cmake-mips builder.
The Mips target adds the signext attribute to signed 32-bit integers in order
to support the N32/N64 correctly. Integers must be promoted to 64-bit bit on
these ABI's.

llvm-svn: 222617
2014-11-22 16:08:56 +00:00
David Majnemer d8cd8f7b6e CodeGen: Make atomic operations play nice with address spaces
We were being a little sloppy with our pointer/address space casts.

This fixes PR21643.

llvm-svn: 222615
2014-11-22 10:44:12 +00:00
Chandler Carruth 5852b1f4c2 [x86] Teach the vector shuffle yet another step of canonicalization.
No functionality changed yet, but this will prevent subsequent patches
from having to handle permutations of various interleaved shuffle
patterns.

llvm-svn: 222614
2014-11-22 09:18:53 +00:00
David Majnemer 546f81064c InstCombine: Propagate NSW/NUW for X*(1<<Y) -> X<<Y
llvm-svn: 222613
2014-11-22 08:57:02 +00:00
David Majnemer 8279a7506d InstCombine: Propagate NSW for -X * -Y -> X * Y
llvm-svn: 222612
2014-11-22 07:25:19 +00:00
David Majnemer 4efa9ff8ca InstSimplify: Simplify (sub 0, X) -> X if it's NUW
This is a generalization of the X - (0 - Y) -> X transform.

llvm-svn: 222611
2014-11-22 07:15:16 +00:00
David Majnemer 6fc2d813cb Simplify MicrosoftMangleContextImpl::shouldMangleStringLiteral
No functionality changed.

llvm-svn: 222610
2014-11-22 06:20:38 +00:00
David Majnemer 83484fdb8b InstCombine: Silence a parenthesis warning
llvm-svn: 222609
2014-11-22 06:09:28 +00:00
Siva Chandra 51aba6ffa9 Mark 9 lldb unit tests for ubuntu as XFAIL.
The following lldb unit tests fail check-lldb on ubuntu:

TestDataFormatterStdMap.py
TestDataFormatterStdVBool.py
TestDataFormatterStdVector.py
TestDataFormatterSynthVal.py
TestEvents.py
TestInitializerList.py
TestMemoryHistory.py
TestReportData.py
TestValueVarUpdate.py

These unit test failures are for non-core functionality. The intent is to
reduce the check-lldb FAILS to core functionality FAILS and then circle
back later and fix these FAILS at a later date.

llvm-svn: 222608
2014-11-22 05:55:00 +00:00
Chandler Carruth 8c44d86ab8 [x86] Add some tests for a common unpack pattern of vector shuffle that
has a remarkably unique and efficient lowering.

While we get this some of the time already, we miss a few cases and
there wasn't a principled reason we got it. We should at least test
this. v8 already has tests for this pattern.

llvm-svn: 222607
2014-11-22 05:44:43 +00:00
David Majnemer 80c8f627db InstCombine: Preserve nsw when folding X*(2^C) -> X << C
llvm-svn: 222606
2014-11-22 04:52:55 +00:00
David Majnemer fd4a6d2b7a InstCombine: Preserve nsw/nuw for ((X << C2)*C1) -> (X * (C1 << C2))
llvm-svn: 222605
2014-11-22 04:52:52 +00:00
David Majnemer 027bc80928 InstCombine: Preserve nsw for (mul %V, -1) -> (sub 0, %V)
llvm-svn: 222604
2014-11-22 04:52:38 +00:00
Richard Smith 88f45490a0 Delay checking overrides for exception specifications if the overridden
specification has not yet been parsed.

llvm-svn: 222603
2014-11-22 03:09:05 +00:00
Greg Clayton 54166af611 Fixed an issue where a DW_FORM_ref{2,4,8} might be extracted incorrectly because the wrong compile unit was being used to calculate the compile unit relative offset.
This was fixed by making the DWARFFormValue contain the compile unit that it needs so it can decode its form value correctly. Any form value that requires a compile unit will now assert. If any of the assertions that were added are triggered, then code that led to the extraction of the form value without properly setting the compile unit must be fixed immediately. 

<rdar://problem/19035440>

llvm-svn: 222602
2014-11-22 01:58:59 +00:00
Jason Molenda cea6d634a5 When a RegisterContext produces an invalid CFA address, change
UnwindLLDB::AddOneMoreFrame to try the fallback unwind plan on
that same stack frame before it tries the fallback unwind plan
on the "next" or callee frame.

In RegisterContextLLDB::TryFallbackUnwindPlan, when we're
trying the fallback unwind plan to see if it is valid, make
sure we change all of the object ivars that might be used in
the process of fetching the CFA & caller's saved pc value 
and restore those if we decide not to use the fallback 
unwindplan.

<rdar://problem/19035079> 

llvm-svn: 222601
2014-11-22 01:52:03 +00:00
Jim Ingham 893c932acf This is the first step of making lldb able to create target-specific things
(e.g. breakpoints, stop-hooks) before we have any targets - for instance in 
your ~/.lldbinit file.  These will then get copied over to any new targets 
that get created.  So far, you can only make stop-hooks.

Breakpoints will have to learn to move themselves from target to target for
us to get them from no-target to new-target.

We should also make a command & SB API way to prime this ur-target.

llvm-svn: 222600
2014-11-22 01:42:44 +00:00
Jim Ingham 0f17c5570d Make the sourcing of the local .lldbinit file quiet.
<rdar://problem/19065278>

llvm-svn: 222599
2014-11-22 01:33:22 +00:00
David Majnemer 86903b70fc Silence a -Wcast-qual warning
llvm-svn: 222598
2014-11-22 00:45:01 +00:00
Zachary Turner e5bd103621 [ProcessWindows] Clean up the register definitions array.
llvm-svn: 222597
2014-11-22 00:37:14 +00:00
Enrico Granata e8eb47037c Just a few words to introduce the extra optional argument to Python summaries
llvm-svn: 222594
2014-11-22 00:06:30 +00:00
Enrico Granata 7e4df56aae Enable Python summaries to use custom SBTypeSummaryOptions if the user is so inclined. Updates to the webdoc will follow
llvm-svn: 222593
2014-11-22 00:02:47 +00:00
Jason Molenda 4104b908cc Fix mispelled 'ling' Python property to be 'line' in
SBLineEntry and SBDeclaration.  Patch from Chris Willmore.
<rdar://problem/19054323> 

llvm-svn: 222592
2014-11-22 00:00:17 +00:00
David Majnemer 125efd8d4f MS ABI: Mangle u8 string literals
UTF8 string literals are mangled just like ASCII string literals.

llvm-svn: 222591
2014-11-21 23:56:50 +00:00
Gerolf Hoflehner ec6217c929 [InstCombine] Re-commit of r218721 (Optimize icmp-select-icmp sequence)
Fixes the self-host fail. Note that this commit activates dominator
analysis in the combiner by default (like the original commit did).

llvm-svn: 222590
2014-11-21 23:36:44 +00:00
Greg Clayton 39766d9eda Remove print statement that was accidentally left in.
llvm-svn: 222589
2014-11-21 23:34:35 +00:00
Reid Kleckner 04748b98a6 Don't make check-sanitizer depend on profile on Windows
We don't build the profiling library on Windows, so CMake warns that the
target doesn't exist.

llvm-svn: 222588
2014-11-21 23:09:51 +00:00
Joerg Sonnenberger 02b13a8d9b Fix transformation of add with pc argument to adr for non-immediate
arguments.

llvm-svn: 222587
2014-11-21 22:39:34 +00:00
Kostya Serebryany 60ef25bd54 [asan] remove old experimental code
llvm-svn: 222586
2014-11-21 22:34:29 +00:00
Tom Stellard f1206edfd0 R600/SI: Add a failing test case for offset order in ds_read2 instructions
llvm-svn: 222585
2014-11-21 22:31:47 +00:00
Tom Stellard 91c7ef529d R600/SI: Add an s_mov_b32 to patterns which use the M0RegClass
We need to use a s_mov_b32 rather than a copy, so that CSE will
eliminate redundant moves to the m0 register.

llvm-svn: 222584
2014-11-21 22:31:46 +00:00
Tom Stellard a99ada528c R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
This s_mov_b32 will write to a virtual register from the M0Reg
class and all the ds instructions now take an extra M0Reg explicit
argument.

This change is necessary to prevent issues with the scheduler
mixing together instructions that expect different values in the m0
registers.

llvm-svn: 222583
2014-11-21 22:31:44 +00:00
Enrico Granata 49a6746942 Per off-list feedback, this API returns the *first* value with a given name, not the *only* one. Rename it to reflect that
llvm-svn: 222582
2014-11-21 22:23:08 +00:00
Tom Stellard 6596ba7933 R600/SI: Add SIFoldOperands pass
This pass attempts to fold the source operands of mov and copy
instructions into their uses.

llvm-svn: 222581
2014-11-21 22:06:37 +00:00
Jozef Kolek 3b8ddb665b [mips][microMIPS] This patch implements functionality in MIPS delay slot
filler such as if delay slot filler have to put NOP instruction into the
delay slot of microMIPS BEQ or BNE instruction which uses the register $0,
then instead of emitting NOP this instruction is replaced by the corresponding
microMIPS compact branch instruction, i.e. BEQZC or BNEZC.

Differential Revision: http://reviews.llvm.org/D3566

llvm-svn: 222580
2014-11-21 22:04:35 +00:00
Tom Stellard fb0011cf1a R600/SI: Mark s_mov_b32 and s_mov_b64 as rematerializable
llvm-svn: 222579
2014-11-21 22:00:16 +00:00