3b34190100
AVX/AVX2: Move the SEXT lowering code from a target specific DAGco to a lowering function.
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llvm-svn: 171170
2012-12-27 22:47:16 +00:00
80a11413bb
Saleem Abdulrasool: avoid hardcoding buffer lengths.
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llvm-svn: 171169
2012-12-27 21:17:53 +00:00
43d978e5c4
Saleem Abdulrasool: Silence warning and reduce unnecessary code in hash.cpp.
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llvm-svn: 171167
2012-12-27 18:59:05 +00:00
e2eec3c52b
Merge basic_sse12_fp_binop_p and basic_sse12_fp_binop_p_y multiclasses.
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llvm-svn: 171166
2012-12-27 18:51:50 +00:00
267e3e1eb8
Saleem Abdulrasool: This just rounds up a few compile warnings emitted by GCC (4.7.2).
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llvm-svn: 171165
2012-12-27 18:46:00 +00:00
5826f96e51
Teach the extras repository to actually install the clang-format tool.
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We should also install the clang-format.py script somewhere that makes
since for a Vim integration script. I don't know where that is though,
so just installing the binary for now. This is enough to let me use the
script from a checkout combined with the installed (and thus less likely
to crash or be slow) clang-format binary.
llvm-svn: 171164
2012-12-27 17:48:37 +00:00
d8f265a5b8
Simplify typeid 'potentially evaluated' check.
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llvm-svn: 171162
2012-12-27 15:26:27 +00:00
4a42cf69a6
[sanitizer] add statistics to the allocator; fix lint
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llvm-svn: 171161
2012-12-27 14:09:19 +00:00
c20f5d2246
Define COMPILER_RT_CAN_EXECUTE_TESTS variable on platforms where we can produce working binaries and use it in build rules for sanitizers tests
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llvm-svn: 171160
2012-12-27 13:19:23 +00:00
3edd52c1d0
Add support to BasicBlocks for iterating backwards over the
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instructions. This just exposes the already present reverse iterators of
the instruction ilist.
llvm-svn: 171159
2012-12-27 12:00:56 +00:00
a3c0d67d5b
Provide a common half-open interval map info implementation, and just
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re-use that for SlotIndexes. This way other users who want half-open
semantics can share the implementation.
llvm-svn: 171158
2012-12-27 11:29:17 +00:00
e40e60eed5
Make this parameter be named consistently with most other
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getAnalysisUsage implementations.
llvm-svn: 171157
2012-12-27 11:17:15 +00:00
0f2eabce10
docs: Add FAQ about "storing to a virtual register".
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This came up for the N+1'st time today in IRC.
llvm-svn: 171155
2012-12-27 10:23:04 +00:00
33fc6cff4b
docs: Move link to the new "external tutorials" area.
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llvm-svn: 171154
2012-12-27 08:57:08 +00:00
29dd7f2090
[ASan] Fix lifetime intrinsics handling. Now for each intrinsic we check if it describes one of 'interesting' allocas. Assume that allocas can go through casts and phi-nodes before apperaring as llvm.lifetime arguments
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llvm-svn: 171153
2012-12-27 08:50:58 +00:00
9aa00f0363
DAGCombinerInformation: add a getter that exposes the dagcombine level.
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llvm-svn: 171152
2012-12-27 08:44:35 +00:00
8798729a22
[msan] Explicitly link unit tests with libstdc++.
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llvm-svn: 171151
2012-12-27 08:44:19 +00:00
75ceb5b56b
Fix new[]/delete mismatch in FullDependence spotted by AddressSanitizer
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llvm-svn: 171150
2012-12-27 08:40:37 +00:00
f85d3ee072
docs: Update the benchmark with updated perf numbers.
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llvm-svn: 171149
2012-12-27 08:32:44 +00:00
2a054b4475
On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized
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register. In most cases we actually compare or select YMM-sized registers
and mixing the two types creates horrible code. This commit optimizes
some of the transition sequences.
PR14657.
llvm-svn: 171148
2012-12-27 08:15:45 +00:00
1302e8d6da
[asan] enable alloc_dealloc_mismatch by default
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llvm-svn: 171147
2012-12-27 08:08:05 +00:00
8e5d80eba3
AVX/AVX2: Move the code that lowers vector-trunc from a DAGCo-hook to custom lowering hook.
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The vector truncs were scalarized during LegalizeVectorOps, later vectorized again by some DAGCombine optimization
and finally, lowered by a dagcombing optimization. Now, they are properly lowered during LegalizeVectorOps.
No new testcase because the original testcases still work.
llvm-svn: 171146
2012-12-27 07:45:10 +00:00
4a0d946a43
[asan] relax asan/lit_tests/malloc_delete_mismatch.cc to make it pass on Mac 10.7 (where extra frames creep in between malloc and main)
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llvm-svn: 171145
2012-12-27 07:40:24 +00:00
6f604b5007
[asan/tsan] when unmapping a chunk of user memory, apply madvise(MADV_DONTNEED) to the corresponding chunk of shadow memory. Also update sanitizer_allocator64_testlib.cc
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llvm-svn: 171144
2012-12-27 07:37:24 +00:00
757f3fc394
Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT.
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llvm-svn: 171143
2012-12-27 07:16:08 +00:00
b1dd52450e
Refactor DAGCombinerInfo. Change the different booleans that indicate if we are before or after different runs of DAGCo, with the CombineLevel enum.
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Also, added a new API for checking if we are running before or after the LegalizeVectorOps phase.
llvm-svn: 171142
2012-12-27 06:47:41 +00:00
09ce4b9efe
Move single letter 'P' prefix out of multiclass now that tablegen allows defm to start with #NAME. This makes instruction names more searchable again.
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llvm-svn: 171141
2012-12-27 06:34:54 +00:00
8f0b73942e
Update tablegen parser to allow defm names to start with #NAME.
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llvm-svn: 171140
2012-12-27 06:32:52 +00:00
cffa95d73f
Implement dcl.link paragraph 5.
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The language linkage of redeclarations must match. GCC was already reporting
an error for this.
llvm-svn: 171139
2012-12-27 03:56:20 +00:00
396cb795bc
Add hasSideEffects=0 to some shift and rotate instructions. None of which are currently used by code generation.
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llvm-svn: 171137
2012-12-27 03:35:44 +00:00
c7910828e4
Mark the divide instructions as hasSideEffects=0.
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llvm-svn: 171136
2012-12-27 03:01:18 +00:00
495d38bf46
add Changes to ELF Writer to layout sections/segments in the output executable
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llvm-svn: 171135
2012-12-27 02:26:30 +00:00
a487035ca9
Update test for backend change.
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TODO: This test should be moved to the backend.
llvm-svn: 171134
2012-12-27 02:20:24 +00:00
3bf29fda91
For the dwarf5 split debug info code split out the string section
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per compile unit/skeleton compile unit. Update tests accordingly.
llvm-svn: 171133
2012-12-27 02:14:01 +00:00
c8a88ee691
FileCheck-ize.
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llvm-svn: 171132
2012-12-27 02:13:58 +00:00
d6152aabbb
FileCheck-ize.
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llvm-svn: 171131
2012-12-27 02:13:55 +00:00
5b807aaa38
Add hasSideEffects=0 to CMP*rr_REV.
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llvm-svn: 171130
2012-12-27 02:08:46 +00:00
b3f6751df5
whitespace
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llvm-svn: 171129
2012-12-27 02:04:12 +00:00
89e8607755
Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions. Shouldn't change any functionality since they don't have patterns to select them.
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llvm-svn: 171128
2012-12-27 02:01:33 +00:00
bbf9ddda04
changes for the ELF Reader : split up into AtomsELF.h/Adding new permissions permRWX
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llvm-svn: 171127
2012-12-27 01:40:08 +00:00
5a6acfa4c8
Right now all of the relocations are 32-bit dwarf, and the relocation
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information doesn't return an addend for Rel relocations. Go ahead
and use this information to fix relocation handling inside dwarfdump
for 32-bit ELF REL.
llvm-svn: 171126
2012-12-27 01:07:07 +00:00
b3cb257b8b
changes to fix Hexagon Relocation so that it accounts for the bitmask properly as documented in the ABI
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llvm-svn: 171125
2012-12-27 01:04:00 +00:00
5350cd314b
If all of the write objects are identified then we can vectorize the loop even if the read objects are unidentified.
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PR14719.
llvm-svn: 171124
2012-12-26 23:30:53 +00:00
c557343956
Fix operands and encoding form for ARPL instruction. Register form had and reversed. Memory form writes memory, but was marked as MRMSrcMem.
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llvm-svn: 171123
2012-12-26 23:27:57 +00:00
d47a70de9f
Add hasSideEffects=0 to some atomic instructions.
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llvm-svn: 171122
2012-12-26 23:08:12 +00:00
af2372087b
Mark the AL/AX/EAX forms of the basic arithmetic operations has never having side effects.
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llvm-svn: 171121
2012-12-26 22:19:23 +00:00
fca2acb618
80 columns. No functionality change.
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llvm-svn: 171120
2012-12-26 22:00:49 +00:00
90053a1214
Remove mid-optimizer warning. This situation should be handled differently,
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such as by a compiler warning, a check in clang -fsanitizer=undefined, being
optimized to unreachable, or a combination of the above. PR14722.
llvm-svn: 171119
2012-12-26 22:00:35 +00:00
1b8c0750ee
Mark all the _REV instructions as not having side effects. They aren't really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier.
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llvm-svn: 171118
2012-12-26 21:30:22 +00:00
18f2675e9b
Remove a special conditional setting of neverHasSideEffects if the instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns.
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llvm-svn: 171117
2012-12-26 21:04:30 +00:00
Nadav Rotem