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Commit Graph

Author	SHA1	Message	Date
Hal Finkel	7811c6188e	[PowerPC] v2[fi]64 need to be explicitly passed in VSX registers v2[fi]64 values need to be explicitly passed in VSX registers. This is because the code in TRI that finds the minimal register class given a register and a value type will assert if given an Altivec register and a non-Altivec type. llvm-svn: 205041	2014-03-28 19:58:11 +00:00

Author

SHA1

Message

Date

Hal Finkel

7811c6188e

[PowerPC] v2[fi]64 need to be explicitly passed in VSX registers

v2[fi]64 values need to be explicitly passed in VSX registers. This is because
the code in TRI that finds the minimal register class given a register and a
value type will assert if given an Altivec register and a non-Altivec type.

llvm-svn: 205041

2014-03-28 19:58:11 +00:00

1 Commits