Commit Graph

393508 Commits

Author SHA1 Message Date
Vitaly Buka afa3fedcda [NFC][sanitizer] Exctract DrainHalfMax
Part of D105778
2021-07-13 15:33:22 -07:00
Vitaly Buka 5df9995439 [NFC][sanitizer] Rename some MemoryMapper members
Part of D105778
2021-07-13 15:33:22 -07:00
Geoffrey Martin-Noble 9955c652ea [NFC][MLIR][std] Clean up ArithmeticCastOps
The documentation on these was out of sync with the implementation. Also
the declaration of inputs was repeated when it is already part of the
ArithmeticCastOp definition.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D105934
2021-07-13 15:18:45 -07:00
Victor Huang 18c19414eb [PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility
This patch is in a series of patches to provide builtins for compatibility
with the XL compiler. This patch adds the builtins and instrisics for compare
and multiply related operations.

Reviewed By: nemanjai, #powerpc

Differential revision: https://reviews.llvm.org/D102875
2021-07-13 16:55:09 -05:00
MaheshRavishankar f2b5e438aa [mlir][Tensor] Implement `reifyReturnTypeShapesPerResultDim` for `tensor.insert_slice`.
Differential Revision: https://reviews.llvm.org/D105852
2021-07-13 14:53:29 -07:00
Aart Bik 123e8dfcf8 [mlir][sparse] add support for std unary operations
Adds zero-preserving unary operators from std. Also adds xor.
Performs minor refactoring to remove "zero" node, and pushed
the irregular logic for negi (not support in std) into one place.

Reviewed By: gussmith23

Differential Revision: https://reviews.llvm.org/D105928
2021-07-13 14:51:13 -07:00
Adam Paszke 8a2720d81e Add more types to the LLVM dialect C API
This includes:
- void type
- array types
- function types
- literal (unnamed) struct types

Reviewed By: jpienaar, ftynse

Differential Revision: https://reviews.llvm.org/D105908
2021-07-13 14:35:50 -07:00
Derek Schuff d4e2693a67 [WebAssembly] Run varargs codegen test with non-emscripten triple
This is a followup from D105749 to cover both triples in the case
where they differ.
2021-07-13 14:31:19 -07:00
Alexander Yermolovich 24129fbc9a [LLD] Adding support for RELA for CG Profile.
This is a follow up to https://reviews.llvm.org/D104080, and ca3bdb57fa (diff-e64a48fabe31db213a631fdc5f2acb51bdddf3f16a8fb2928784f4c579229585). The implementation of  call graph profile was changed from a black box section to relocation approach. This was done to be compatible with post processing tools like strip/objcopy, and llvm equivalent. When they are invoked on object file before the final linking step with this new approach the symbol indices correctness is preserved.

The GNU binutils tools change the REL section to RELA section, unlike llvm tools. For example when strip -S is run on the ELF object files, as an intermediate step before linking. To preserve compatibility this patch extends implementation in LLD and ELFDumper to support both REL and RELA sections for call graph profile.

Reviewed By: MaskRay, jhenderson

Differential Revision: https://reviews.llvm.org/D105217
2021-07-13 13:56:30 -07:00
Hedin Garca a5a337e55e [libc] Capture floating point encoding and arrange it sequentially in memory
Redefined FPBits.h and LongDoubleBitsX86 so its implementation works for the Windows
and Linux platform while maintaining a packed memory alignment of the precision floating
point numbers. For its size in memory to be the same as the data type of the float point number.
This change was necessary because the previous attribute((packed)) specification in the struct was not working
for Windows like it was for Linux and consequently static_asserts in the FPBits.h file were failing.

Reviewed By: aeubanks, sivachandra

Differential Revision: https://reviews.llvm.org/D105561
2021-07-13 20:43:54 +00:00
Caitlyn Cano a16071e409 [libc] Don't pass -fpie/-ffreestanding on Windows
The current compile options function hardcodes the -fpie and
-ffreestanding flags, which don't exist on Windows. This patch sets the
compilation flags conditionally based on the OS specifics.

Reviewed By: sivachandra, aeubanks

Differential Revision: https://reviews.llvm.org/D105643
2021-07-13 20:39:51 +00:00
Vitaly Buka f990da59c5 [sanitizer] Few more NFC changes from D105778 2021-07-13 13:38:13 -07:00
Philip Reames 4df591b5c9 [SCEV] Handle zero stride correctly in howManyLessThans
This is split from D105216, but the code is hoisted much earlier into the path where we can actually get a zero stride flowing through. Some fairly simple proofs handle the cases which show up in practice. The only test changes are the cases where we really do need a non-zero divider to produce the right result.

Differential Revision: https://reviews.llvm.org/D105921
2021-07-13 13:31:40 -07:00
Martin Storsjö 1c69005c2e [libcxx] [docs] Acknowledge that the library is known to work in some configs outside of what's tested in CI
Differential Revision: https://reviews.llvm.org/D105888
2021-07-13 23:18:55 +03:00
Vitaly Buka 9f1f666b30 [NFC][sanitizer] Move MemoryMapper out of SizeClassAllocator64
Part of D105778
2021-07-13 13:17:36 -07:00
Hedin Garca d12a7f142e [libc] Add on float properties for precision floating point numbers in FloatProperties.h
Defined constant that express the number of bits for exponent in single and double precision. Added bit masks values and other properties for quad precision floating point numbers that specifically targets architectures defined in PlatfromDefs.h. The exponentWidth values were added to be used in LongDoubleBitsX86.h where the implementation to set the exponent component uses this and the bitWidth value. The need occurred because of the 80-bit quad precision implementation.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D105153
2021-07-13 20:15:54 +00:00
Vedant Kumar 5105a77035 [docs/llvm-cov] Document -compilation-dir
Document the `-compilation-dir` option added in D100232.

Differential Revision: https://reviews.llvm.org/D105826
2021-07-13 13:10:02 -07:00
Vitaly Buka d558bfaf8e [NFC][sanitizer] clang-format part of D105778 2021-07-13 13:02:23 -07:00
Vitaly Buka ba8dcaef0d Revert "sanitizer_common: optimize memory drain"
Breaks https://lab.llvm.org/buildbot/#/builders/anitizer-windows

This reverts commit d89d3dfae1.
2021-07-13 12:58:57 -07:00
Arthur O'Dwyer 7efe388785 [libc++] [test] Add a missing `()` in TestEachIntegralType. 2021-07-13 15:57:43 -04:00
Hafiz Abid Qadeer fb9c5c3dce [lld][AMDGPU] Handle R_AMDGPU_REL16 relocation.
This patch is a followup patch to https://reviews.llvm.org/D105760 which adds this relocation. This handles the relocation in lld.

The s_branch family of instruction does the following:
PC = PC + signext(simm * 4) + 4

so we we do the opposite on the target address before writing it in the instruction stream.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D105761
2021-07-13 20:41:11 +01:00
thomasraoux 6296e10972 [mlir][Vector] Remove Vector TupleOp as it is unused
TupleOp is not used anymore after recent refactoring.

Differential Revision: https://reviews.llvm.org/D105924
2021-07-13 12:39:12 -07:00
Eli Friedman b28c465e49 [NFC] Use CHECK-LABEL in trip-count-unknown-stride.ll 2021-07-13 12:21:13 -07:00
Eli Friedman 5d1ba53404 [LoopReroll] Add an extra defensive check to avoid SCEV assertion.
Make sure getMinusSCEV() didn't return a pointer.  The following check
would never succeed if it was a pointer, anyway, but calling
getMulExpr() on a pointer SCEV now asserts.
2021-07-13 12:17:09 -07:00
Nico Weber 3ea8860afb [gn build] (manually) port 303ddb60a2 2021-07-13 15:15:38 -04:00
Philip Reames 5ca9cf0e6b [tests] Precommit a test case from D105216 2021-07-13 12:02:44 -07:00
Artem Belevich 25629bb45f Fix cuda-bad-arch.cu test.
Tests for correctness of HIP architecture need `- xhip`
2021-07-13 11:57:25 -07:00
Philip Reames 087310c71e [SCEV] Strengthen inference of RHS > Start in howManyLessThans
Split off from D105216 to simplify review.  Rewritten with a lambda to be easier to follow.  Comments clarified.

Sorry for no test case, this is tricky to exercise with the current structure of the code.  It's about to be hit more frequently in a follow up patch, and the change itself is simple.
2021-07-13 11:54:07 -07:00
Jon Roelofs 3e5cff19fd [Tests] Fix test broken by: 43c7ca8e49 [AArch64][GlobalISel] Legalize store <2 x i16> 2021-07-13 11:36:36 -07:00
Krishna Kariya e56b2e5706 [InstCombine] Precommit tests for D105088 (NFC)
Add tests for D105088, as well as an option to disable the
(generally) unsound inttoptr of ptrtoint optimization.

Differential Revision: https://reviews.llvm.org/D105771
2021-07-13 20:35:04 +02:00
Thomas Lively 308d381283 [WebAssembly] Generate checks for simd-load-store-alignment.ll
This will make it easier to update these tests as we add support for generating
more SIMD loads and stores with custom alignments.

Differential Revision: https://reviews.llvm.org/D105862
2021-07-13 11:25:33 -07:00
Victor Huang 781929b423 [PowerPC][NFC] Power ISA features for Semachecking
[NFC] This patch adds features for pwr7, pwr8, and pwr9 that can be
used for semachecking builtin functions that are only valid for certain
versions of ppc.

Reviewed By: nemanjai, #powerpc
Authored By: Quinn Pham <Quinn.Pham@ibm.com>

Differential revision: https://reviews.llvm.org/D105501
2021-07-13 13:13:34 -05:00
Victor Huang e4585d3f4e Revert "[PowerPC][NFC] Power ISA features for Semachecking"
This reverts commit 10e0cdfc65.
2021-07-13 13:13:34 -05:00
Jon Roelofs eba638dbbb [AArch64][GlobalISel] Legalize load <2 x i16>
Differential revision: https://reviews.llvm.org/D105913
2021-07-13 11:12:05 -07:00
Jon Roelofs 43c7ca8e49 [AArch64][GlobalISel] Legalize store <2 x i16>
Differential revision: https://reviews.llvm.org/D105912
2021-07-13 11:12:05 -07:00
Artem Belevich 01d3a3dcab [CUDA] Only allow NVIDIA offload-arch during CUDA compilation.
Otherwise, if someone specifies a valid AMD arch, we may end up triggering an
assertion on unexpected arch later on.

Differential Revision: https://reviews.llvm.org/D105295
2021-07-13 11:09:14 -07:00
Philip Reames 6245252d4c [test] Add a SCEV backedge computation test with an explicit zero stride 2021-07-13 11:08:26 -07:00
Vitaly Buka ce25eb0b71 [NFC][sanitizer] Remove trailing whitespace 2021-07-13 11:02:42 -07:00
Valeriy Savchenko 60bd8cbc0c [analyzer][solver][NFC] Refactor how we detect (dis)equalities
This patch simplifies the way we deal with (dis)equalities.
Due to the symmetry between constraint handler and range inferrer,
we can have very similar implementations of logic handling
questions about (dis)equality and assumptions involving (dis)equality.

It also helps us to remove one more visitor, and removes uncertainty
that we got all the right places to put `trackNE` and `trackEQ`.

Differential Revision: https://reviews.llvm.org/D105693
2021-07-13 21:00:30 +03:00
Valeriy Savchenko f26deb4e6b [analyzer][solver][NFC] Introduce ConstraintAssignor
The new component is a symmetric response to SymbolicRangeInferrer.
While the latter is the unified component, which answers all the
questions what does the solver knows about a particular symbolic
expression, assignor associates new constraints (aka "assumes")
with symbolic expressions and can imply additional knowledge that
the solver can extract and use later on.

- Why do we need it and why is SymbolicRangeInferrer not enough?

As it is noted before, the inferrer only helps us to get the most
precise range information based on the existing knowledge and on the
mathematical foundations of different operations that symbolic
expressions actually represent.  It doesn't introduce new constraints.

The assignor, on the other hand, can impose constraints on other
symbols using the same domain knowledge.

- But for some expressions, SymbolicRangeInferrer looks into constraints
  for similar expressions, why can't we do that for all the cases?

That's correct!  But in order to do something like this, we should
have a finite number of possible "similar expressions".

Let's say we are asked about `$a - $b` and we know something about
`$b - $a`.  The inferrer can invert this expression and check
constraints for `$b - $a`.  This is simple!
But let's say we are asked about `$a` and we know that `$a * $b != 0`.
In this situation, we can imply that `$a != 0`, but the inferrer shouldn't
try every possible symbolic expression `X` to check if `$a * X` or
`X * $a` is constrained to non-zero.

With the assignor mechanism, we can catch this implication right at
the moment we associate `$a * $b` with non-zero range, and set similar
constraints for `$a` and `$b` as well.

Differential Revision: https://reviews.llvm.org/D105692
2021-07-13 21:00:30 +03:00
Vitaly Buka 2bc07083a2 [sanitizer] Fix VSNPrintf %V on Windows 2021-07-13 10:56:17 -07:00
Louis Dionne 2a399e60b6 [libc++] Add a CI job for macOS on arm64 hardware 🥳
Differential Revision: https://reviews.llvm.org/D105848
2021-07-13 13:49:05 -04:00
Tom Stellard 303ddb60a2 Fix utils/update_cc_test_checks/check-globals.test on stand-alone builds
We want to use LLVM_EXTERNAL_LIT if defined for the %lit substitution.

Reviewed By: jdenny

Differential Revision: https://reviews.llvm.org/D105873
2021-07-13 10:47:30 -07:00
Peyton, Jonathan L 424f14f0d2 [OpenMP] Fix one sign-compare warning from GCC 2021-07-13 12:36:12 -05:00
Louis Dionne 04942a7ffc [libc++] NFC: Add comment for running macOS CI setup script remotely 2021-07-13 13:35:29 -04:00
Craig Topper 1e670dc7d7 [RISCV] Use DIVUW/REMUW/DIVW instructions for i8/i16/i32 udiv/urem/sdiv when LHS is constant.
We don't really have optimizations for division with a constant
LHS. If we don't use a W instruction we end up needing to sign
or zero extend the RHS to use the 64-bit instruction.

I had to sign_extend i32 constants on the LHS instead of using
any_extend which becomes zero_extend. If we don't do this, constants
that were originally negative become harder to materialize. I think
this problem exists for more of our W instruction cases. For example
(i32 (shl -1, X)), but we don't have lit tests. I'll work on that
as a follow up.

I also left a FIXME for enabling W instruction for RHS constants
under -Oz.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D105769
2021-07-13 10:33:57 -07:00
Amy Kwan b5f4ac4c11 [PowerPC] Add FI alignment check if the addressing mode is DS/DQ-Form, emit X-Form if necessary.
This patch adds a function that checks whether or not the frame index
is aligned when the computed addressing mode is an aligned D-Form (DS, or DQ-Form).
If the frame index appears to be unaligned, within these two modes, reset
the mode to X-Form in order to fall back to selection X-Form loads.

A test case is added to ensure that the test emits X-Form loads and not DQ-Form
loads since the frame index is not aligned within the test case.

Differential Revision: https://reviews.llvm.org/D105661
2021-07-13 12:31:52 -05:00
Peyton, Jonathan L 405eefe464 [OpenMP][NFC] Change comment style to eliminate warnings from GCC
Standalone build for OpenMP runtime using GCC is giving -Wcomment
warnings where a backslash newline is encountered in the // style
comment. This switches the // style for /* style to silence the
warnings.
2021-07-13 12:27:08 -05:00
Matheus Izvekov 03282f2fe1 [clang] C++98 implicit moves are back with a vengeance
After taking C++98 implicit moves out in D104500,
we put it back in, but now in a new form which preserves
compatibility with pure C++98 programs, while at the same time
giving almost all the goodies from P1825.

* We use the exact same rules as C++20 with regards to which
  id-expressions are move eligible. The previous
  incarnation would only benefit from the proper subset which is
  copy ellidable. This means we can implicit move, in addition:
  * Parameters.
  * RValue references.
  * Exception variables.
  * Variables with higher-than-natural required alignment.
  * Objects with different type from the function return type.
* We preserve the two-overload resolution, with one small tweak to the
  first one: If we either pick a (possibly converting) constructor which
  does not take an rvalue reference, or a user conversion operator which
  is not ref-qualified, we abort into the second overload resolution.

This gives C++98 almost all the implicit move patterns which we had created test
cases for, while at the same time preserving the meaning of these
three patterns, which are found in pure C++98 programs:
* Classes with both const and non-const copy constructors, but no move
  constructors, continue to have their non-const copy constructor
  selected.
* We continue to reject as ambiguous the following pattern:
```
struct A { A(B &); };
struct B { operator A(); };
A foo(B x) { return x; }
```
* We continue to pick the copy constructor in the following pattern:
```
class AutoPtrRef { };
struct AutoPtr {
  AutoPtr(AutoPtr &);
  AutoPtr();

  AutoPtr(AutoPtrRef);
  operator AutoPtrRef();
};
AutoPtr test_auto_ptr() {
  AutoPtr p;
  return p;
}
```

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: Quuxplusone

Differential Revision: https://reviews.llvm.org/D105756
2021-07-13 19:16:49 +02:00
Marcos Horro 14f77576c9 [llvm-mca] [NFC] Formatting code
Applied clang-format to all files. Discarded BottleneckAnalysis.h
80-column width violation since it contains an example of report.
Caught some typos and minor style details.

Reviewed By: andreadb

Differential Revision: https://reviews.llvm.org/D105900
2021-07-13 19:13:59 +02:00