af629e2700
Merge more SSE/AVX instruction definitions.
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llvm-svn: 171102
2012-12-26 07:20:35 +00:00
bf99a426cb
TableGen/FixedLenDecoderEmitter.cpp: Fix a potential mask overflow in fieldFromInstruction().
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Reported by Yang Yongyong, thanks!
llvm-svn: 171101
2012-12-26 06:43:14 +00:00
794a73124b
[msan] Check for conflicting memory mappings.
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Check for conflicting memory mappings before attempting to map shadow.
Helps avoid segfault on Linux with disabled ASLR.
llvm-svn: 171100
2012-12-26 06:37:23 +00:00
a11cd57a78
[asan] asan_allocator2: by default use the StackDepot to store the stack traces instead of storing them in the redzones
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llvm-svn: 171099
2012-12-26 06:30:02 +00:00
a1d2436b5f
revert an accidental commit.
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llvm-svn: 171098
2012-12-26 06:16:03 +00:00
65fe30450d
Fix 80 column violation.
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llvm-svn: 171097
2012-12-26 06:15:53 +00:00
f4d0fe8fcd
Fix class name in comment.
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llvm-svn: 171096
2012-12-26 06:15:09 +00:00
59747c4dbd
Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions.
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llvm-svn: 171095
2012-12-26 06:14:15 +00:00
7375d35711
Doc: add fmuladd to the list of vectorizeable functions. Thanks hfinkel.
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llvm-svn: 171094
2012-12-26 06:03:35 +00:00
8a48677586
Remove 'v' from mnemonic to fix asm matching failures.
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llvm-svn: 171093
2012-12-26 06:02:15 +00:00
b4ef0fa3a1
Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for a bunch of SSE2 integer arithmetic instructions.
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llvm-svn: 171092
2012-12-26 05:49:15 +00:00
5267bb71b8
Reformat the docs.
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llvm-svn: 171091
2012-12-26 04:59:20 +00:00
0e1d662d56
white space
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llvm-svn: 171090
2012-12-26 04:58:12 +00:00
27ad15e165
[asan] asan_allocator2: store the user requested size in just 32 bits (larger sizes use metadata). This allows to put one more 32-bit field into the chunk header
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llvm-svn: 171089
2012-12-26 04:52:07 +00:00
1779760cb4
Fix a regression from the previous commit.
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Template instantiation can set the canonical decl to used after subsequent
decls have been chained, so we have to check that too.
llvm-svn: 171088
2012-12-26 04:38:44 +00:00
a2594dd5f0
Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction definitions for PAND/POR/PXOR/PANDN
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llvm-svn: 171087
2012-12-26 04:36:03 +00:00
97730a0d6a
Merge an AVX/SSE 256-bit and 128-bit multiclass.
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llvm-svn: 171086
2012-12-26 03:56:47 +00:00
8b59746390
Mark VANDNPD/VANDNPDS as not commutable.
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llvm-svn: 171085
2012-12-26 03:48:10 +00:00
40aa3285f4
llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083.
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llvm-svn: 171084
2012-12-26 03:19:30 +00:00
334f685328
llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082.
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llvm-svn: 171083
2012-12-26 03:08:55 +00:00
81d1e596bb
Remove alignment from a bunch more VEX encoded operations in the folding tables.
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llvm-svn: 171082
2012-12-26 02:44:47 +00:00
b2922164f0
Remove alignment from folding table for VMOVUPD as an unaligned instruction it shouldn't require alignment...
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llvm-svn: 171081
2012-12-26 02:14:19 +00:00
d09a9af9b6
Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit stores which aren't required to be aligned on SSE or AVX.
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llvm-svn: 171080
2012-12-26 01:47:12 +00:00
30e95a8ebb
BBVectorize: Use VTTI to compute costs for intrinsics vectorization
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For the time being this includes only some dummy test cases. Once the
generic implementation of the intrinsics cost function does something other
than assuming scalarization in all cases, or some target specializes the
interface, some real test cases can be added.
Also, for consistency, I changed the type of IID from unsigned to Intrinsic::ID
in a few other places.
llvm-svn: 171079
2012-12-26 01:36:57 +00:00
caef1c5d86
Remove alignment requirement from VCVTSS2SD in folding tables. Reverting r171049. This instruction doesn't require alignment.
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llvm-svn: 171078
2012-12-26 00:35:47 +00:00
dfa5f9b511
Use the most recent redecl to decide if it is needed.
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This fixes pr14691, which I think is a regression from r168519.
llvm-svn: 171077
2012-12-26 00:13:29 +00:00
b44f890133
LoopVectorize: Enable vectorization of the fmuladd intrinsic
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llvm-svn: 171076
2012-12-25 23:21:29 +00:00
2a456112ec
BBVectorize: Enable vectorization of the fmuladd intrinsic
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llvm-svn: 171075
2012-12-25 22:36:08 +00:00
940a6d73ce
Produce an actual error before attempting to attach notes to it when bailing out
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due to FORCE_CLANG_DIAGNOSTICS_CRASH=1. Also add a test for that env var.
llvm-svn: 171074
2012-12-25 21:56:27 +00:00
2ebe6d08cd
Loosen scheduling restrictions on the PPC dcbt intrinsic
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As with the prefetch intrinsic to which it maps, simply have dcbt
marked as reading from and writing to its arguments instead of having
unmodeled side effects. While this might cause unwanted code motion
(because aliasing checks don't really capture cache-line sharing),
it is more important that prefetches in unrolled loops don't block
the scheduler from rearranging the unrolled loop body.
llvm-svn: 171073
2012-12-25 18:51:18 +00:00
1b5ff08d43
Expand PPC64 atomic load and store
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Use of store or load with the atomic specifier on 64-bit types would
cause instruction-selection failures. As with the 32-bit case, these
can use the default expansion in terms of cmp-and-swap.
llvm-svn: 171072
2012-12-25 17:22:53 +00:00
84f46d9993
[msan] Improve recvfrom interceptor.
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llvm-svn: 171071
2012-12-25 16:51:57 +00:00
f19c086d1e
[msan] Fix handling of vectors of pointers.
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VectorType::getInteger() can not be used with them, because pointer size
depends on the target.
llvm-svn: 171070
2012-12-25 16:04:38 +00:00
ec8371283b
[msan] Fix handling of select with vector condition.
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llvm-svn: 171069
2012-12-25 14:56:21 +00:00
11a2eccc8b
Fix for PR12222.
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Changed getLocStart() and getLocEnd() to be required for Stmts, and make
getSourceRange() optional. The default implementation for getSourceRange()
is build the range by calling getLocStart() and getLocEnd().
llvm-svn: 171067
2012-12-25 14:51:39 +00:00
a9f265ee98
Harden test so it's not affected by changes to compare lowering.
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This only failed on hosts that don't have SSE41.
llvm-svn: 171066
2012-12-25 13:23:23 +00:00
a57662d7c4
Add MSan unit tests to check-msan and check-all.
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llvm-svn: 171065
2012-12-25 13:10:15 +00:00
81b5a8fd2e
X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity.
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llvm-svn: 171064
2012-12-25 13:09:08 +00:00
df4af41b9b
X86: Custom lower <2 x i64> eq and ne when SSE41 is not available.
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pcmpeqd, pshufd, pshufd, pand is cheaper than unpack + cmpq, sbbq, cmpq, sbbq + pack.
Small speedup on loop-vectorized viterbi (-march=core2).
llvm-svn: 171063
2012-12-25 12:54:19 +00:00
f45d92bb22
MemorySanitizer unit tests.
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llvm-svn: 171062
2012-12-25 12:39:56 +00:00
788381b8ac
ASan: initialize callbacks from ASan module pass in a separate function for consistency
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llvm-svn: 171061
2012-12-25 12:28:20 +00:00
1e3f7ba8f7
ASan: move stack poisoning logic into FunctionStackPoisoner struct
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llvm-svn: 171060
2012-12-25 12:04:36 +00:00
6722716d78
[msan] Fix header comments.
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llvm-svn: 171059
2012-12-25 11:53:51 +00:00
eff9b4b9b1
[asan] add a test for right OOB with special large sizes. Fix this test in asan_allocator2. More test tweaking for allocator2
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llvm-svn: 171058
2012-12-25 09:40:20 +00:00
116518af74
tsan: fix tests to consistently use internal functions (otherwise it leads to false positives)
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llvm-svn: 171057
2012-12-25 09:20:58 +00:00
f0a014bbb7
Add intel_ocl_bicc calling convention as a function attribute to clang. The calling convention is already implemented in LLVM.
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llvm-svn: 171056
2012-12-25 08:53:55 +00:00
ad24c58e16
[sanitizer] increase the maximum size class of the fast allocator. This should save quite a bit of memory in tsan/msan (and later in asan). This also puts more stress on the large allocator. Add a couple of checks
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llvm-svn: 171055
2012-12-25 07:50:35 +00:00
774defc649
tsan: fix the code that searches for heap memory block metadata
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(the old code won't work with new allocator)
llvm-svn: 171054
2012-12-25 07:45:40 +00:00
54606d57a2
Add 171048 back but invalidate the cache of all redeclarations when setting
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the body of a functions. The problem was that hasBody looks at the entire chain
and causes problems to -fvisibility-inlines-hidden if the cache was not
invalidated.
Original message:
Cache visibility of decls.
This unifies the linkage and visibility caching. I first implemented this when
working on pr13844, but the previous fixes removed the performance advantage of
this one.
This is still a step in the right direction for making linkage and visibility
cheap to use.
llvm-svn: 171053
2012-12-25 07:31:49 +00:00
181f504d82
[asan] properly define ASAN_LOW_MEMORY. Due to a mistake it has been always true causing redzone and quarantine sizes to be smaller than it was some time before (and out of sync with the documentation). Also make one test less greedy
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llvm-svn: 171052
2012-12-25 07:17:17 +00:00
Craig Topper