llvm-project

Commit Graph

Author	SHA1	Message	Date
Hsiangkai Wang	6e360460f1	[RISCV] Use v8-v23 as argument registers to conform to the proposal. The maximum LMUL is 8. We need 16 vector registers for two LMUL-8 arguments. The modification follows the proposal of psABI in https://github.com/riscv/riscv-elf-psabi-doc/pull/171 Differential Revision: https://reviews.llvm.org/D95134	2021-01-22 07:55:24 +08:00
Zakk Chen	da4a637e99	[RISCV] Define vpopc/vfirst intrinsics. Define vpopc/vfirst intrinsics and lower to V instructions. We work with @rogfer01 from BSC to come out this patch. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D93795	2020-12-24 19:44:34 -08:00

Author

SHA1

Message

Date

Hsiangkai Wang

6e360460f1

[RISCV] Use v8-v23 as argument registers to conform to the proposal.

The maximum LMUL is 8. We need 16 vector registers for two LMUL-8
arguments. The modification follows the proposal of psABI in
https://github.com/riscv/riscv-elf-psabi-doc/pull/171

Differential Revision: https://reviews.llvm.org/D95134

2021-01-22 07:55:24 +08:00

Zakk Chen

da4a637e99

[RISCV] Define vpopc/vfirst intrinsics.

Define vpopc/vfirst intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93795

2020-12-24 19:44:34 -08:00

2 Commits