Commit Graph

4153 Commits

Author SHA1 Message Date
Qiu Chaofan 2abc33683b [PowerPC] [Clang] Define macros to identify quad-fp semantics
We have option -mabi=ieeelongdouble to set current long double to
IEEEquad semantics. Like what GCC does, we need to define
__LONG_DOUBLE_IEEE128__ macro in this case, and __LONG_DOUBLE_IBM128__
if using PPCDoubleDouble.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D90208
2020-11-12 10:26:13 +08:00
Kazushi (Jam) Marukawa 6e0ae20f3b [VE] Support vector register in inline asm
Support a vector register constraint in inline asm of clang.
Add a regression test also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91251
2020-11-12 06:18:35 +09:00
Akira Hatanaka d9258a21f0 Fix the data layout mangling specification for 'arm64-pc-win32-macho'
rdar://problem/70410504
2020-11-10 18:52:12 -08:00
Fangrui Song c6a384df1f [Sema] Special case -Werror-implicit-function-declaration and reject other -Werror-
This is the only -Werror- form warning option GCC supports (gcc/c-family/c.opt).
Fortunately no other form is used anywhere.
2020-11-05 10:25:30 -08:00
Duncan P. N. Exon Smith 6e73cfa836 Basic: Change Module::Umbrella to a PointerUnion, NFC
Change `Module::Umbrella` from a `const void *` to a `PointerUnion` of
`FileEntry` and `DirectoryEntry`. We can drop the `HasUmbrellaDir` bit
(since `PointerUnion` includes that).

This change makes it safer to update to `FileEntryRef` and
`DirectoryEntryRef` in a future patch.

Differential Revision: https://reviews.llvm.org/D90481
2020-11-04 16:19:39 -05:00
Tim Renouf 89d41f3a2b [AMDGPU] Add gfx1033 target
Differential Revision: https://reviews.llvm.org/D90447

Change-Id: If2650fc7f31bbdd49c76e74a9ca8e3734d769761
2020-11-03 16:27:48 +00:00
Tim Renouf ee3e642627 [AMDGPU] Add gfx90c target
This differentiates the Ryzen 4000/4300/4500/4700 series APUs that were
previously included in gfx909.

Differential Revision: https://reviews.llvm.org/D90419

Change-Id: Ia901a7157eb2f73ccd9f25dbacec38427312377d
2020-11-03 16:27:43 +00:00
Duncan P. N. Exon Smith 9f151df178 Change Module::ASTFile and ModuleFile::File => Optional<FileEntryRef>, NFC
Change `Module::ASTFile` and `ModuleFile::File` to use
`Optional<FileEntryRef>` instead of `const FileEntry *`. One of many
steps toward removing `FileEntry::getName`.

Differential Revision: https://reviews.llvm.org/D89836
2020-11-02 15:11:51 -05:00
Shoaib Meenai 4e4ab8e015 [clang] Limit scope of CLANG_VENDOR definition
It's only used by Version.cpp, so limit the definition to just that one
file instead of making all of Clang recompile if you change CLANG_VENDOR.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D90516
2020-11-02 09:04:43 -08:00
Liu, Chen3 756f597841 [X86] Support Intel avxvnni
This patch mainly made the following changes:

1. Support AVX-VNNI instructions;
2. Introduce ExplicitVEXPrefix flag so that vpdpbusd/vpdpbusds/vpdpbusds/vpdpbusds instructions only use vex-encoding when user explicity add {vex} prefix.

Differential Revision: https://reviews.llvm.org/D89105
2020-10-31 12:39:51 +08:00
Marcel Hlopko 9bb9b737c5 Remove HAVE_VCS_VERSION_INC, not needed
This preprocessor define was meant to be used to conditionally include VCSVersion.inc. However, the define was always set, and it was the content of the header that was conditionally generated. Therefore HAVE_VCS_VERSION_INC should be cleaned up.

Reviewed By: gribozavr2, MaskRay

Differential Revision: https://reviews.llvm.org/D84623
2020-10-29 13:09:05 -07:00
Ben Shi 5be50d79c0 [NFC][clang][AVR] Add more devices
Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D88352
2020-10-29 11:49:21 +08:00
Duncan P. N. Exon Smith 23ed570af1 Split out llvm/Support/FileSystem/UniqueID.h and clang/Basic/FileEntry.h, NFC
Split `FileEntry` and `FileEntryRef` out into a new file
`clang/Basic/FileEntry.h`. This allows current users of a
forward-declared `FileEntry` to transition to `FileEntryRef` without
adding more includers of `FileManager.h`.

Also split `UniqueID` out to llvm/Support/FileSystem/UniqueID.h, so
`FileEntry.h` doesn't need to include all of `FileSystem.h` for just
that type.

Differential Revision: https://reviews.llvm.org/D89761
2020-10-28 16:38:32 -04:00
Nico Weber 739d4bf8f4 Unbreak build with gcc5.3 after 917acac 2020-10-27 20:10:48 -04:00
Duncan P. N. Exon Smith 917acac960 FileManager: Shrink FileEntryRef to the size of a pointer
Shrink `FileEntryRef` to the size of a pointer, by having it directly
reference the `StringMapEntry` the same way that `DirectoryEntryRef`
does. This makes `FileEntryRef::FileEntryRef` private as a side effect
(`FileManager` is a friend!).

There are two helper types added within `FileEntryRef`:

- `FileEntryRef::MapValue` is the type stored in
  `FileManager::SeenFileEntries`. It's a replacement for
  `SeenFileEntryOrRedirect`, where the second pointer type has been
  changed from `StringRef*` to `MapEntry*` (see next bullet).
- `FileEntryRef::MapEntry` is the instantiation of `StringMapEntry<>`
  where `MapValue` is stored. This is what `FileEntryRef` has a pointer
  to, in order to grab the name in addition to the value.

Differential Revision: https://reviews.llvm.org/D89488
2020-10-27 14:55:41 -04:00
Mikhail Maltsev 443ab4d2e0 [clang][Basic] Integrate SourceLocation with FoldingSet, NFCI
This patch removes the necessity to access the SourceLocation internal
representation in several places that use FoldingSet objects.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D69844
2020-10-27 10:43:39 +00:00
Duncan P. N. Exon Smith aab50af8c1 SourceManager: Use the same fake SLocEntry whenever it fails to load
Instead of putting a fake `SLocEntry` at `LoadedSLocEntryTable[Index]`
when it fails to load in `SourceManager::loadSLocEntry`, allocate a fake
one. Unless someone is sniffing the address of the returned `SLocEntry`
(doubtful), this won't be a functionality change. Note that
`SLocEntryLoaded[Index]` wasn't being set to `true` either before or
after this change so no accessor is every going to look at
`LoadedSLocEntryTable[Index]`.

As a side effect, drop the `mutable` from `LoadedSLocEntryTable`.

Differential Revision: https://reviews.llvm.org/D89748
2020-10-26 20:56:28 -04:00
Duncan P. N. Exon Smith 22e6b1863e SourceManager: Fix an SLocEntry memory regression introduced with FileEntryRef
4dc5573acc added `FileEntryRef` in order to
help enable sharing of a `FileManager` between `CompilerInstance`s.

It also added a `StringRef` with the filename on `FileInfo`. This
doubled `sizeof(FileInfo)`, bloating `sizeof(SLocEntry)`, of which we
have one for each (loaded and unloaded) file and macro expansion. This
causes a memory regression in modules builds.

Move the filename down into the `ContentCache`, which is a side data
structure for `FileInfo` that does not impact `sizeof(SLocEntry)`. Once
`FileEntryRef` is used for `ContentCache::OrigEntry` this can go away.

Differential Revision: https://reviews.llvm.org/D89580
Radar-Id: rdar://59908826
2020-10-26 15:38:13 -04:00
Duncan P. N. Exon Smith 0387015d75 SourceManager: Return non-const references in getOrCreateContentCache and related, NFC
Update a few APIs to return non-const references instead of pointers,
and remove associated `const_cast`s and non-null assertions.

Differential Revision: https://reviews.llvm.org/D90067
2020-10-26 14:07:46 -04:00
Benjamin Kramer 39a0d6889d [X86] Add a stub for Intel's alderlake.
No scheduling, no autodetection.
2020-10-24 19:01:22 +02:00
Benjamin Kramer bd2cf96c09 [X86] Add a stub for znver3 based on the little public information there is in AMD's manuals
No scheduling, no autodetection. Just enough so -march=znver3 works.
2020-10-24 19:01:22 +02:00
Duncan P. N. Exon Smith cf52a85ddc SourceManager: Simplify by inlining what remains of ComputeLineNumbers, NFC
Use `LineOffsetMapping:get` directly and remove/inline the helper
`ComputeLineNumbers`, simplifying the callers.

Differential Revision: https://reviews.llvm.org/D89922
2020-10-23 14:56:41 -04:00
Xiangling Liao 05bef88eb3 [AIX] Let alloca return 16 bytes alignment
On AIX, to support vector types, which should always be 16 bytes aligned,
we set alloca to return 16 bytes aligned memory space.

Differential Revision: https://reviews.llvm.org/D89910
2020-10-23 14:41:32 -04:00
Duncan P. N. Exon Smith 5431c37b55 SourceManager: Make LastLineNoContentCache and ContentCache::SourceLineCache mutable, NFC
Avoid some noisy `const_cast`s by making `ContentCache::SourceLineCache`
and `SourceManager::LastLineNoContentCache` both mutable.

Differential Revision: https://reviews.llvm.org/D89914
2020-10-23 13:22:47 -04:00
Duncan P. N. Exon Smith dbbc4f4e22 SourceManager: Encapsulate line number mapping into SrcMgr::LineOffsetMapping
Put the guts of `ComputeLineNumbers` into `LineOffsetMapping::get` and
`LineOffsetMapping::LineOffsetMapping`.  As a drive-by, store the number
of lines directly in the bump-ptr-allocated array.

Differential Revision: https://reviews.llvm.org/D89913
2020-10-23 12:55:51 -04:00
Duncan P. N. Exon Smith 74a8783480 SourceManager: Clarify that FileInfo always has a ContentCache, NFC
It turns out that `FileInfo` *always* has a ContentCache. Clarify that
in the code:
- Update the private version of `SourceManager::createFileID` to take a
  `ContentCache&` instead of `ContentCache*`, and rename it to
  `createFileIDImpl` for clarity.
- Change `FileInfo::getContentCache` to return a reference.

Differential Revision: https://reviews.llvm.org/D89554
2020-10-23 12:38:53 -04:00
Duncan P. N. Exon Smith 3b8d8954bf SourceManager: Remove a redundant nullptr check in getNonBuiltinFilenameForID, NFC 2020-10-22 22:20:50 -04:00
Duncan P. N. Exon Smith cf593d224c SourceManager: getFileEntryRefForID => getNonBuiltinFilenameForID, NFC
`SourceManager::getFileEntryRefForID`'s remaining callers just want the
filename component, which is coming from the `FileInfo`. Replace the API
with `getNonBuiltinFilenameForID`, which also removes another use of
`FileEntryRef::FileEntryRef` outside of `FileManager`.

Both callers are collecting file dependencies, and one of them relied on
this API to filter out built-ins (as exposed by
clang/test/ClangScanDeps/modules-full.cpp). It seems nice to continue
providing that service.

Differential Revision: https://reviews.llvm.org/D89508
2020-10-22 22:20:50 -04:00
Duncan P. N. Exon Smith 168db92465 SourceManager: Change SourceManager::isMainFile to take a FileEntry, NFC
`SourceManager::isMainFile` does not use the filename, so it doesn't
need the full `FileEntryRef`; in fact, it's misleading to take the name
because that makes it look relevant. Simplify the API, and in the
process remove some calls to `FileEntryRef::FileEntryRef` in the unit
tests (which were blocking making that private to `SourceManager`).

Differential Revision: https://reviews.llvm.org/D89507
2020-10-22 21:32:28 -04:00
Duncan P. N. Exon Smith b6c6daa95d SourceManager: Factor out helpers for common SLocEntry lookup pattern, NFC
Add helpers `getSLocEntryOrNull`, which handles the `Invalid` logic
around `getSLocEntry`, and `getSLocEntryForFile`, which also checks for
`SLocEntry::isFile`, and use them to reduce repeated code.

Differential Revision: https://reviews.llvm.org/D89503
2020-10-22 21:30:31 -04:00
Jan Korous 8277a513c7 [SourceManager] Avoid copying SLocEntry in computeMacroArgsCache
Follow-up to e7870223d8

Differential Revision: https://reviews.llvm.org/D86230
2020-10-22 14:18:28 -07:00
Jan Korous e7870223d8 [SourceManager] Skip module maps when searching files for macro arguments
Differential Revision: https://reviews.llvm.org/D86230
2020-10-22 12:36:51 -07:00
Duncan P. N. Exon Smith 156e8b3702 clang/Basic: Remove ContentCache::getRawBuffer, NFC
Replace `ContentCache::getRawBuffer` with `getBufferDataIfLoaded` and
`getBufferIfLoaded`, excising another accessor for the underlying
`MemoryBuffer*` in favour of `StringRef` and `MemoryBufferRef`.

Differential Revision: https://reviews.llvm.org/D89445
2020-10-22 14:00:44 -04:00
Marco Antognini a779a16993 [OpenCL] Remove unused extensions
Many non-language extensions are defined but also unused. This patch
removes them with their tests as they do not require compiler support.

The cl_khr_select_fprounding_mode extension is also removed because it
has been deprecated since OpenCL 1.1 and Clang doesn't have any specific
support for it.

The cl_khr_context_abort extension is only referred to in "The OpenCL
Specification", version 1.2 and 2.0, in Table 4.3, but no specification
is provided in "The OpenCL Extension Specification" for these versions.
Because it is both unused in Clang and lacks specification, this
extension is removed.

The following extensions are platform extensions that bring new OpenCL
APIs but do not impact the kernel language nor require compiler support.
They are therefore removed.

- cl_khr_gl_sharing, introduced in OpenCL 1.0

- cl_khr_icd, introduced in OpenCL 1.2

- cl_khr_gl_event, introduced in OpenCL 1.1
Note: this extension adds a new API to create cl_event but it also
specifies that these can only be used by clEnqueueAcquireGLObjects.
Hence, they cannot be used on the device side and the extension does
not impact the kernel language.

- cl_khr_d3d10_sharing, introduced in OpenCL 1.1

- cl_khr_d3d11_sharing, introduced in OpenCL 1.2

- cl_khr_dx9_media_sharing, introduced in OpenCL 1.2

- cl_khr_image2d_from_buffer, introduced in OpenCL 1.2

- cl_khr_initialize_memory, introduced in OpenCL 1.2

- cl_khr_gl_depth_images, introduced in OpenCL 1.2
Note: this extension is related to cl_khr_depth_images but only the
latter adds new features to the kernel language.

- cl_khr_spir, introduced in OpenCL 1.2

- cl_khr_egl_event, introduced in OpenCL 1.2
Note: this extension adds a new API to create cl_event but it also
specifies that these can only be used by clEnqueueAcquire* API
functions. Hence, they cannot be used on the device side and the
extension does not impact the kernel language.

- cl_khr_egl_image, introduced in OpenCL 1.2

- cl_khr_terminate_context, introduced in OpenCL 1.2

The minimum required OpenCL version used in OpenCLExtensions.def for
these extensions is not always correct. Removing these address that
issue.

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D89372
2020-10-22 17:01:31 +01:00
Tianqing Wang be39a6fe6f [X86] Add User Interrupts(UINTR) instructions
For more details about these instructions, please refer to the latest
ISE document:
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D89301
2020-10-22 17:33:07 +08:00
Duncan P. N. Exon Smith 4aa97e3dac SourceManager: Simplify early returns in ContentCache::getBufferOrNone, NFC
As suggested in the review for https://reviews.llvm.org/D89430, simplify
the logic for marking the buffer as invalid in the early return paths.

Differential Revision: https://reviews.llvm.org/D89722
2020-10-20 21:26:37 -04:00
Duncan P. N. Exon Smith 296314516d ContentCache: Simplify by always owning the MemoryBuffer
This changes `ContentCache::Buffer` to use
`std::unique_ptr<MemoryBuffer>` instead of the `PointerIntPair`. It
drops the (mostly unused) `DoNotFree` bit, instead creating a (new)
non-owning `MemoryBuffer` instance when passed a `MemoryBufferRef`.

Differential Revision: https://reviews.llvm.org/D67030
2020-10-20 21:03:53 -04:00
Duncan P. N. Exon Smith 1d78e2101a clang/Basic: ContentCache::InvalidFlag => ContentCache::IsBufferInvalid, NFC
Move a flag out of the `MemoryBuffer*` to unblock changing it to a
`unique_ptr`. There are plenty of bits available in the bitfield below.

Differential Revision: https://reviews.llvm.org/D89431
2020-10-20 19:28:17 -04:00
Duncan P. N. Exon Smith 747b134d01 clang/Basic: Remove SourceManager::getBufferPointer, NFC
Inline `Source::getBufferPointer` into its only remaining caller,
`getBufferOrNone`. No functionality change.

Differential Revision: https://reviews.llvm.org/D89430
2020-10-20 18:02:42 -04:00
Duncan P. N. Exon Smith 2dc7e0c6a5 clang/Basic: Replace SourceManager::getMemoryBufferForFile, NFC
Replace `SourceManager::getMemoryBufferForFile`, which returned a
dereferenceable `MemoryBuffer*` and had a `bool*Invalid` out parameter,
with `getMemoryBufferForFileOrNone` (returning
`Optional<MemoryBufferRef>`) and `getMemoryBufferForFileOrFake`
(returning `MemoryBufferRef`).

Differential Revision: https://reviews.llvm.org/D89429
2020-10-20 17:01:23 -04:00
Duncan P. N. Exon Smith 51d1d585e5 clang/Frontend: Use MemoryBufferRef in FrontendInputFile (and remove SourceManager::getBuffer)
In order to drop the final callers to `SourceManager::getBuffer`, change
`FrontendInputFile` to use `Optional<MemoryBufferRef>`. Also updated
the "unowned" version of `SourceManager::createFileID` to take a
`MemoryBufferRef` (it now calls `MemoryBuffer::getMemBuffer`, which
creates a `MemoryBuffer` that does not own the buffer data).

Differential Revision: https://reviews.llvm.org/D89427
2020-10-20 13:35:46 -04:00
Mikhail Maltsev 234c47ae2a [clang][Basic] Make SourceLocation usable as key in hash maps, NFCI
This change creates a `DenseMapInfo` trait specialization for the
SourceLocation class. The empty key, the tombstone key, and the hash
function are identical to `DenseMapInfo<unsigned>`, because we already
have hash maps that use raw the representation of `SourceLocation` as
a key.

The update of existing `DenseMap`s containing raw representation of
`SourceLocation`s will be done in a follow-up patch. As an example
the patch makes use of the new trait in one instance:
clang-tidy/google/UpgradeGoogletestCaseCheck.{h,cpp}

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D89719
2020-10-20 15:52:59 +01:00
Yaxun (Sam) Liu 52bcd691cb Recommit "[CUDA][HIP] Defer overloading resolution diagnostics for host device functions"
This recommits 7f1f89ec8d and
40df06cdaf with bug fixes for
memory sanitizer failure and Tensile build failure.
2020-10-19 17:48:04 -04:00
Yaxun (Sam) Liu 7e561b62d2 [NFC] Refactor DiagnosticBuilder and PartialDiagnostic
PartialDiagnostic misses some functions compared to DiagnosticBuilder.

This patch refactors DiagnosticBuilder and PartialDiagnostic, extracts
the common functionality so that the streaming << operators are
shared.

Differential Revision: https://reviews.llvm.org/D84362
2020-10-19 17:48:04 -04:00
Kito Cheng cfa7094e49 [RISCV] Add -mtune support
- The goal of this patch is improve option compatible with RISCV-V GCC,
   -mcpu support on GCC side will sent patch in next few days.

 - -mtune only affect the pipeline model and non-arch/extension related
   target feature, e.g. instruction fusion; in td file it called
   TuneFeatures, which is introduced by X86 back-end[1].

 - -mtune accept all valid option for -mcpu and extra alias processor
   option, e.g. `generic`, `rocket` and `sifive-7-series`, the purpose is
   option compatible with RISCV-V GCC.

 - Processor alias for -mtune will resolve according the current target arch,
   rv32 or rv64, e.g. `rocket` will resolve to `rocket-rv32` or `rocket-rv64`.

 - Interaction between -mcpu and -mtune:
   * -mtune has higher priority than -mcpu for pipeline model and
     TuneFeatures.

[1] https://reviews.llvm.org/D85165

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D89025
2020-10-16 13:55:08 +08:00
Stanislav Mekhanoshin d1beb95d12 [AMDGPU] gfx1032 target
Differential Revision: https://reviews.llvm.org/D89487
2020-10-15 12:41:18 -07:00
Duncan P. N. Exon Smith 54c1bcab90 clang/Basic: Stop using SourceManager::getBuffer, NFC
Update clang/lib/Basic to stop relying on a `MemoryBuffer*`, using the
`MemoryBufferRef` from `getBufferOrNone` or `getBufferOrFake` instead of
`getBuffer`.

Differential Revision: https://reviews.llvm.org/D89394
2020-10-14 22:42:56 -04:00
Duncan P. N. Exon Smith d758f79e5d clang/Basic: Replace ContentCache::getBuffer with Optional semantics
Remove `ContentCache::getBuffer`, which always returned a
dereferenceable `MemoryBuffer*` and had a `bool*Invalid` out parameter,
and replace it with:

- `ContentCache::getBufferOrNone`, which returns
  `Optional<MemoryBufferRef>`. This is the new API that consumers should
  use. Later it could be renamed to `getBuffer`, but intentionally using
  a different name to root out any unexpected callers.
- `ContentCache::getBufferPointer`, which returns `MemoryBuffer*` with
  "optional" semantics. This is `private` to avoid growing callers and
  `SourceManager` has temporarily been made a `friend` to access it.
  Later paches will update the transitive callers to not need a raw
  pointer, and eventually this will be deleted.

No functionality change intended here.

Differential Revision: https://reviews.llvm.org/D89348
2020-10-14 15:55:18 -04:00
Wang, Pengfei 412cdcf2ed [X86] Add HRESET instruction.
For more details about these instructions, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D89102
2020-10-13 08:47:26 +08:00
Fangrui Song 012dd42e02 [X86] Support -march=x86-64-v[234]
PR47686. These micro-architecture levels are defined in the x86-64 psABI:

https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9

GCC 11 will support these levels.

Note, -mtune=x86-64-v[234] are invalid and __builtin_cpu_is cannot be
used on them.

Reviewed By: craig.topper, RKSimon

Differential Revision: https://reviews.llvm.org/D89197
2020-10-12 10:29:46 -07:00
Fangrui Song cbe4d973ed [X86] Define __LAHF_SAHF__ if feature 'sahf' is set or 32-bit mode
GCC 11 will define this macro.

In LLVM, the feature flag only applies to 64-bit mode and we always define the
macro in 32-bit mode. This is different from GCC -m32 in which -mno-sahf can
suppress the macro. The discrepancy can unlikely cause trouble.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D89198
2020-10-11 09:46:00 -07:00
Tim Renouf 666ef0db20 [AMDGPU] Add gfx602, gfx705, gfx805 targets
At AMD, in an internal audit of our code, we found some corner cases
where we were not quite differentiating targets enough for some old
hardware. This commit is part of fixing that by adding three new
targets:

* The "Oland" and "Hainan" variants of gfx601 are now split out into
  gfx602. LLPC (in the GPUOpen driver) and other front-ends could use
  that to avoid using the shaderZExport workaround on gfx602.

* One variant of gfx703 is now split out into gfx705. LLPC and other
  front-ends could use that to avoid using the
  shaderSpiCsRegAllocFragmentation workaround on gfx705.

* The "TongaPro" variant of gfx802 is now split out into gfx805.
  TongaPro has a faster 64-bit shift than its former friends in gfx802,
  and a subtarget feature could be set up for that to take advantage of
  it. This commit does not make that change; it just adds the target.

V2: Add clang changes. Put TargetParser list in order.
V3: AMDGCNGPUs table in TargetParser.cpp needs to be in GPUKind order,
    so fix the GPUKind order.

Differential Revision: https://reviews.llvm.org/D88916

Change-Id: Ia901a7157eb2f73ccd9f25dbacec38427312377d
2020-10-10 17:22:22 +01:00
Fanbo Meng c781dc74a8 [SystemZ][z/OS] Set default alignment rules for z/OS target
Set the default alignment control variables for z/OS target and add test case for alignment rules on z/OS.

Reviewed By: abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D88845
2020-10-06 13:16:15 -04:00
Yaxun (Sam) Liu cbd420c5ed [CUDA][HIP] Fix bound arch for offload action for fat binary
Currently CUDA/HIP toolchain uses "unknown" as bound arch
for offload action for fat binary. This causes -mcpu or -march
with "unknown" added in HIPToolChain::TranslateArgs or
CUDAToolChain::TranslateArgs.

This causes issue for https://reviews.llvm.org/D88377 since
HIP toolchain needs to check -mcpu in HIPToolChain::TranslateArgs.

The bound arch of offload action for fat binary is not really
used, therefore set it to CudaArch::UNUSED.

Differential Revision: https://reviews.llvm.org/D88524
2020-10-02 19:05:51 -04:00
Yaxun (Sam) Liu 36501b180a Emit predefined macro for wavefront size for amdgcn
Also fix the issue of multiple -m[no-]wavefrontsize64
options to make the last one wins.

Differential Revision: https://reviews.llvm.org/D88370
2020-10-02 10:17:21 -04:00
Sjoerd Meijer 8825fec37e [AArch64] Add CPU Cortex-R82
This adds support for -mcpu=cortex-r82. Some more information about this
core can be found here:

https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-r82

One note about the system register: that is a bit of a refactoring because of
small differences between v8.4-A AArch64 and v8-R AArch64.

This is based on patches from Mark Murray and Mikhail Maltsev.

Differential Revision: https://reviews.llvm.org/D88660
2020-10-02 12:47:23 +01:00
Akira Hatanaka 21cf2e6c26 Handle unknown OSes in DarwinTargetInfo::getExnObjectAlignment
rdar://problem/69727650
2020-09-30 16:05:17 -07:00
Xiang1 Zhang 413577a879 [X86] Support Intel Key Locker
Key Locker provides a mechanism to encrypt and decrypt data with an AES key without having access
to the raw key value by converting AES keys into “handles”. These handles can be used to perform the
same encryption and decryption operations as the original AES keys, but they only work on the current
system and only until they are revoked. If software revokes Key Locker handles (e.g., on a reboot),
then any previous handles can no longer be used.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D88398
2020-09-30 18:08:45 +08:00
Baptiste Saleil 0156914275 [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types
This patch legalizes the v256i1 and v512i1 types that will be used for MMA.

It implements loads and stores of these types.
v256i1 is a pair of VSX registers, so for this type, we load/store the two
underlying registers. v512i1 is used for MMA accumulators. So in addition to
loading and storing the 4 associated VSX registers, we generate instructions to
prime (copy the VSX registers to the accumulator) after loading and unprime
(copy the accumulator back to the VSX registers) before storing.

This patch also adds the UACC register class that is necessary to implement the
loads and stores. This class represents accumulator in their unprimed form and
allow the distinction between primed and unprimed accumulators to avoid invalid
copies of the VSX registers associated with primed accumulators.

Differential Revision: https://reviews.llvm.org/D84968
2020-09-28 14:39:37 -05:00
Reid Kleckner 276f68eace Revert "Add a static_assert confirming that DiagnosticBuilder is small"
This reverts commit a32feed0db.

This assert doesn't hold in 32-bit builds, I didn't do the math right.
2020-09-24 16:39:46 -07:00
Reid Kleckner a32feed0db Add a static_assert confirming that DiagnosticBuilder is small 2020-09-24 16:38:41 -07:00
Reid Kleckner b62fd436a3 Revert "Recommit [NFC] Refactor DiagnosticBuilder and PartialDiagnostic"
This reverts commit 8e780a1653.

DiagnosticBuilder is a value type, created on the stack everywhere. IMO
we should not be adding a vtable to it, and making very operator<< use a
virtual interface. There are other feasible designs for implementing
this. The original review, D84362, was approved by @tra, who is
responsible for Clang's CUDA support, but it wasn't reviewed by @rsmith
or anyone responsible for clang's diagnostic library.
2020-09-24 11:16:55 -07:00
Reid Kleckner 3453b6928d Revert "Recommit "[CUDA][HIP] Defer overloading resolution diagnostics for host device functions""
This reverts commit e39da8ab6a.

This depends on a change that needs additional design review and needs
to be reverted.
2020-09-24 11:16:54 -07:00
Nathan Froyd 31a3c5fb45 [clang] use string tables for static diagnostic descriptions
Using a pointer for the description string in StaticDiagInfoRec causes
several problems:

1. We don't need to use a whole pointer to represent the string;
2. The use of pointers incurs runtime relocations for those pointers;
   the relocations take up space on disk and represent runtime overhead;
3. The need to relocate data implies that, on some platforms, the entire
   array containing StaticDiagInfoRecs cannot be shared between processes.

This patch changes the storage scheme for the diagnostic descriptions to
avoid these problems.  We instead generate (effectively) one large
string and then StaticDiagInfoRec conceptually holds offsets into the
string.  We elected to also move the storage of those offsets into a
separate array to further reduce the space required.

On x86-64 Linux, this change removes about 120KB of relocations and
moves about 60KB from the non-shareable .data.rel.ro section to
shareable .rodata.  (The array is about 80KB before this, but we
eliminated 4 bytes/entry by using offsets rather than pointers.)  We
actually reap this benefit twice, because these tables show up in both
libclang.so and libclang-cpp.so and we get the reduction in both places.

Differential Revision: https://reviews.llvm.org/D81865
2020-09-24 10:54:28 -04:00
Yaxun (Sam) Liu e39da8ab6a Recommit "[CUDA][HIP] Defer overloading resolution diagnostics for host device functions"
This recommits 7f1f89ec8d and
40df06cdaf after fixing memory
sanitizer failure.
2020-09-24 08:44:37 -04:00
Yaxun (Sam) Liu 8e780a1653 Recommit [NFC] Refactor DiagnosticBuilder and PartialDiagnostic
This recommits 829d14ee0a.

The patch was reverted due to a regression in some CUDA app
which was thought to be caused by this patch. However, investigation
showed that the regression was due to some other issues, therefore
recommit this patch.
2020-09-23 16:55:00 -04:00
Abhina Sreeskantharajan 0fb97fd6a4 [SystemZ][z/OS] Set default wchar_t type for zOS
Set the default wchar_t type on z/OS, and unsigned as the default.

Reviewed By: hubert.reinterpretcast, fanbo-meng

Differential Revision: https://reviews.llvm.org/D87624
2020-09-22 08:03:03 -04:00
Yaxun (Sam) Liu 829d14ee0a Revert "[NFC] Refactor DiagnosticBuilder and PartialDiagnostic"
This reverts commit ee5519d323.
2020-09-17 13:56:09 -04:00
Yaxun (Sam) Liu 772bd8a7d9 Revert "[CUDA][HIP] Defer overloading resolution diagnostics for host device functions"
This reverts commit 7f1f89ec8d.

This reverts commit 40df06cdaf.
2020-09-17 13:55:31 -04:00
Yaxun (Sam) Liu 40df06cdaf [CUDA][HIP] Defer overloading resolution diagnostics for host device functions
In CUDA/HIP a function may become implicit host device function by
pragma or constexpr. A host device function is checked in both
host and device compilation. However it may be emitted only
on host or device side, therefore the diagnostics should be
deferred until it is known to be emitted.

Currently clang is only able to defer certain diagnostics. This causes
false alarms and limits the usefulness of host device functions.

This patch lets clang defer all overloading resolution diagnostics for host device functions.

An option -fgpu-defer-diag is added to control this behavior. By default
it is off.

It is NFC for other languages.

Differential Revision: https://reviews.llvm.org/D84364
2020-09-17 11:30:42 -04:00
Yaxun (Sam) Liu ee5519d323 [NFC] Refactor DiagnosticBuilder and PartialDiagnostic
PartialDiagnostic misses some functions compared to DiagnosticBuilder.

This patch refactors DiagnosticBuilder and PartialDiagnostic, extracts
the common functionality so that the streaming << operators are
shared.

Differential Revision: https://reviews.llvm.org/D84362
2020-09-16 17:35:28 -04:00
Fanbo Meng 2240ca0bd1 [SystemZ][z/OS] Set aligned allocation unavailable by default for z/OS
Aligned allocation is not supported on z/OS. This patch sets -faligned-alloc-unavailable as default in z/OS toolchain.

Reviewed By: abhina.sreeskantharajan, hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D87611
2020-09-16 14:49:03 -04:00
Jan Korous ae726fecae [SourceManager] Explicitly check for potential iterator underflow
Differential Revision: https://reviews.llvm.org/D86231
2020-09-15 15:54:16 -07:00
Qiu Chaofan 8ecc8520bc [FPEnv] [Clang] Enable constrained FP support for PowerPC
d4ce862f introduced HasStrictFP to disable generating constrained FP
operations for platforms lacking support. Since work for enabling
constrained FP on PowerPC is almost done, we'd like to enable it.

Reviewed By: kpn, steven.zhang

Differential Revision: https://reviews.llvm.org/D87223
2020-09-12 00:39:52 +08:00
Rainer Orth 76e85ae268 [clang][Sparc] Default to -mcpu=v9 for Sparc V8 on Solaris
As reported in Bug 42535, `clang` doesn't inline atomic ops on 32-bit
Sparc, unlike `gcc` on Solaris.  In a 1-stage build with `gcc`, only two
testcases are affected (currently `XFAIL`ed), while in a 2-stage build more
than 100 tests `FAIL` due to this issue.

The reason for this `gcc`/`clang` difference is that `gcc` on 32-bit
Solaris/SPARC defaults to `-mpcu=v9` where atomic ops are supported, unlike
with `clang`'s default of `-mcpu=v8`.  This patch changes `clang` to use
`-mcpu=v9` on 32-bit Solaris/SPARC, too.

Doing so uncovered two bugs:

`clang -m32 -mcpu=v9` chokes with any Solaris system headers included:

  /usr/include/sys/isa_defs.h:461:2: error: "Both _ILP32 and _LP64 are defined"
  #error "Both _ILP32 and _LP64 are defined"

While `clang` currently defines `__sparcv9` in a 32-bit `-mcpu=v9`
compilation, neither `gcc` nor Studio `cc` do.  In fact, the Studio 12.6
`cc(1)` man page clearly states:

            These predefinitions are valid in all modes:
  [...]
               __sparcv8 (SPARC)
               __sparcv9 (SPARC -m64)

At the same time, the patch defines `__GCC_HAVE_SYNC_COMPARE_AND_SWAP_[1248]`
for a 32-bit Sparc compilation with any V9 cpu.  I've also changed
`MaxAtomicInlineWidth` for V9, matching what `gcc` does and the Oracle
Developer Studio 12.6: C User's Guide documents (Ch. 3, Support for Atomic
Types, 3.1 Size and Alignment of Atomic C Types).

The two testcases that had been `XFAIL`ed for Bug 42535 are un-`XFAIL`ed
again.

Tested on `sparcv9-sun-solaris2.11` and `amd64-pc-solaris2.11`.

Differential Revision: https://reviews.llvm.org/D86621
2020-09-11 09:53:19 +02:00
Yaxun (Sam) Liu 041da0d828 [HIP] Add gfx1031 and gfx1030
Differential Revision: https://reviews.llvm.org/D87324
2020-09-08 16:38:34 -04:00
Cullen Rhodes f9091e56d3 [clang][aarch64] Drop experimental from __ARM_FEATURE_SVE_BITS macro
The __ARM_FEATURE_SVE_BITS feature macro is specified in the Arm C
Language Extensions (ACLE) for SVE [1] (version 00bet5). From the spec,
where __ARM_FEATURE_SVE_BITS==N:

    When N is nonzero, indicates that the implementation is generating
    code for an N-bit SVE target and that the arm_sve_vector_bits(N)
    attribute is available.

This was defined in D83550 as __ARM_FEATURE_SVE_BITS_EXPERIMENTAL and
enabled under the -msve-vector-bits flag to simplify initial tests.
This patch drops _EXPERIMENTAL now there is support for the feature.

[1] https://developer.arm.com/documentation/100987/latest

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D86720
2020-09-03 09:39:37 +00:00
Douglas Yung 8d2d0e8485 Revert "Move all fields of '-cc1' option related classes into def file databases"
This reverts commit c4a2a13074.

This commit was causing a test failure: http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/1068
2020-09-02 10:38:34 -07:00
Daniel Grumberg c4a2a13074 Move all fields of '-cc1' option related classes into def file databases
Once the new option parsing system is committed, this will allow to generate a
check to ensure that correct command line generation happens

Differential Revision: https://reviews.llvm.org/D86290
2020-09-02 13:07:01 +01:00
Brad Smith 4fbf0636a2 Remove OpenBSD/sparc support 2020-08-29 20:47:18 -04:00
Dimitry Andric fc2dac4116 [PPC] Fix platform definitions when compiling FreeBSD powerpc64 as LE
As a prerequisite to doing experimental buids of pieces of FreeBSD PowerPC64 as little-endian, allow actually targeting it.

This is needed so basic platform definitions are pulled in. Without it, the compiler will only run freestanding.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D73425
2020-08-29 12:03:20 +02:00
Craig Topper 71f3169e1b [X86] Default to -mtune=generic unless -march is passed to the driver. Add TuneCPU to the AST serialization
This patch defaults to -mtune=generic unless -march is present. If -march is present we'll use the empty string unless its overridden by mtune. The back should use the target cpu if the tune-cpu isn't present.

It also adds AST serialization support to fix some tests that emit AST and parse it back. These tests diff the IR against the output from not going through AST. So if we don't serialize the tune CPU we fail the diff.

Differential Revision: https://reviews.llvm.org/D86488
2020-08-26 14:52:03 -07:00
Abhina Sreeskantharajan 97ccf93b36 [SystemZ][z/OS] Add z/OS Target and define macros
This patch adds the z/OS target and defines macros as a stepping stone
towards enabling a native build on z/OS.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D85324
2020-08-25 15:51:59 -04:00
Freddy Ye e02d081f2b [X86] Support -march=sapphirerapids
Support -march=sapphirerapids for x86.
Compare with Icelake Server, it includes 14 more new features. They are
amxtile, amxint8, amxbf16, avx512bf16, avx512vp2intersect, cldemote,
enqcmd, movdir64b, movdiri, ptwrite, serialize, shstk, tsxldtrk, waitpkg.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D86503
2020-08-25 14:21:21 +08:00
Baptiste Saleil 512e256c0d [PowerPC] Add clang options to control MMA support
This patch adds frontend and backend options to enable and disable
the PowerPC MMA operations added in ISA 3.1. Instructions using these
options will be added in subsequent patches.

Differential Revision: https://reviews.llvm.org/D81442
2020-08-24 09:35:55 -05:00
Craig Topper cc7bf9bcbf [X86] Allow 32-bit mode only CPUs with -mtune on 64-bit targets
gcc errors on this, but I'm nervous that since -mtune has been
ignored by clang for so long that there may be code bases out
there that pass 32-bit cpus to clang.
2020-08-22 16:38:05 -07:00
Bevin Hansson 1a995a0af3 [ADT] Move FixedPoint.h from Clang to LLVM.
This patch moves FixedPointSemantics and APFixedPoint
from Clang to LLVM ADT.

This will make it easier to use the fixed-point
classes in LLVM for constructing an IR builder for
fixed-point and for reusing the APFixedPoint class
for constant evaluation purposes.

RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-August/144025.html

Reviewed By: leonardchan, rjmccall

Differential Revision: https://reviews.llvm.org/D85312
2020-08-20 10:29:45 +02:00
Craig Topper 724f570ad2 [X86] Add support 'tune' in target attribute
This adds parsing and codegen support for tune in target attribute.

I've implemented this so that arch in the target attribute implicitly disables tune from the command line. I'm not sure what gcc does here. But since -march implies -mtune. I assume 'arch' in the target attribute implies tune in the target attribute.

Differential Revision: https://reviews.llvm.org/D86187
2020-08-19 15:58:19 -07:00
Martin Storsjö cb6cf18ff5 [clang] Remove stray semicolons, fixing GCC warnings. NFC. 2020-08-19 10:41:03 +03:00
Yaxun (Sam) Liu 7546b29e76 [HIP] Support target id by --offload-arch
This patch introduces support of target id by
-offload-arch.

Differential Revision: https://reviews.llvm.org/D60620
2020-08-18 23:43:53 -04:00
Brad Smith d9ff48d038 WCharType and WIntType are always signed int on OpenBSD. 2020-08-18 19:59:54 -04:00
Brad Smith 592b8996bf Hook up OpenBSD 64-bit RISC-V support 2020-08-18 18:59:55 -04:00
Craig Topper 4cbceb74bb [X86] Add basic support for -mtune command line option in clang
Building on the backend support from D85165. This parses the command line option in the driver, passes it on to CC1 and adds a function attribute.

-Still need to support tune on the target attribute.
-Need to use "generic" as the tuning by default. But need to change generic in the backend first.
-Need to set tune if march is specified and mtune isn't.
-May need to disable getHostCPUName's ability to guess CPU name from features when it doesn't have a family/model match for mtune=native. That's what gcc appears to do.

Differential Revision: https://reviews.llvm.org/D85384
2020-08-18 15:13:19 -07:00
Craig Topper 5c1fe4e20f [Target] Cache the command line derived feature map in TargetOptions.
We can use this to remove some calls to initFeatureMap from Sema
and CodeGen when a function doesn't have a target attribute.

This reduces compile time of the linux kernel where this map
is needed to diagnose some inline assembly constraints based
on whether sse, avx, or avx512 is enabled.

Differential Revision: https://reviews.llvm.org/D85807
2020-08-12 12:37:23 -07:00
Craig Topper 2b8ad6b604 [WebAssembly] Don't depend on the flags set by handleTargetFeatures in initFeatureMap.
Properly set "simd128" in the feature map when "unimplemented-simd128"
is requested.

initFeatureMap is used to create the feature vector used by
handleTargetFeatures. There are later calls to initFeatureMap in
CodeGen that were using these flags to recreate the map. But the
original feature vector should be passed to those calls. So that
should be enough to rebuild the map.

The only issue seemed to be that simd128 was not enabled in the
map by the first call to initFeatureMap. Using the SIMDLevel set
by handleTargetFeatures in the later calls allowed simd128 to be
set in the later versions of the map.

To fix this I've added an override of setFeatureEnabled that
will update the map the first time with the correct simd dependency.

Differential Revision: https://reviews.llvm.org/D85806
2020-08-12 11:43:46 -07:00
Erich Keane aa4bc1cb79 Limit Max Vector alignment on COFF targets to 8192.
COFF targets have a max object alignment of 8192, so trying to create
one with a larger size results in an unreachable in WinCOFFObjectWriter.

For the reproducer I have uses thread local storage, however other
alignments are likely affected as well.

This patch sets the MaxVectorAlign for COFF to 8192.  Additionally,
though there is no longer a way to reproduce that I could find, it
correctly sets the MaxTLSAlign for COFF to that value as well, so that
if anyone comes up with a situation where this is true, it will cause an
error.

Differential Revision: https://reviews.llvm.org/D85543
2020-08-12 06:35:35 -07:00
Brad Smith 5fe171321c [Sparc] Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP macros on SPARCv9 2020-08-11 00:04:24 -04:00
Krzysztof Parzyszek 7406eb4f6a [Hexagon] Avoid creating an empty target feature
If the CPU string is empty, the target feature map may end up having
an empty string inserted to it. The symptom of the problem is a warning
message:
  '+' is not a recognized feature for this target (ignoring feature)
Also, the target-features attribute in the module will have an empty
string in it.
2020-08-10 10:37:24 -05:00
Brad Smith 92e82a2890 int64_t and intmax_t are always (signed) long long on OpenBSD. 2020-08-09 19:43:16 -04:00
Brad Smith 4eb4ebf76a Hook up OpenBSD 64-bit PowerPC support 2020-08-08 17:51:19 -04:00
Bevin Hansson aa0d19a0c8 [Fixed Point] Add fixed-point shift operations and consteval.
Reviewers: rjmccall, leonardchan, bjope

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D83212
2020-08-07 15:09:24 +02:00
Simon Pilgrim 24cca30f7f Remove unreachable return (PR47026) 2020-08-07 11:23:43 +01:00
Craig Topper 504a197fe5 [X86] Rename X86::getImpliedFeatures to X86::updateImpliedFeatures and pass clang's StringMap directly to it.
No point in building a vector of StringRefs for clang to apply to the
StringMap. Just pass the StringMap and modify it directly.
2020-08-06 00:20:46 -07:00
Stanislav Mekhanoshin ea7d0e2996 [AMDGPU] gfx1031 target
Differential Revision: https://reviews.llvm.org/D85337
2020-08-05 12:36:26 -07:00
Baptiste Saleil 7aaa85627b [PowerPC] Add options to control paired vector memops support
Adds frontend and backend options to enable and disable the
PowerPC paired vector memory operations added in ISA 3.1.
Instructions using these options will be added in subsequent patches.

Differential Revision: https://reviews.llvm.org/D83722
2020-07-29 14:00:53 -05:00
Joel E. Denny 9f2f3b9de6 [OpenMP] Implement TR8 `present` motion modifier in Clang (1/2)
This patch implements Clang front end support for the OpenMP TR8
`present` motion modifier for `omp target update` directives.  The
next patch in this series implements OpenMP runtime support.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D84711
2020-07-29 12:18:45 -04:00
Alexey Bader 8d27be8dba [OpenCL] Add global_device and global_host address spaces
This patch introduces 2 new address spaces in OpenCL: global_device and global_host
which are a subset of a global address space, so the address space scheme will be
looking like:

```
generic->global->host
                          ->device
             ->private
             ->local
constant
```

Justification: USM allocations may be associated with both host and device memory. We
want to give users a way to tell the compiler the allocation type of a USM pointer for
optimization purposes. (Link to the Unified Shared Memory extension:
https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/USM/cl_intel_unified_shared_memory.asciidoc)

Before this patch USM pointer could be only in opencl_global
address space, hence a device backend can't tell if a particular pointer
points to host or device memory. On FPGAs at least we can generate more
efficient hardware code if the user tells us where the pointer can point -
being able to distinguish between these types of pointers at compile time
allows us to instantiate simpler load-store units to perform memory
transactions.

Patch by Dmitry Sidorov.

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D82174
2020-07-29 17:24:53 +03:00
Joel E. Denny 69fc33f0cd Revert "[OpenMP] Implement TR8 `present` motion modifier in Clang (1/2)"
This reverts commit 3c3faae497.

It breaks a number of bots.
2020-07-28 20:30:05 -04:00
Joel E. Denny 3c3faae497 [OpenMP] Implement TR8 `present` motion modifier in Clang (1/2)
This patch implements Clang front end support for the OpenMP TR8
`present` motion modifier for `omp target update` directives.  The
next patch in this series implements OpenMP runtime support.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D84711
2020-07-28 19:15:18 -04:00
Joel E. Denny a3d1f88fa7 [OpenMP][NFC] Consolidate `to` and `from` clause modifiers
`to` and `from` clauses take the same modifiers, which are called
"motion modifiers" in TR8, so implement handling of their modifiers
once not twice.  This will make it easier to implement additional
motion modifiers in the future.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D84710
2020-07-28 19:15:18 -04:00
Jinsong Ji d28f86723f Re-land "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"
This reverts commit bf544fa1c3.

Fixed the typo in PPCInstrInfo.cpp.
2020-07-28 14:00:11 +00:00
Jinsong Ji bf544fa1c3 Revert "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"
This reverts commit adffce7153.

This is breaking test-suite, revert while investigation.
2020-07-27 21:07:00 +00:00
Jinsong Ji adffce7153 [PowerPC] Remove QPX/A2Q BGQ/BGP CNK support
Per RFC http://lists.llvm.org/pipermail/llvm-dev/2020-April/141295.html
no one is making use of QPX/A2Q/BGQ/BGP CNK anymore.

This patch remove the support of QPX/A2Q in llvm, BGQ/BGP in clang,
CNK support in openmp/polly.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D83915
2020-07-27 19:24:39 +00:00
Xiangling Liao 05ad8e9429 [AIX] Implement AIX special alignment rule about double/long double
Implement AIX default `power` alignment rule by adding `PreferredAlignment` and
`PreferredNVAlignment` in ASTRecordLayout class.

The patchh aims at returning correct value for `__alignof(x)` and `alignof(x)`
under `power` alignment rules.

Differential Revision: https://reviews.llvm.org/D79719
2020-07-27 15:13:03 -04:00
Ulrich Weigand 7f003957bf [SystemZ] Implement __builtin_eh_return_data_regno
Implement __builtin_eh_return_data_regno for SystemZ.
Match behavior of GCC.

Author: slavek-kucera

Differential Revision: https://reviews.llvm.org/D84341
2020-07-24 10:28:06 +02:00
Joel E. Denny aa82c40f0a [OpenMP] Implement TR8 `present` map type modifier in Clang (1/2)
This patch implements Clang front end support for the OpenMP TR8
`present` map type modifier.  The next patch in this series implements
OpenMP runtime support.

This patch does not attempt to implement TR8 sec. 2.22.7.1 "map
Clause", p. 319, L14-16:

> If a map clause with a present map-type-modifier is present in a map
> clause, then the effect of the clause is ordered before all other
> map clauses that do not have the present modifier.

Compare to L10-11, which Clang does not appear to implement yet:

> For a given construct, the effect of a map clause with the to, from,
> or tofrom map-type is ordered before the effect of a map clause with
> the alloc, release, or delete map-type.

This patch also does not implement the `present` implicit-behavior for
`defaultmap` or the `present` motion-modifier for `target update`.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D83061
2020-07-22 10:15:32 -04:00
Adrian Prantl b907ad539a [NFC] Clean up doc comment and implementation for Module::isSubModuleOf.
Patch by Varun Gandhi!

Differential Revision: https://reviews.llvm.org/D84087
2020-07-21 16:23:36 -07:00
Akira Hatanaka 73bc23ff86 Fix the data layout mangling specification for 'i686-pc-macho'
Use 'o' for the mangling specification instead of 'e'. This fixes an
error in the backend caused by a mismatch between the data layouts
generated by the backend and the frontend.

rdar://problem/64168540
2020-07-21 12:58:17 -07:00
Anatoly Trosinenko 16a4350f76 [MSP430] Actualize the toolchain description
Reviewed By: krisb

Differential Revision: https://reviews.llvm.org/D81676
2020-07-17 15:42:12 +03:00
Cullen Rhodes bb160e769d [Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute
Summary:

This patch implements parsing support for the 'arm_sve_vector_bits' type
attribute, defined by the Arm C Language Extensions (ACLE, version 00bet5,
section 3.7.3) for SVE [1].

The purpose of this attribute is to define fixed-length (VLST) versions
of existing sizeless types (VLAT). For example:

    #if __ARM_FEATURE_SVE_BITS==512
    typedef svint32_t fixed_svint32_t __attribute__((arm_sve_vector_bits(512)));
    #endif

Creates a type 'fixed_svint32_t' that is a fixed-length version of
'svint32_t' that is normal-sized (rather than sizeless) and contains
exactly 512 bits. Unlike 'svint32_t', this type can be used in places
such as structs and arrays where sizeless types can't.

Implemented in this patch is the following:

  * Defined and tested attribute taking single argument.
  * Checks the argument is an integer constant expression.
  * Attribute can only be attached to a single SVE vector or predicate
    type, excluding tuple types such as svint32x4_t.
  * Added the `-msve-vector-bits=<bits>` flag. When specified the
    `__ARM_FEATURE_SVE_BITS__EXPERIMENTAL` macro is defined.
  * Added a language option to store the vector size specified by the
    `-msve-vector-bits=<bits>` flag. This is used to validate `N ==
    __ARM_FEATURE_SVE_BITS`, where N is the number of bits passed to the
    attribute and `__ARM_FEATURE_SVE_BITS` is the feature macro defined under
    the same flag.

The `__ARM_FEATURE_SVE_BITS` macro will be made non-experimental in the final
patch of the series.

[1] https://developer.arm.com/documentation/100987/latest

This is patch 1/4 of a patch series.

Reviewers: sdesmalen, rsandifo-arm, efriedma, ctetreau, cameron.mcinally, rengolin, aaron.ballman

Reviewed By: sdesmalen, aaron.ballman

Differential Revision: https://reviews.llvm.org/D83550
2020-07-17 10:06:54 +00:00
Zakk Chen 294d1eae75 [RISCV] Add support for -mcpu option.
Summary:
1. gcc uses `-march` and `-mtune` flag to chose arch and
pipeline model, but clang does not have `-mtune` flag,
we uses `-mcpu` to chose both infos.
2. Add SiFive e31 and u54 cpu which have default march
and pipeline model.
3. Specific `-mcpu` with rocket-rv[32|64] would select
pipeline model only, and use the driver's arch choosing
logic to get default arch.

Reviewers: lenary, asb, evandro, HsiangKai

Reviewed By: lenary, asb, evandro

Tags: #llvm, #clang

Differential Revision: https://reviews.llvm.org/D71124
2020-07-16 11:46:22 -07:00
Logan Smith 2c2a297bb6 [clang][NFC] Add 'override' keyword to virtual function overrides
This patch adds override to several overriding virtual functions that were missing the keyword within the clang/ directory. These were found by the new -Wsuggest-override.
2020-07-14 08:59:57 -07:00
Craig Topper b4dbb37f32 [X86] Rename X86_CPU_TYPE_COMPAT_ALIAS/X86_CPU_TYPE_COMPAT/X86_CPU_SUBTYPE_COMPAT macros. NFC
Remove _COMPAT. Drop the ARCHNAME. Remove the non-COMPAT versions
that are no longer needed.

We now only use these macros in places where we need compatibility
with libgcc/compiler-rt. So we don't need to call out _COMPAT
specifically.
2020-07-12 17:00:24 -07:00
Kevin P. Neal d4ce862f2a Reland "[FPEnv][Clang][Driver] Disable constrained floating point on targets lacking support."
We currently have strict floating point/constrained floating point enabled
for all targets. Constrained SDAG nodes get converted to the regular ones
before reaching the target layer. In theory this should be fine.

However, the changes are exposed to users through multiple clang options
already in use in the field, and the changes are _completely_ _untested_
on almost all of our targets. Bugs have already been found, like
"https://bugs.llvm.org/show_bug.cgi?id=45274".

This patch disables constrained floating point options in clang everywhere
except X86 and SystemZ. A warning will be printed when this happens.

Use the new -fexperimental-strict-floating-point flag to force allowing
strict floating point on hosts that aren't already marked as supporting
it (X86 and SystemZ).

Differential Revision: https://reviews.llvm.org/D80952
2020-07-10 08:49:45 -04:00
Sylvestre Ledru bbea4d5e6b clang: Don't show a trailing space with --version when not built from the repo
Reported here:
https://bugs.llvm.org/show_bug.cgi?id=38998#c15

Reviewers: hans

Differential Revision: https://reviews.llvm.org/D83386
2020-07-08 14:02:02 +02:00
Craig Topper 3cbfe988bc [X86] Merge X86TargetInfo::setFeatureEnabled and X86TargetInfo::setFeatureEnabledImpl. NFC
setFeatureEnabled is a virtual function. setFeatureEnabledImpl
was its implementation. This split was to avoid virtual calls
when we need to call setFeatureEnabled in initFeatureMap.

With C++11 we can use 'final' on setFeatureEnabled to enable
the compiler to perform de-virtualization for the initFeatureMap
calls.
2020-07-06 23:54:56 -07:00
Craig Topper 16f3d698f2 [X86] Move the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp
Previously we had to specify the forward and backwards feature dependencies separately which was error prone. And as dependencies have gotten more complex it was hard to be sure the transitive dependencies were handled correctly. The way it was written was also not super readable.

This patch replaces everything with a table that lists what features a feature is dependent on directly. Then we can recursively walk through the table to find the transitive dependencies. This is largely based on how we handle subtarget features in the MC layer from the tablegen descriptions.

Differential Revision: https://reviews.llvm.org/D83273
2020-07-06 23:14:02 -07:00
Xiang1 Zhang 939d8309db [X86-64] Support Intel AMX Intrinsic
INTEL ADVANCED MATRIX EXTENSIONS (AMX).
AMX is a new programming paradigm, it has a set of 2-dimensional registers
(TILES) representing sub-arrays from a larger 2-dimensional memory image and
operate on TILES.

These intrinsics use direct TMM register number as its params.

Spec can be found in Chapter 3 here https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D83111
2020-07-07 10:13:40 +08:00
Craig Topper c359c5d534 [X86] Centalize the 'sse4' hack to a single place in X86TargetInfo::setFeatureEnabledImpl. NFCI
Instead of detecting the string in 2 places. Just swap the string
to 'sse4.1' or 'sse4.2' at the top of the function.

Prep work for a patch to switch the rest of this function to a
table based system. And I don't want to include 'sse4a' in the
table.
2020-07-06 15:00:32 -07:00
Kevin P. Neal 916e2ca997 Revert "[FPEnv][Clang][Driver] Disable constrained floating point on targets lacking support."
My mistake, I had a blocking reviewer.

This reverts commit 39d2ae0afb.
This reverts commit bfdafa32a0.
This reverts commit 2b35511350.

Differential Revision: https://reviews.llvm.org/D80952
2020-07-06 14:57:45 -04:00
Kevin P. Neal 39d2ae0afb [FPEnv][Clang][Driver] Disable constrained floating point on targets lacking support.
We currently have strict floating point/constrained floating point enabled
for all targets. Constrained SDAG nodes get converted to the regular ones
before reaching the target layer. In theory this should be fine.

However, the changes are exposed to users through multiple clang options
already in use in the field, and the changes are _completely_ _untested_
on almost all of our targets. Bugs have already been found, like
"https://bugs.llvm.org/show_bug.cgi?id=45274".

This patch disables constrained floating point options in clang everywhere
except X86 and SystemZ. A warning will be printed when this happens.

Differential Revision: https://reviews.llvm.org/D80952
2020-07-06 13:32:49 -04:00
Kazushi (Jam) Marukawa df3bda047d [VE] Correct stack alignment
Summary:
Change stack alignment from 64 bits to 128 bits to follow ABI correctly.
And add a regression test for datalayout.

Reviewers: simoll, k-ishizaka

Reviewed By: simoll

Subscribers: hiraditya, cfe-commits, llvm-commits

Tags: #llvm, #ve, #clang

Differential Revision: https://reviews.llvm.org/D83173
2020-07-06 17:25:29 +09:00
Kai Luo 68e07da3e5 [clang][PowerPC] Enable -fstack-clash-protection option for ppc64
Differential Revision: https://reviews.llvm.org/D81355
2020-07-05 03:43:56 +00:00
jasonliu 572dde55ee [XCOFF][AIX] Use 'L..' instead of '.L' for getPrivateGlobalPrefix in DataLayout
Summary:
D80831 changed part of the prefix usage for AIX.
But there are other places getting prefix from DataLayout.
This patch intends to make prefix usage consistent on AIX.

Reviewed by: hubert.reinterpretcast, daltenty

Differential Revision: https://reviews.llvm.org/D81270
2020-07-03 18:25:14 +00:00
Dmitry Preobrazhensky 53422e8b4f [AMDGPU] Added support of new inline assembler constraints
Added support for constraints 'I', 'J', 'L', 'B', 'C', 'Kf', 'DA', 'DB'.

See https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints.

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D81657
2020-07-03 18:01:12 +03:00
Whisperity 4cf24cb868 [NFC][clang] Add missing VALIDATE_DIAG_SIZE()
Originally when libCrossTU was introduced in commit
e350b0a196, the macro which thus had all
diagnostic kinds covered was not added.
2020-07-02 14:14:57 +02:00
Valentin Clement 2ddba3082c [flang][openmp] Use common Directive and Clause enum from llvm/Frontend
Summary:
This patch is removing the custom enumeration for OpenMP Directives and Clauses and replace them
with the newly tablegen generated one from llvm/Frontend. This is a first patch and some will follow to share the same
infrastructure where possible. The next patch should use the clauses allowance defined in the tablegen file.

Reviewers: jdoerfert, DavidTruby, sscalpone, kiranchandramohan, ichoyjx

Reviewed By: DavidTruby, ichoyjx

Subscribers: jholewinski, cfe-commits, dblaikie, MaskRay, ymandel, ichoyjx, mgorny, yaxunl, guansong, jfb, sstefan1, aaron.ballman, llvm-commits

Tags: #llvm, #flang, #clang

Differential Revision: https://reviews.llvm.org/D82906
2020-07-01 20:58:11 -04:00
Craig Topper 3537939cda [X86] Move frontend CPU feature initialization to a look up table based implementation. NFCI
This replaces the switch statement implementation in the clang's
X86.cpp with a lookup table in X86TargetParser.cpp.

I've used constexpr and copy of the FeatureBitset from
SubtargetFeature.h to store the features in a lookup table.
After the lookup the bitset is translated into strings for use
by the rest of the frontend code.

I had to modify the implementation of the FeatureBitset to avoid
bugs in gcc 5.5 constexpr handling. It seems to not like the
same array entry to be used on the left side and right hand side
of an assignment or &= or |=. I've also used uint32_t instead of
uint64_t and sized based on the X86::CPU_FEATURE_MAX.

I've initialized the features for different CPUs outside of the
table so that we can express inheritance in an adhoc way. This
was one of the big limitations of the switch and we had resorted
to labels and gotos.

Differential Revision: https://reviews.llvm.org/D82731
2020-06-30 12:04:58 -07:00
Francesco Petrogalli d54e4dded7 [sve][acle] Enable feature macros for SVE ACLE extensions.
Summary:
The following feature macros have been added:

__ARM_FEATURE_SVE_BF16

__ARM_FEATURE_SVE_MATMUL_INT8

__ARM_FEATURE_SVE_MATMUL_FP32

__ARM_FEATURE_SVE_MATMUL_FP64

The driver has been updated to enable them accordingly to the value of
the target feature passed at command line.

The SVE ACLE tests using the macros have been modified to work with
the target feature instead of passing the macro at command line.

Reviewers: sdesmalen, efriedma, c-rhodes, kmclaughlin, SjoerdMeijer, rengolin

Subscribers: tschuett, kristof.beyls, rkruppe, psnobl, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82623
2020-06-30 18:33:03 +00:00
Bevin Hansson 33bae9c265 [AST] Fix handling of some edge cases in fixed-point division.
Division by zero was not being handled, and division of
-EPSILON / MAX did not perform rounding correctly.
2020-06-30 13:47:12 +02:00
Nick Desaulniers 7b8cf98b4a Reland "[clang][SourceManager] cache Macro Expansions""
This reverts commit 33d63f02ce408d181e13089ee5a667fb2e1cdc78.

Differential Revision: https://reviews.llvm.org/D80681
2020-06-29 12:54:32 -07:00
Nick Desaulniers 7c2cb1448a Revert "[clang][SourceManager] cache Macro Expansions"
This reverts commit dffc142045.

Missed a hunk (D82690).
2020-06-29 12:54:32 -07:00
Craig Topper 20a60f46f5 [X86] Explicitly add popcnt feature to Intel CPUs with SSE4.2 in the frontend.
Previously we inferred it if sse4.2 ended up being enabled after
all feature processing. But writing -march=nehalem -mno-sse4.2
should have popcnt enabled.
2020-06-28 11:06:40 -07:00
Melanie Blower f4aaed3bf1 Reland D81869 "Modify FPFeatures to use delta not absolute settings"
This reverts commit defd43a5b3.
with correction to solve msan report

To solve https://bugs.llvm.org/show_bug.cgi?id=46166 where the
floating point settings in PCH files aren't compatible, rewrite
FPFeatures to use a delta in the settings rather than absolute settings.
With this patch, these floating point options can be benign.

Reviewers: rjmccall

Differential Revision: https://reviews.llvm.org/D81869
2020-06-27 01:34:57 -07:00
Craig Topper 9e8b5a20e9 [X86] Add MOVBE and RDRND features to BDVER4.
Only 6 years behind gcc. https://gcc.gnu.org/legacy-ml/gcc-patches/2014-08/msg00231.html

Found while working on improving how we define CPU features for
clang and auditing for correctness.
2020-06-26 23:32:17 -07:00
Craig Topper d298acde82 [X86] Don't disable xsave when avx is disabled. Implicitly enable xsave with avx is enabled and xsave wasn't explciitly disabled
CPUs with avx always have xsave, but some CPUs without avx also
have xsave. So we shouldn't disable xsave just because avx is
disabled. This would prevent xsave from being enabled with
-march=native on CPUs with xsave and not avx.

But we also don't want -mavx -mno-avx to leave xsave eanabled.
So only enable xsave if avx is enabled after processing all features.

I thought about just not turning xsave on with avx at all, but
there might be someone out there depending on it.
2020-06-26 16:45:44 -07:00
Nick Desaulniers dffc142045 [clang][SourceManager] cache Macro Expansions
A seemingly innocuous Linux kernel change [0] seemingly blew up our
compile times by over 3x, as reported by @nathanchance in [1].

The code in question uses a doubly nested macro containing GNU C
statement expressions that are then passed to typeof(), which is then
used in a very important macro for atomic variable access throughout
most of the kernel. The inner most macro, is passed a GNU C statement
expression.  In this case, we have macro arguments that are GNU C
statement expressions, which can contain a significant number of tokens.
The upstream kernel patch caused significant build time regressions for
both Clang and GCC. Since then, some of the nesting has been removed via
@melver, which helps gain back most of the lost compilation time. [2]

Profiles collected [3] from compilations of the slowest TU for us in the
kernel show:
* 51.4% time spent in clang::TokenLexer::updateLocForMacroArgTokens
* 48.7% time spent in clang::SourceManager::getFileIDLocal
* 35.5% time spent in clang::SourceManager::isOffsetInFileID
(mostly calls from the former through to the latter).

So it seems we have a pathological case for which properly tracking the
SourceLocation of macro arguments is significantly harming build
performance. This stands out in referenced flame graph.

In fact, this case was identified previously as being problematic in
commit 3339c568c4 ("[Lex] Speed up updateConsecutiveMacroArgTokens (NFC)")

Looking at the above call chain, there's 3 things we can do to speed up
this case.

1. TokenLexer::updateConsecutiveMacroArgTokens() calls
   SourceManager::isWrittenInSameFile() which calls
   SourceManager::getFileID(), which is both very hot and very expensive
   to call. SourceManger has a one entry cache, member LastFileIDLookup.
   If that isn't the FileID for a give source location offset, we fall
   back to a linear probe, and then to a binary search for the FileID.
   These fallbacks update the one entry cache, but noticeably they do
   not for the case of macro expansions!

   For the slowest TU to compile in the Linux kernel, it seems that we
   miss about 78.67% of the 68 million queries we make to getFileIDLocal
   that we could have had cache hits for, had we saved the macro
   expansion source location's FileID in the one entry cache. [4]

   I tried adding a separate cache item for macro expansions, and to
   check that before the linear then binary search fallbacks, but did
   not find it faster than simply allowing macro expansions into the one
   item cache.  This alone nets us back a lot of the performance loss.

   That said, this is a modification of caching logic, which is playing
   with a double edged sword.  While it significantly improves the
   pathological case, its hard to say that there's not an equal but
   opposite pathological case that isn't regressed by this change.
   Though non-pathological cases of builds of the Linux kernel before
   [0] are only slightly improved (<1%) and builds of LLVM itself don't
   change due to this patch.

   Should future travelers find this change to significantly harm their
   build times, I encourage them to feel empowered to revert this
   change.

2. SourceManager::getFileIDLocal has a FIXME hinting that the call to
   SourceManager::isOffsetInFileID could be made much faster since
   isOffsetInFileID is generic in the sense that it tries to handle the
   more generic case of "local" (as opposed to "loaded") files, though
   the caller has already determined the file to be local. This patch
   implements a new method that specialized for use when the caller
   already knows the file is local, then use that in
   TokenLexer::updateLocForMacroArgTokens.  This should be less
   controversial than 1, and is likely an across the board win. It's
   much less significant for the pathological case, but still a
   measurable win once we have fallen to the final case of binary
   search.  D82497

3. A bunch of methods in SourceManager take a default argument.
   SourceManager::getLocalSLocEntry doesn't do anything with this
   argument, yet many callers of getLocalSLocEntry setup, pass, then
   check this argument. This is wasted work.  D82498

With this patch applied, the above profile [5] for the same pathological
input looks like:
* 25.1% time spent in clang::TokenLexer::updateLocForMacroArgTokens
* 17.2% time spent in clang::SourceManager::getFileIDLocal
and clang::SourceManager::isOffsetInFileID is no longer called, and thus
falls out of the profile.

There may be further improvements to the general problem of "what
interval contains one number out of millions" than the current use of a
one item cache, followed by linear probing, followed by binary
searching. We might even be able to do something smarter in
TokenLexer::updateLocForMacroArgTokens.

[0] cdd28ad2d8
[1] https://github.com/ClangBuiltLinux/linux/issues/1032
[2] https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?h=locking/kcsan&id=a5dead405f6be1fb80555bdcb77c406bf133fdc8
[3] https://github.com/ClangBuiltLinux/linux/issues/1032#issuecomment-633712667
[4] https://github.com/ClangBuiltLinux/linux/issues/1032#issuecomment-633741923
[5] https://github.com/ClangBuiltLinux/linux/issues/1032#issuecomment-634932736

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D80681
2020-06-26 12:52:43 -07:00
Nick Desaulniers 8cce7af090 [SourceManager] don't check invalid param of getLocalSLocEntry()
Forked from D80681.

getLocalSLocEntry() has an unused parameter used to satisfy an interface
of libclang (see getInclusions() in
clang/tools/libclang/CIndexInclusionStack.cpp).  It's pointless for
callers to construct/pass/check this inout parameter that can never
signify that a FileID is invalid.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D82498
2020-06-26 10:22:26 -07:00
Melanie Blower defd43a5b3 Revert "Revert "Revert "Modify FPFeatures to use delta not absolute settings"""
This reverts commit 9518763d71.
Memory sanitizer fails in CGFPOptionsRAII::CGFPOptionsRAII dtor
2020-06-26 08:47:04 -07:00
Melanie Blower 9518763d71 Revert "Revert "Modify FPFeatures to use delta not absolute settings""
This reverts commit b55d723ed6.
Reapply Modify FPFeatures to use delta not absolute settings

To solve https://bugs.llvm.org/show_bug.cgi?id=46166 where the
floating point settings in PCH files aren't compatible, rewrite
FPFeatures to use a delta in the settings rather than absolute settings.
With this patch, these floating point options can be benign.

Reviewers: rjmccall

Differential Revision: https://reviews.llvm.org/D81869
2020-06-26 08:00:08 -07:00
Melanie Blower b55d723ed6 Revert "Modify FPFeatures to use delta not absolute settings"
This reverts commit 3a748cbf86.
I'm reverting this commit because I forgot to format the commit message
propertly. Sorry for the thrash.
2020-06-26 07:52:57 -07:00
Melanie Blower 3a748cbf86 Modify FPFeatures to use delta not absolute settings 2020-06-26 07:41:09 -07:00
Simon Pilgrim 0069824fea Revert rGf0bab7875e78e01c149d12302dcc4b6d4c43e25c - "Triple.h - reduce Twine.h include to forward declarations. NFC."
This causes ICEs on the clang-ppc64be buildbots and I've limited ability to triage the problem.
2020-06-26 14:46:40 +01:00
Anatoly Trosinenko cb56fa2196 [MSP430] Update register names
When writing a unit test on replacing standard epilogue sequences with `BR __mspabi_func_epilog_<N>`, by manually asm-clobbering `rN` - `r10` for N = 4..10, everything worked well except for seeming inability to clobber r4.

The problem was that MSP430 code generator of LLVM used an obsolete name FP for that register. Things were worse because when `llc` read an unknown register name, it silently ignored it.

That is, I cannot use `fp` register name from the C code because Clang does not accept it (exactly like GCC). But the accepted name `r4` is not recognised by `llc` (it can be used in listings passed to `llvm-mc` and even `fp` is replace to `r4` by `llvm-mc`). So I can specify any of `fp` or `r4` for the string literal of `asm(...)` but nothing in the clobber list.

This patch replaces `MSP430::FP` with `MSP430::R4` in the backend code (even [MSP430 EABI](http://www.ti.com/lit/an/slaa534/slaa534.pdf) doesn't mention FP as a register name). The R0 - R3 registers, on the other hand, are left as is in the backend code (after all, they have some special meaning on the ISA level). It is just ensured clang is renaming them as expected by the downstream tools. There is probably not much sense in **marking them clobbered** but rename them //just in case// for use at potentially different contexts.

Differential Revision: https://reviews.llvm.org/D82184
2020-06-26 15:32:07 +03:00
Simon Pilgrim f0bab7875e Triple.h - reduce Twine.h include to forward declarations. NFC.
Move include down to a number of other files that had an implicit dependency on the Twine class.
2020-06-26 13:06:57 +01:00
Bevin Hansson 94e8ec631d [AST] Add fixed-point division constant evaluation.
Reviewers: rjmccall, leonardchan, bjope

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73187
2020-06-26 13:38:11 +02:00
Bevin Hansson 53f5c8b4a1 [AST] Add fixed-point multiplication constant evaluation.
Reviewers: rjmccall, leonardchan, bjope

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73186
2020-06-26 13:38:11 +02:00
Bevin Hansson eccf7fc7b3 [AST] Add fixed-point subtraction constant evaluation.
Reviewers: rjmccall, leonardchan

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73185
2020-06-26 13:38:11 +02:00
Craig Topper 12665f2812 [X86] Make XSAVEC/XSAVEOPT/XSAVES properly depend on XSAVE in both the frontend and the backend.
These features implicitly enabled XSAVE in the frontend, but not
the backend. Disabling XSAVE in the frontend disabled XSAVEOPT, but
not the other 2. Nothing happened in the backend.
2020-06-26 00:14:58 -07:00
Craig Topper a7db230d75 [X86] Add CMPXCHG16B feature to amdfam10 in the frontend.
We already have this feature on it in the backend.
2020-06-25 22:55:36 -07:00
Craig Topper 6673d69226 [X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature.
The PREFETCHW instruction was originally part of the 3DNow. But
it was given its own CPUID bit on later CPUs just before 3DNow
was deprecated.

We were setting the -mprfchw flag if -m3dnow was passed or the CPU
supported 3dnow unless -mno-prfchw was passed. But -march=native
on a CPU without the PRFCHW CPUID bit set will pass -mno-prfchw.
So -march=k8 will behave differently than -march=native on a K8
for example.

So remove this implicit setting from the frontend and instead
enable the backend to use PREFETCHW if 3dnow OR prfchw is enabled.

Also enable PRFCHW flag on amdfam10/barcelona which seems to be
where this CPUID bit was introduced. That CPU also supported
3dnow.
2020-06-25 12:46:52 -07:00
Craig Topper 01c18f9199 Revert "[X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature."
This is failing on the bots.

This reverts commit 636d31a5c3.
2020-06-25 11:43:02 -07:00
Craig Topper 636d31a5c3 [X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature.
The PREFETCHW instruction was originally part of the 3DNow. But
it was given its own CPUID bit on later CPUs just before 3DNow
was deprecated.

We were setting the -mprfchw flag if -m3dnow was passed or the CPU
supported 3dnow unless -mno-prfchw was passed. But -march=native
on a CPU without the PRFCHW CPUID bit set will pass -mno-prfchw.
So -march=k8 will behave differently than -march=native on a K8
for example.

So remove this implicit setting from the frontend and instead
enable the backend to use PREFETCHW if 3dnow OR prfchw is enabled.

Also enable PRFCHW flag on amdfam10/barcelona which seems to be
where this CPUID bit was introduced. That CPU also supported
3dnow.
2020-06-25 11:25:35 -07:00
Nick Desaulniers 408efffbe4 [Clang][SourceManager] optimize getFileIDLocal()
Summary:
A recent Linux kernel commit exposed a performance cliff in Clang. Calls
to SourceManager::getFileIDLocal() when there's a cache miss against
LastFileIDLookup can be relatively expensive, as getFileIDLocal() tries
a few linear probes, then falls back to binary search.  The use of
SourceManager::isOffsetInFileID() is also relatively expensive (both
isOffsetInFileID and getFileIDLocal dominated a trace of the performance
cliff case).

As a FIXME notes (and as @kadircet helpfully noted in review of D80681),
there's a few optimizations we can do here since we've already
identified that an offset is local (as opposed to "loaded").

This patch was forked off of D80681, which additionally did this and
modified some caching behavior, as we expect this change to be less
controversial.

In terms of optimizations, we've already determined that the SLocOffset
parameter to SourceManager::getFileIDLocal() is local in the caller
SourceManager::getFileIDSlow(). Also, there's an early continue in the
binary search loop in getFileIDLocal() that are duplicated in
isOffsetInFileID() as pointed out by @kadircet.

Take advantage of these to optimize the binary search patch, and remove
the FIXME.

Reviewers: kadircet

Reviewed By: kadircet

Subscribers: cfe-commits, kadircet, srhines

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82497
2020-06-25 09:59:41 -07:00
Valentin Clement 5b9ce07a76 [openmp] Use Directive_enumSize instead of OMPD_unknown position
Summary:
Previously OMPD_unknown was last item in the Directive enumeration and its position was
used in various comparison and assertion. With the new Directive enumeration, this should be
change with  llvm::omp::Directive_enumSize. This patch fix two place where it was not done in
D81736.

Reviewers: vdmitrie, jdoerfert, jdenny

Reviewed By: jdoerfert

Subscribers: yaxunl, guansong, sstefan1, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82518
2020-06-25 09:18:54 -04:00
Sander de Smalen fabe67728e [AArch64][SVE] Enable __ARM_FEATURE_SVE macros.
This patch enables the following macros when their corresponding
target attributes are set:
      __ARM_FEATURE_SVE (+sve)
      __ARM_FEATURE_SVE2 (+sve2)
      __ARM_FEATURE_SVE2_AES (+sve2-aes)
      __ARM_FEATURE_SVE2_BITPERM (+sve2-bitperm)
      __ARM_FEATURE_SVE2_SHA3 (+sve2-sha3)
      __ARM_FEATURE_SVE2_SM4 (+sve2-sm4)

This implies that the base SVE and SVE2 ACLE (00bet2) are now feature
complete, meaning that all intrinsics are implemented in LLVM and Clang.

Disclaimer:

To implement the ACLE we have had to fix up many parts of LLVM to make it
support scalable vectors. We have also used many target-specific intrinsics
to reduce reliance on parts of LLVM where we know scalable vectors may
not yet be handled properly (e.g. some transformation might drop the
'scalable' flag on a vector type). While we've done a best effort with
the limited testing that is available to us, we're still working to improve the
stability of the implementation. Additionally, Clang may print warnings
that code may have miscompiled. We find this often to be a false alarm
where the wrong interfaces have been used in LLVM and where resulting
code is not actually incorrect. However, this warrants a bug report
and investigation. If you find any bugs or issues, please raise them on
bugs.llvm.org and let us know!

Reviewers: rengolin, efriedma, david-arm, SjoerdMeijer

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D81725
2020-06-25 08:14:19 +01:00
Craig Topper 8dc92142e3 [X86] Replace PROC macros with an enum and a lookup table of processor information.
This patch removes the PROC macro in favor of CPUKind enum and a
table that contains information about CPUs.

The current information in the table is the CPU name, CPUKind enum
value, key feature for target multiversioning, and Is64Bit capable.
For the strings that are aliases, I've duplicated the information
in the table. This means there are more rows in the table than
CPUKind enums.

This replaces multiple StringSwitch's with loops through the table.
They are linear searches due to the table being more logically
ordered than alphabetical. The StringSwitch's would have also been
linear. I've used StringLiteral on the strings in the table so we
can quickly check the length while searching.

I contemplated having a CPUKind for each string so there was a 1:1
mapping, but didn't want to spread more names to the places that
use the enum.

My ultimate goal here is to store the features for each CPU as a
bitset within the table. Hoping to use constexpr to make this
composable so we can group features and inherit them. After the
table lookup we can turn the bitset into a list of strings for the
frontend. The current switch we have for selecting features for
CPUs has become difficult to maintain while trying to express
inheritance relationships.

Differential Revision: https://reviews.llvm.org/D82414
2020-06-24 10:46:25 -07:00
Kazushi (Jam) Marukawa 96d4ccf00c [VE] Clang toolchain for VE
Summary:
This patch enables compilation of C code for the VE target with Clang.

Differential Revision: https://reviews.llvm.org/D79411
2020-06-24 10:12:09 +02:00
Sam Clegg 5804a8b122 [WebAssebmly] Fully disable 'protected' visibility
Emscripten doesn't use protected visibility either.

Differential Revision: https://reviews.llvm.org/D82346
2020-06-23 17:50:05 -07:00
Valentin Clement d90443b1d9 [openmp] Base of tablegen generated OpenMP common declaration
Summary:
As discussed previously when landing patch for OpenMP in Flang, the idea is
to share common part of the OpenMP declaration between the different Frontend.
While doing this it was thought that moving to tablegen instead of Macros will also
give a cleaner and more powerful way of generating these declaration.
This first part of a future series of patches is setting up the base .td file for
DirectiveLanguage as well as the OpenMP version of it. The base file is meant to
be used by other directive language such as OpenACC.
In this first patch, the Directive and Clause enums are generated with tablegen
instead of the macros on OMPConstants.h. The next pacth will extend this
to other enum and move the Flang frontend to use it.

Reviewers: jdoerfert, DavidTruby, fghanim, ABataev, jdenny, hfinkel, jhuber6, kiranchandramohan, kiranktp

Reviewed By: jdoerfert, jdenny

Subscribers: arphaman, martong, cfe-commits, mgorny, yaxunl, hiraditya, guansong, jfb, sstefan1, aaron.ballman, llvm-commits

Tags: #llvm, #openmp, #clang

Differential Revision: https://reviews.llvm.org/D81736
2020-06-23 10:32:32 -04:00
Craig Topper 0dfc8e1837 [X86] Remove encoding value from the X86_FEATURE and X86_FEATURE_COMPAT macro. NFCI
This was orignally done so we could separate the compatibility
values and the llvm internal only features into a separate entries
in the feature array. This was needed when we explicitly had to
convert the feature into the proper 32-bit chunk at every reference
and we didn't want things moving around.

Now everything is in an array and we have helper funtions or macros
to convert encoding to index. So we renumbering is no longer an
issue.
2020-06-22 11:46:21 -07:00
Anton Korobeynikov 6cb80fbe40 Revert "[MSP430] Update register names"
This reverts commit 8f6620f663.
2020-06-22 13:37:22 +03:00
Anatoly Trosinenko 8f6620f663 [MSP430] Update register names
When writing a unit test on replacing standard epilogue sequences with `BR __mspabi_func_epilog_<N>`, by manually asm-clobbering `rN` - `r10` for N = 4..10, everything worked well except for seeming inability to clobber r4.

The problem was that MSP430 code generator of LLVM used an obsolete name FP for that register. Things were worse because when `llc` read an unknown register name, it silently ignored it.

Differential Revision: https://reviews.llvm.org/D82184
2020-06-22 13:24:03 +03:00
Eric Christopher 1f593f46f3 [AST/Lex/Parse/Sema] As part of using inclusive language within
the llvm project, migrate away from the use of blacklist and whitelist.
2020-06-20 01:15:32 -07:00
Brad Smith 0f92096c0a Revert "Hook up OpenBSD 64-bit PowerPC support" 2020-06-18 20:05:39 -04:00
Brad Smith 3008609d45 Hook up OpenBSD 64-bit PowerPC support 2020-06-18 19:19:45 -04:00
Ahsan Saghir 37e72f47a4 [PowerPC] Add -m[no-]power10-vector clang and llvm option
Summary: This patch adds command line option for enabling power10-vector support.

Reviewers: hfinkel, nemanjai, lei, amyk, #powerpc

Reviewed By: lei, amyk, #powerpc

Subscribers: wuzish, kbarton, hiraditya, shchenz, cfe-commits, llvm-commits

Tags: #llvm, #clang, #powerpc

Differential Revision: https://reviews.llvm.org/D80758
2020-06-16 14:47:35 -05:00
Michael Liao e830fa260d [clang][amdgpu] Prefer not using `fp16` conversion intrinsics.
Reviewers: yaxunl, arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, dstuttard, tpr, t-tye, kerbowa, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81849
2020-06-16 10:21:56 -04:00
Stanislav Mekhanoshin 9ee272f13d [AMDGPU] Add gfx1030 target
Differential Revision: https://reviews.llvm.org/D81886
2020-06-15 16:18:05 -07:00
Dan Gohman 6604295959 [WebAssembly] WebAssembly doesn't support "protected" visibility
Implement the `hasProtectedVisibility()` hook to indicate that, like
Darwin, WebAssembly doesn't support "protected" visibility.

On ELF, "protected" visibility is intended to be an optimization, however
in practice it often [isn't], and ELF documentation generally ranges from
[not mentioning it at all] to [strongly discouraging its use].

[isn't]: https://www.airs.com/blog/archives/307
[not mentioning it at all]: https://gcc.gnu.org/wiki/Visibility
[strongly discouraging its use]: https://www.akkadia.org/drepper/dsohowto.pdf

While here, also mention the new Reactor support in the release notes.
2020-06-12 19:52:35 -07:00
Bruno Ricci 78e636b3f2
[clang][NFC] Generate the {Type,ArrayType,UnaryExprOrType,Expression}Traits...
...enumerations from TokenKinds.def and use the new macros from TokenKinds.def
to remove the hard-coded lists of traits.

All the information needed to generate these enumerations is already present
in TokenKinds.def. The motivation here is to be able to dump the trait spelling
without hard-coding the list in yet another place.

Note that this change the order of the enumerators in the enumerations (except
that in the TypeTrait enumeration all unary type traits are before all binary
type traits, and all binary type traits are before all n-ary type traits).

Apart from the aforementioned ordering which is relied upon, after this patch
no code in clang or in the various clang tools depend on the specific ordering
of the enumerators.

No functional changes intended.

Differential Revision: https://reviews.llvm.org/D81455

Reviewed By: aaron.ballman
2020-06-11 14:35:52 +01:00
Craig Topper ed34140e11 [X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC 2020-06-10 22:06:34 -07:00
Saiyedul Islam 4022bc2a6c [OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 2
Summary:
New file include to support platform dependent grid constants. It will be
used by clang, libomptarget plugins, and deviceRTLs to access constant
values consistently and with fast access in the deviceRTLs.

Originally authored by Greg Rodgers (@gregrodgers).

Reviewers: arsenm, sameerds, jdoerfert, yaxunl, b-sumner, scchan, JonChesterfield

Reviewed By: arsenm

Subscribers: llvm-commits, pdhaliwal, jholewinski, jvesely, wdng, nhaehnle, guansong, kerbowa, sstefan1, cfe-commits, ronlieb, gregrodgers

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80917
2020-06-10 18:09:59 +00:00
Craig Topper d5c28c4094 [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI
Similar to what some other targets have done. This information
could be reused by other frontends so doesn't make sense to live
in clang.

-Rename CK_Generic to CK_None to better reflect its illegalness.
-Move function for translating from string to enum into llvm.
-Call checkCPUKind directly from the string to enum translation
and update CPU kind to CK_None accordinly. Caller will use CK_None
as sentinel for bad CPU.

I'm planning to move all the CPU to feature mapping out next. As
part of that I want to devise a better way to express CPUs inheriting
features from an earlier CPU. Allowing this to be expressed in a
less rigid way than just falling through a switch. Or using gotos
as we've had to do lately.

Differential Revision: https://reviews.llvm.org/D81439
2020-06-09 12:52:41 -07:00
Jonas Paulsson 515bfc66ea [SystemZ] Implement -fstack-clash-protection
Probing of allocated stack space is now done when this option is passed. The
purpose is to protect against the stack clash attack (see
https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt).

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D78717
2020-06-06 18:38:36 +02:00
Ties Stuij a6fcf5ca03 [clang][BFloat] add NEON emitter for bfloat
Summary:
This patch adds the bfloat16_t struct typedefs (e.g. bfloat16x8x2_t) to
arm_neon.h

This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

The following people contributed to this patch:
- Luke Cheeseman
- Simon Tatham
- Ties Stuij

Reviewers: t.p.northover, fpetrogalli, sdesmalen, az, LukeGeeson

Reviewed By: fpetrogalli

Subscribers: SjoerdMeijer, LukeGeeson, pbarrio, mgorny, kristof.beyls, ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79708
2020-06-05 14:11:51 +01:00
Ties Stuij ecd682bbf5 [ARM] Add __bf16 as new Bfloat16 C Type
Summary:
This patch upstreams support for a new storage only bfloat16 C type.
This type is used to implement primitive support for bfloat16 data, in
line with the Bfloat16 extension of the Armv8.6-a architecture, as
detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

In detail this patch:
- introduces an opaque, storage-only C-type __bf16, which introduces a new bfloat IR type.

This is part of a patch series, starting with command-line and Bfloat16
assembly support. The subsequent patches will upstream intrinsics
support for BFloat16, followed by Matrix Multiplication and the
remaining Virtualization features of the armv8.6-a architecture.

The following people contributed to this patch:
- Luke Cheeseman
- Momchil Velikov
- Alexandros Lamprineas
- Luke Geeson
- Simon Tatham
- Ties Stuij

Reviewers: SjoerdMeijer, rjmccall, rsmith, liutianle, RKSimon, craig.topper, jfb, LukeGeeson, fpetrogalli

Reviewed By: SjoerdMeijer

Subscribers: labrinea, majnemer, asmith, dexonsmith, kristof.beyls, arphaman, danielkiss, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76077
2020-06-05 10:32:43 +01:00
Craig Topper dd863ccae1 [X86] Separate X86_CPU_TYPE_COMPAT_WITH_ALIAS from X86_CPU_TYPE_COMPAT. NFC
Add a separate X86_CPU_TYPE_COMPAT_ALIAS that carries alias string
and the enum from X86_CPU_TYPE_COMPAT.
2020-06-03 14:13:12 -07:00
Vyacheslav Zakharin 3a1b07506c Define __SPIR__ macro for spir/spir64 targets.
Differential Revision: https://reviews.llvm.org/D80655
2020-06-03 12:36:21 -07:00
Craig Topper bb1d8bf270 [X86] Add CLWB to Tremont CPU. Remove CLDEMOTE, MOVDIRI, MOVDIR64B, and WAITPKG to match gcc. 2020-06-02 22:38:51 -07:00
Nick Desaulniers 8eda71616f [Clang][A32/T32][Linux] -O1 implies -fomit-frame-pointer
Summary:
An upgrade of LLVM for CrOS [0] containing [1] triggered a bunch of
errors related to writing to reserved registers for a Linux kernel's
arm64 compat vdso (which is a aarch32 image).

After a discussion on LKML [2], it was determined that
-f{no-}omit-frame-pointer was not being specified. Comparing GCC and
Clang [3], it becomes apparent that GCC defaults to omitting the frame
pointer implicitly when optimizations are enabled, and Clang does not.
ie. setting -O1 (or above) implies -fomit-frame-pointer. Clang was
defaulting to -fno-omit-frame-pointer implicitly unless -fomit-frame-pointer
was set explicitly.

Why this becomes a problem is that the Linux kernel's arm64 compat vdso
contains code that uses r7. r7 is used sometimes for the frame pointer
(for example, when targeting thumb (-mthumb)). See useR7AsFramePointer()
in llvm/llvm-project/llvm/lib/Target/ARM/ARMSubtarget.h. This is mostly
for legacy/compatibility reasons, and the 2019 Q4 revision of the ARM
AAPCS looks to standardize r11 as the frame pointer for aarch32, though
this is not yet implemented in LLVM.

Users that are reliant on the implicit value if unspecified when
optimizations are enabled should explicitly choose -fomit-frame-pointer
(new behavior) or -fno-omit-frame-pointer (old behavior).

[0] https://bugs.chromium.org/p/chromium/issues/detail?id=1084372
[1] https://reviews.llvm.org/D76848
[2] https://lore.kernel.org/lkml/20200526173117.155339-1-ndesaulniers@google.com/
[3] https://godbolt.org/z/0oY39t

Reviewers: kristof.beyls, psmith, danalbert, srhines, MaskRay, ostannard, efriedma

Reviewed By: psmith, danalbert, srhines, MaskRay, efriedma

Subscribers: efriedma, olista01, MaskRay, vhscampos, cfe-commits, llvm-commits, manojgupta, llozano, glider, hctim, eugenis, pcc, peter.smith, srhines

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80828
2020-06-02 15:54:14 -07:00
Matt Arsenault 301a6da8c2 AMDGPU: Fix clang side null pointer value for private
The change to fold_priv_arith looks strange to me, but this was
already the untested behavior for local.
2020-06-02 09:23:46 -04:00
Lei Huang 7cfded350a [PowerPC] Add clang option -m[no-]pcrel
Summary:
Add user-facing front end option to turn off pc-relative memops.
This will be compatible with gcc.

Reviewers: stefanp, nemanjai, hfinkel, power-llvm-team, #powerpc, NeHuang, saghir

Reviewed By: stefanp, NeHuang, saghir

Subscribers: saghir, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc

Differential Revision: https://reviews.llvm.org/D80757
2020-06-01 15:34:59 -05:00
Nemanja Ivanovic 9021ce9576 [Clang] Enable KF and KC mode for [_Complex] __float128
The headers provided with recent GNU toolchains for PPC have code that includes
typedefs such as:

typedef _Complex float __cfloat128 __attribute__ ((__mode__ (__KC__)))

This patch allows clang to compile programs that contain
#include <math.h>

with -mfloat128 which it currently fails to compile.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=46068

Differential revision: https://reviews.llvm.org/D80374
2020-05-28 15:48:15 -05:00
Lei Huang 2368bf52cd [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm
Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
2020-05-27 13:14:25 -05:00
Alexey Bataev a888fc6b34 [OPENMP50]Initial support for use_device_addr clause.
Summary:
Added parsing/sema analysis/serialization support for use_device_addr
clauses.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, arphaman, sstefan1, llvm-commits, cfe-commits, caomhin

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80404
2020-05-27 11:35:31 -04:00
Lei Huang 559845f8fe Revert "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm"
This reverts commit 7eb666b155.
2020-05-27 09:40:21 -05:00
Lei Huang 7eb666b155 [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm
Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
2020-05-26 13:48:22 -05:00
Dmitry Preobrazhensky 3c6c2ecd6e [AMDGPU] Added 'A' constraint for inline assembler
Summary: 'A' constraint requires an immediate int or fp constant that can be inlined in an instruction encoding.
This is the second part of the change. The llvm part has been committed as b087b91c91.
See https://reviews.llvm.org/D78494

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D79493
2020-05-25 17:47:06 +03:00
Nemanja Ivanovic aede24ecaa [PowerPC] Treat 'Z' inline asm constraint as a true memory constraint
We currently emit incorrect codegen for this constraint because we set it as a
constraint that allows registers. This will cause the value to be copied to the
stack and that address to be passed as the address. This is not what we want.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=42762

Differential revision: https://reviews.llvm.org/D77542
2020-05-22 07:59:21 -05:00
Alexey Bataev 2e499eee58 [OPENMP50]Add initial support for 'affinity' clause.
Summary:
Added parsing/sema/serialization support for affinity clause in task
directives.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, arphaman, llvm-commits, cfe-commits, caomhin

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80148
2020-05-19 08:19:09 -04:00
Alex Lorenz 11d612ac99 [clang][Preprocessor] Replace the slow translateFile call by a new, faster isMainFile check
The commit 3c28a2dc6b introduced the check that checks if we're
trying to re-enter a main file when building a preamble. Unfortunately this slowed down the preamble
compilation by 80-90% in some test cases, as translateFile is really slow. This change checks
to see if the FileEntry is the main file without calling translateFile, but by using the new
isMainFile check instead. This speeds up preamble building by 1.5-2x for certain test cases that we have.

rdar://59361291

Differential Revision: https://reviews.llvm.org/D79834
2020-05-14 14:13:34 -07:00
Fangrui Song b56b1e67e3 [gcov] Default coverage version to '408*' and delete CC1 option -coverage-exit-block-before-body
gcov 4.8 (r189778) moved the exit block from the last to the second.
The .gcda format is compatible with 4.7 but

* decoding libgcov 4.7 produced .gcda with gcov [4.7,8) can mistake the
  exit block, emit bogus `%s:'%s' has arcs from exit block\n` warnings,
  and print wrong `" returned %s` for branch statistics (-b).
* decoding libgcov 4.8 produced .gcda with gcov 4.7 has similar issues.

Also, rename "return block" to "exit block" because the latter is the
appropriate term.
2020-05-12 09:14:03 -07:00
Fangrui Song 25544ce2df [gcov] Default coverage version to '407*' and delete CC1 option -coverage-cfg-checksum
Defaulting to -Xclang -coverage-version='407*' makes .gcno/.gcda
compatible with gcov [4.7,8)

In addition, delete clang::CodeGenOptionsBase::CoverageExtraChecksum and GCOVOptions::UseCfgChecksum.
We can infer the information from the version.

With this change, .gcda files produced by `clang --coverage a.o` linked executable can be read by gcov 4.7~7.
We don't need other -Xclang -coverage* options.
There may be a mismatching version warning, though.

(Note, GCC r173147 "split checksum into cfg checksum and line checksum"
 made gcov 4.7 incompatible with previous versions.)
2020-05-10 16:14:07 -07:00
Erich Keane ed86058b53 Add static assert to ID Table to make sure aux targets work right.
I discovered that the limit on possible builtins managed by this
ObjCOrBuiltin variable is too low when combining large targets, since
aux-targets are appended to the targets list. A runtime assert exists
for this, however this patch creates a static-assert as well.

The logic for said static-assert is to make sure we have the room for
the aux-target and target to both be the largest list, which makes sure
we have room for all possible combinations.

I also incremented the number of bits by 1, since I discovered this
currently broken.  The current bit-count was 36, so this doesn't
increase any size.
2020-05-07 12:49:46 -07:00
Craig Topper 16c800b8b7 [X86] Remove support for Y0 constraint as an alias for Yz in inline assembly.
Neither gcc or icc support this. Split out from D79472. I want
to remove more, but it looks like icc does support some things
gcc doesn't and I need to double check our internal test suites.
2020-05-06 14:58:53 -07:00
Craig Topper 9bb9ff0957 [X86] Remove incomplete support for 'Y' has an inline assembly constraint by itself.
Y is the start of several 2 letter constraints, but we also had
partial support to recognize it by itself. But it doesn't look
like it can get through clang as a single letter so the backend
support for this was effectively dead.
2020-05-06 14:23:04 -07:00
Erich Keane 8a1c999c9b Implement _ExtInt ABI for all ABIs in Clang, enable type for ABIs
This is the result of an audit of all of the ABIs in clang to implement
and enable the type for those targets.

Additionally, this finds an issue with integer-promotion passing for a
few platforms when using _ExtInt of < int, so this also corrects that
resulting in signext/zeroext being on a params of those types in some
platforms.

Differential Revisions: https://reviews.llvm.org/D79118
2020-05-06 06:52:18 -07:00
Craig Topper 0fac1c1912 [X86] Allow Yz inline assembly constraint to choose ymm0 or zmm0 when avx/avx512 are enabled and type is 256 or 512 bits
gcc supports selecting ymm0/zmm0 for the Yz constraint when used with 256 or 512 bit vector types.

Fixes PR45806

Differential Revision: https://reviews.llvm.org/D79448
2020-05-05 21:12:30 -07:00
Alexey Bataev b5be1c5419 [OPENMP50]Basic support for uses_allocators clause.
Summary: Added parsing/sema/serialization supoprt for uses_allocators clause.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, arphaman, cfe-commits, caomhin

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78577
2020-04-30 16:24:36 -04:00
Erich Keane 911add149a Disable _ExtInt by default
Since the _ExtInt type got into the repo, we've discovered that the ABI
implications weren't completely understood. The other architectures are
going to be audited (see D79118), however downstream targets aren't
going to benefit from this audit.

This patch disables the _ExtInt type by default and makes the
target-info an opt-in.  As it is audited, I'll re-enable these for all
of our default targets.
2020-04-29 13:48:12 -07:00
Richard Smith 20df6038ee Make -fno-char8_t disable the char8_t keyword, even in C++20.
This fixes a regression introduced in r354736, and makes our behavior
compatible with that of Clang 8 and GCC.
2020-04-28 23:49:35 -07:00
Petr Hosek 063128f979 [Fuchsia] Build compiler-rt builtins for 32-bit x86
While we don't support 32-bit architectures in Fuchsia, these are needed
in the early boot phase on x86, so we build just these to satisfy that
use case.

Differential Revision: https://reviews.llvm.org/D78687
2020-04-24 12:18:30 -07:00
Luke Geeson 7da1905125 [AArch32] Armv8.6-a Matrix Mult Assembly + Intrinsics
This patch upstreams support for the Armv8.6-a Matrix Multiplication
Extension. A summary of the features can be found here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

This patch includes:

- Assembly support for AArch32
- Intrinsics Support for AArch32 Neon Intrinsics for Matrix
  Multiplication

Note: these extensions are optional in the 8.6a architecture and so have
to be enabled by default

No additional IR types or C Types are needed for this extension.

This is part of a patch series, starting with BFloat16 support and
the other components in the armv8.6a extension (in previous patches
linked in phabricator)

Based on work by:
- Luke Geeson
- Oliver Stannard
- Luke Cheeseman

Reviewers: t.p.northover, miyuki

Reviewed By: miyuki

Subscribers: miyuki, ostannard, kristof.beyls, hiraditya, danielkiss,
cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77872
2020-04-24 15:54:06 +01:00
Luke Geeson 832cd74913 [AArch64] Armv8.6-a Matrix Mult Assembly + Intrinsics
This patch upstreams support for the Armv8.6-a Matrix Multiplication
Extension. A summary of the features can be found here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

This patch includes:

- Assembly support for AArch64 only (no SVE or Neon)
- Intrinsics Support for AArch64 Armv8.6a Matrix Multiplication Instructions (No bfloat16 matrix multiplication)

No IR types or C Types are needed for this extension.

This is part of a patch series, starting with BFloat16 support and
the other components in the armv8.6a extension (in previous patches
linked in phabricator)

Based on work by:
- Luke Geeson
- Oliver Stannard
- Luke Cheeseman

Reviewers: ostannard, t.p.northover, rengolin, kmclaughlin

Reviewed By: kmclaughlin

Subscribers: kmclaughlin, kristof.beyls, hiraditya, danielkiss,
cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77871
2020-04-24 15:54:06 +01:00
Kadir Cetinkaya 411a254af3
[clang] Make sure argument expansion locations are correct in presence of predefined buffer
Summary:
Macro argument expansion logic relies on skipping file IDs that created
as a result of an include. Unfortunately it fails to do that for
predefined buffer since it doesn't have a valid insertion location.

As a result of that any file ID created for an include inside the
predefined buffers breaks the traversal logic in
SourceManager::computeMacroArgsCache.

To fix this issue we first record number of created FIDs for predefined
buffer, and then skip them explicitly in source manager.

Another solution would be to just give predefined buffers a valid source
location, but it is unclear where that should be..

Reviewers: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78649
2020-04-22 21:01:52 +02:00
Michael Liao 86e3b735cd [hip] Claim builtin type `__float128` supported if the host target supports it.
Reviewers: tra, yaxunl

Subscribers: jvesely, nhaehnle, kerbowa, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78513
2020-04-21 15:56:40 -04:00
Aaron Ballman 6a30894391 C++2a -> C++20 in some identifiers; NFC. 2020-04-21 15:37:19 -04:00
Richard Smith 6bc7502385 When making modules transitively visible, don't take into account
whether they have missing header files.

Whether a module's headers happen to be present on the local file system
should make no difference to whether we make its contents visible when
importing another module that re-exports it. If we have an up-to-date
AST file that we can load, that's all that matters.

This fixes the ability to header syntax checking for modular headers in
C++20 mode (or in prior modes where -fmodules-local-submodule-visibility
is enabled but -fmodules is not).
2020-04-17 22:49:58 -07:00
Richard Smith fc76b4ad3d Rename IsMissingRequirement to IsUnimportable and set it for shadowed
modules too.

This more accurately reflects the semantics of this flag, as distinct
from "IsAvailable", which (in an explicit modules world) only describes
whether a module is buildable, not whether it's importable.
2020-04-17 22:48:56 -07:00
Lei Huang 10b60dde76 [PowerPC] Refactor ppcUserFeaturesCheck()
Summary: This function keeps growing, refactor to use lambda.

Reviewers: nemanjai, stefanp

Subscribers: kbarton, shchenz, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78308
2020-04-17 15:19:46 -05:00
Benjamin Kramer 3ee1ec0b9d LangOptions cannot depend on ASTContext, make it not use ASTContext directly
Fixes a layering violation introduced in 2ba4e3a459.
2020-04-16 11:46:35 +02:00
Michael Spencer 92e8af0ecb [Clang] Expose RequiresNullTerminator in FileManager.
This is needed to fix the reason
0a2be46cfd (Modules: Invalidate out-of-date PCMs as they're
discovered) and 5b44a4b07fc1d ([modules] Do not cache invalid state for
modules that we attempted to load.) were reverted.

These patches changed Clang to use `isVolatile` when loading modules.
This had the side effect of not using mmap when loading modules, and
thus greatly increased memory usage.

The reason it wasn't using mmap is because `MemoryBuffer` plays some
games with file size when you request null termination, and it has to
disable these when `isVolatile` is set as the size may change by the
time it's mmapped. Clang by default passes
`RequiresNullTerminator = true`, and `shouldUseMmap` ignored if
`RequiresNullTerminator` was even requested.

This patch adds `RequiresNullTerminator` to the `FileManager` interface
so Clang can use it when loading modules, and changes `shouldUseMmap` to
only take volatility into account if `RequiresNullTerminator` is true.
This is fine as both `mmap` and a `read` loop are vulnerable to
modifying the file while reading, but are immune to the rename Clang
does when replacing a module file.

Differential Revision: https://reviews.llvm.org/D77772
2020-04-15 14:17:51 -07:00
Melanie Blower 2ba4e3a459 Move BinaryOperators.FPOptions to trailing storage
Reviewers: rjmccall

Differential Revision: https://reviews.llvm.org/D76384
2020-04-15 12:57:31 -07:00
Ayke van Laethem fe06e231ff
[AVR] Define __ELF__
This symbol is defined in avr-gcc. Because AVR normally uses the ELF
format, define the symbol unconditionally.

This patch is needed to get Clang to compile compiler-rt.

Differential Revision: https://reviews.llvm.org/D78117
2020-04-15 00:22:53 +02:00
Artem Belevich 8c635ba4a8 [CUDA] Fix missed CUDA version mappings. 2020-04-13 15:54:12 -07:00
Scott Egerton 61ff296375 [RISCV] Add Clang frontend support for Bitmanip extension
This adds the __riscv_bitmanip macro and the 'b' target feature to enable it.

Differential Revision: https://reviews.llvm.org/D71553
2020-04-09 18:04:22 +01:00
WangTianQing a3dc949000 [X86] Add TSXLDTRK instructions.
Summary: For more details about these instructions, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Reviewers: craig.topper, RKSimon, LuoYuanke

Reviewed By: craig.topper

Subscribers: mgorny, hiraditya, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77205
2020-04-09 13:17:29 +08:00
Artem Belevich a9627b7ea7 [CUDA] Add partial support for recent CUDA versions.
Generate PTX using newer versions of PTX and allow using sm_80 with CUDA-11.
None of the new features of CUDA-10.2+ have been implemented yet, so using these
versions will still produce a warning.

Differential Revision: https://reviews.llvm.org/D77670
2020-04-08 11:19:44 -07:00
Artem Belevich 33386b20aa [CUDA] Simplify GPU variant handling. NFC.
Instead of hardcoding individual GPU mappings in multiple functions, keep them
all in one table and use it to look up the mappings.

We also don't care about 'virtual' architecture much, so the API is trimmed down
down to a simpler GPU->Virtual arch name lookup.

Differential Revision: https://reviews.llvm.org/D77665
2020-04-08 11:19:43 -07:00
Reid Kleckner 76221c734e Remove llvm::Error include form Diagnostic.h
Saves ~400 related LLVM ADT. llvm/ADT/Error.h takes 90ms to parse.

$ diff -u <(sort thedeps-before.txt) <(sort thedeps-after.txt) \
    | grep '^[-+] ' | sort | uniq -c | sort -nr
    403 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/Error.h
    403 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm-c/Error.h
    397 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/Format.h
    397 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/Debug.h
    377 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/ADT/StringExtras.h
    158 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm-c/ExternC.h
    138 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/ErrorOr.h
     13 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/raw_ostream.h
     13 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/ADT/SmallString.h
      5 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/ADT/Twine.h
2020-04-06 10:42:17 -07:00
Johannes Doerfert 931c0cd713 [OpenMP][NFC] Move and simplify directive -> allowed clause mapping
Move the listing of allowed clauses per OpenMP directive to the new
macro file in `llvm/Frontend/OpenMP`. Also, use a single generic macro
that specifies the directive and one allowed clause explicitly instead
of a dedicated macro per directive.

We save 800 loc and boilerplate for all new directives/clauses with no
functional change. We also need to include the macro file only once and
not once per directive.

Depends on D77112.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D77113
2020-04-06 00:04:08 -05:00
Johannes Doerfert 419a559c5a [OpenMP][NFCI] Move OpenMP clause information to `lib/Frontend/OpenMP`
This is a cleanup and normalization patch that also enables reuse with
Flang later on. A follow up will clean up and move the directive ->
clauses mapping.

Reviewed By: fghanim

Differential Revision: https://reviews.llvm.org/D77112
2020-04-05 22:30:29 -05:00
Michael Liao b952d799ca [cuda][hip] Fix `RegisterVar` function prototype.
Summary:
- `RegisterVar` has `void` return type and `size_t` in its variable size
  parameter in HIP or CUDA 9.0+.

Reviewers: tra, yaxunl

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77398
2020-04-03 12:57:09 -04:00
Yaxun (Sam) Liu a46e7d7a5f [AMDGPU] Allow AGPR in inline asm
Differential Revision: https://reviews.llvm.org/D77329
2020-04-03 09:08:13 -04:00
Matt Arsenault ce2258c1cd clang/AMDGPU: Stop setting old denormal subtarget features 2020-04-02 17:17:12 -04:00
Daniel Kiss 37ced5a571 [clang][AARCH64] Add __ARM_FEATURE_{PAC, BTI}_DEFAULT defines
Summary:
As defined by Arm C Language Extensions (ACLE) these macro defines
should be set to specific values depending on -mbranch-protection.

Reviewers: chill

Reviewed By: chill

Subscribers: danielkiss, cfe-commits, kristof.beyls

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77134
2020-04-02 12:54:21 +02:00
Daniel Kiss 7314aea5a4 [clang] Move branch-protection from CodeGenOptions to LangOptions
Summary:
Reason: the option has an effect on preprocessing.

Also see thread: http://lists.llvm.org/pipermail/cfe-dev/2020-March/065014.html

Reviewers: chill, efriedma

Reviewed By: efriedma

Subscribers: efriedma, danielkiss, cfe-commits, kristof.beyls

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77131
2020-04-02 10:31:52 +02:00
WangTianQing d08fadd662 [X86] Add SERIALIZE instruction.
Summary: For more details about this instruction, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Reviewers: craig.topper, RKSimon, LuoYuanke

Reviewed By: craig.topper

Subscribers: mgorny, hiraditya, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77193
2020-04-02 16:19:23 +08:00
Johannes Doerfert 1858f4b50d Revert "[OpenMP][NFCI] Move OpenMP clause information to `lib/Frontend/OpenMP`"
This reverts commit c18d55998b.

Bots have reported uses that need changing, e.g.,
  clang-tools-extra/clang-tidy/openmp/UseDefaultNoneCheck.cp
as reported by
  http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/46591
2020-04-02 02:23:22 -05:00
Johannes Doerfert c18d55998b [OpenMP][NFCI] Move OpenMP clause information to `lib/Frontend/OpenMP`
This is a cleanup and normalization patch that also enables reuse with
Flang later on. A follow up will clean up and move the directive ->
clauses mapping.

Differential Revision: https://reviews.llvm.org/D77112
2020-04-02 01:39:07 -05:00
Adrian Prantl f4754ea0ed Remove const qualifier from Modules returned by ExternalASTSource. (NFC)
This API is used by LLDB to attach owning module information to
Declarations deserialized from DWARF.

Differential Revision: https://reviews.llvm.org/D75561
2020-04-01 17:46:02 -07:00
Sid Manning 81194bfeea [Hexagon] MaxAtomicPromoteWidth and MaxAtomicInlineWidth are not getting set.
Noticed when building llvm's c++ library.

Differential Revision: https://reviews.llvm.org/D76546
2020-03-30 12:33:51 -05:00
Yonghong Song ced0d1f42b [BPF] support 128bit int explicitly in layout spec
Currently, bpf does not specify 128bit alignment in its
layout spec. So for a structure like
  struct ipv6_key_t {
    unsigned pid;
    unsigned __int128 saddr;
    unsigned short lport;
  };
clang will generate IR type
  %struct.ipv6_key_t = type { i32, [12 x i8], i128, i16, [14 x i8] }
Additional padding is to ensure later IR->MIR can generate correct
stack layout with target layout spec.

But it is common practice for a tracing program to be
first compiled with target flag (e.g., x86_64 or aarch64) through
clang to generate IR and then go through llc to generate bpf
byte code. Tracing program often refers to kernel internal
data structures which needs to be compiled with non-bpf target.

But such a compilation model may cause a problem on aarch64.
The bcc issue https://github.com/iovisor/bcc/issues/2827
reported such a problem.

For the above structure, since aarch64 has "i128:128" in its
layout string, the generated IR will have
  %struct.ipv6_key_t = type { i32, i128, i16 }

Since bpf does not have "i128:128" in its spec string,
the selectionDAG assumes alignment 8 for i128 and
computes the stack storage size for the above is 32 bytes,
which leads incorrect code later.

The x86_64 does not have this issue as it does not have
"i128:128" in its layout spec as it does permits i128 to
be alignmented at 8 bytes at stack. Its IR type looks like
  %struct.ipv6_key_t = type { i32, [12 x i8], i128, i16, [14 x i8] }

The fix here is add i128 support in layout spec, the same as
aarch64. The only downside is we may have less optimal stack
allocation in certain cases since we require 16byte alignment
for i128 instead of 8. But this is probably fine as i128 is
not used widely and in most cases users should already
have proper alignment.

Differential Revision: https://reviews.llvm.org/D76587
2020-03-28 11:46:29 -07:00
Yaxun (Sam) Liu 369e26ca9e [AMDGPU] Add __builtin_amdgcn_workgroup_size_x/y/z
The main purpose of introducing these builtins is to add a range
metadata [1, 1025) on the work group size loaded from dispatch
ptr, which cannot be done by source code.

Differential Revision: https://reviews.llvm.org/D76772
2020-03-28 01:03:20 -04:00
Johannes Doerfert 095cecbe0d [OpenMP] `omp begin/end declare variant` - part 1, parsing
This is the first part extracted from D71179 and cleaned up.

This patch provides parsing support for `omp begin/end declare variant`,
as defined in OpenMP technical report 8 (TR8) [0].

A major purpose of this patch is to provide proper math.h/cmath support
for OpenMP target offloading. See PR42061, PR42798, PR42799. The current
code was developed with this feature in mind, see [1].

[0] https://www.openmp.org/wp-content/uploads/openmp-TR8.pdf
[1] https://reviews.llvm.org/D61399#change-496lQkg0mhRN

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D74941
2020-03-27 02:30:58 -05:00
David Blaikie 819e540208 Use llvm_unreachable after a fully covered/always-returning switch 2020-03-26 20:09:57 -07:00
Sid Manning b0da094983 [Hexagon] Add support for Linux/Musl ABI (part 2)
A continuation of https://reviews.llvm.org/D72701.  This
adds support needed in clang.

Differential Revision: https://reviews.llvm.org/D75638
2020-03-26 17:19:46 -05:00
Ties Stuij 71ae267d1f [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support
Summary:
This patch introduces command-line support for the Armv8.6-a architecture and assembly support for BFloat16. Details can be found
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

in addition to the GCC patch for the 8..6-a CLI:
https://gcc.gnu.org/legacy-ml/gcc-patches/2019-11/msg02647.html

In detail this patch

- march options for armv8.6-a
- BFloat16 assembly

This is part of a patch series, starting with command-line and Bfloat16
assembly support. The subsequent patches will upstream intrinsics
support for BFloat16, followed by Matrix Multiplication and the
remaining Virtualization features of the armv8.6-a architecture.

Based on work by:
- labrinea
- MarkMurrayARM
- Luke Cheeseman
- Javed Asbar
- Mikhail Maltsev
- Luke Geeson

Reviewers: SjoerdMeijer, craig.topper, rjmccall, jfb, LukeGeeson

Reviewed By: SjoerdMeijer

Subscribers: stuij, kristof.beyls, hiraditya, dexonsmith, danielkiss, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D76062
2020-03-26 09:17:20 +00:00
Michael Liao d264f02c6f Fix `-Wreturn-type` warning. NFC. 2020-03-26 00:53:24 -04:00
zoecarver b915aec6b5 Add method to TargetInfo to get CPU cache line size
Summary:
This patch adds a virtual method `getCPUCacheLineSize()` to `TargetInfo`. Currently, I've only implemented the method in `X86TargetInfo`. It's extremely important that each CPU's cache line size correct (e.g., we can't just define it as `64` across the board) so, it has been a little slow getting to this point.

I'll work on the ARM CPUs next, but that will probably come later in a different patch.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74918
2020-03-25 09:50:38 -07:00
Hans Wennborg c278e8f8f9 Build fix: AttributeCommonInfo::AS_C2x 2020-03-25 15:42:21 +01:00
John Brawn bc3f171090 Don't normalise CXX11/C2X attribute names to start with ::
Currently square-bracket-style (CXX11/C2X) attribute names are normalised to
start with :: if they don't have a namespace. This is a bit odd, as such
names are rejected when parsing, so don't do this.

Differential Revision: https://reviews.llvm.org/D76704
2020-03-25 14:33:44 +00:00
Alexey Bataev 1236eb6c31 [OPENMP50]Add 'default' modifier in reduction clauses.
Added full support for 'default' modifier in the reduction clauses.
2020-03-23 18:18:08 -04:00
Alexey Bataev 63828a35da [OPENMP50]Bassic support for exclusive clause.
Added basic support (parsing/sema/serialization) for exclusive clause in
scan directives.
2020-03-23 13:12:52 -04:00
Alexey Bataev 06dea73307 [OPENMP50]Initial support for inclusive clause.
Added parsing/sema/serialization support for inclusive clause in scan
directive.
2020-03-20 14:20:38 -04:00
Alexey Bataev fcba7c3534 [OPENMP50]Initial support for scan directive.
Addedi basic parsing/sema/serialization support for scan directive.
2020-03-20 07:58:15 -04:00
Sid Manning 430c9a80c1 [Hexagon] Enable linux #defines
Enable standard linux defines when the triple is Linux and the
environment is musl.

Differential Revision: https://reviews.llvm.org/D76310
2020-03-19 14:33:49 -05:00
Alexey Bataev 2f8894a5b8 [OPENMP50]Add support for extended device clause in target directives.
Added parsing/sema/serialization support for extended device clause in
executable target directives.
2020-03-18 15:02:37 -04:00
Sander de Smalen c5b81466c2 Reland D75470 [SVE] Auto-generate builtins and header for svld1.
Reworked the patch to avoid sharing a header (SVETypeFlags.h) between
include/clang/Basic and utils/TableGen/SveEmitter.cpp. Now the patch
generates the enum/flags which is included in TargetBuiltins.h.

Also renamed one of the SveEmitter options to be in line with MVE.

Summary:

This is a first patch in a series for the SveEmitter to generate the arm_sve.h
header file and builtins.

I've tried my best to strip down this patch as best as I could, but there
are still a few changes that are not necessarily exercised by the load intrinsics
in this patch, mostly around the SVEType class which has some common logic to
represent types from a type and prototype string. I thought it didn't make
much sense to remove that from this patch and split it up.
2020-03-18 11:16:28 +00:00
Nick Desaulniers 5d90f886bc [clang][AArch64] readd support for 'p' inline asm constraint
Summary:
Was accidentally removed by commit af64948e2a when it overrode
TargetInfo::convertConstraint.

Fixes: pr/45225

Reviewers: eli.friedman, sdesmalen

Reviewed By: sdesmalen

Subscribers: echristo, sdesmalen, kristof.beyls, cfe-commits, kmclaughlin, srhines

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76297
2020-03-17 10:51:25 -07:00
Alexey Bataev 0f0564bb9a [OPENMP50]Initial support for detach clause in task directive.
Added parsing/sema/serialization support for detach clause.
2020-03-17 09:19:03 -04:00
Ayke van Laethem 4add249205
[AVR] Add support for the -mdouble=x flag
This flag is used by avr-gcc (starting with v10) to set the width of the
double type. The double type is by default interpreted as a 32-bit
floating point number in avr-gcc instead of a 64-bit floating point
number as is common on other architectures. Starting with GCC 10, a new
option has been added to control this behavior:
https://gcc.gnu.org/wiki/avr-gcc#Deviations_from_the_Standard

This commit keeps the default double at 32 bits but adds support for the
-mdouble flag (-mdouble=32 and -mdouble=64) to control this behavior.

Differential Revision: https://reviews.llvm.org/D76181
2020-03-17 13:21:03 +01:00
Kerry McLaughlin af64948e2a [SVE][Inline-Asm] Add constraints for SVE ACLE types
Summary:
Adds the constraints described below to ensure that we
can tie variables of SVE ACLE types to operands in inline-asm:
 - y: SVE registers Z0-Z7
 - Upl: One of the low eight SVE predicate registers (P0-P7)
 - Upa: Full range of SVE predicate registers (P0-P15)

Reviewers: sdesmalen, huntergr, rovka, cameron.mcinally, efriedma, rengolin

Reviewed By: efriedma

Subscribers: miyuki, tschuett, rkruppe, psnobl, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75690
2020-03-17 11:04:19 +00:00
Sander de Smalen 6ce537ccfc Revert "[SVE] Auto-generate builtins and header for svld1."
This reverts commit 8b409eabaf.

Reverting this patch for now because it breaks some buildbots.
2020-03-16 15:22:15 +00:00
Sander de Smalen 8b409eabaf [SVE] Auto-generate builtins and header for svld1.
This is a first patch in a series for the SveEmitter to generate the arm_sve.h
header file and builtins.

I've tried my best to strip down this patch as best as I could, but there
are still a few changes that are not necessarily exercised by the load intrinsics
in this patch, mostly around the SVEType class which has some common logic to
represent types from a type and prototype string. I thought it didn't make
much sense to remove that from this patch and split it up.

Reviewers: efriedma, rovka, SjoerdMeijer, rsandifo-arm, rengolin

Reviewed By: SjoerdMeijer

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75470
2020-03-16 10:52:37 +00:00
Reid Kleckner e08464fb45 Avoid including FileManager.h from SourceManager.h
Most clients of SourceManager.h need to do things like turning source
locations into file & line number pairs, but this doesn't require
bringing in FileManager.h and LLVM's FS headers.

The main code change here is to sink SM::createFileID into the cpp file.
I reason that this is not performance critical because it doesn't happen
on the diagnostic path, it happens along the paths of macro expansion
(could be hot) and new includes (less hot).

Saves some includes:
    309 -    /usr/local/google/home/rnk/llvm-project/clang/include/clang/Basic/FileManager.h
    272 -    /usr/local/google/home/rnk/llvm-project/clang/include/clang/Basic/FileSystemOptions.h
    271 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/VirtualFileSystem.h
    267 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/FileSystem.h
    266 -    /usr/local/google/home/rnk/llvm-project/llvm/include/llvm/Support/Chrono.h

Differential Revision: https://reviews.llvm.org/D75406
2020-03-11 13:53:12 -07:00
Reid Kleckner c915cb957d Avoid including Module.h from ExternalASTSource.h
Module.h takes 86ms to parse, mostly parsing the class itself. Avoid it
if possible. ASTContext.h depends on ExternalASTSource.h.

A few NFC changes were needed to make this possible:

- Move ASTSourceDescriptor to Module.h. This needs Module to be
  complete, and seems more related to modules and AST files than
  external AST sources.
- Move "import complete" bit from Module* pointer int pair to
  NextLocalImport pointer. Required because PointerIntPair<Module*,...>
  requires Module to be complete, and now it may not be.

Reviewed By: aaron.ballman, hans

Differential Revision: https://reviews.llvm.org/D75784
2020-03-11 13:37:41 -07:00
Mikhail Maltsev cdeeb548bb [ARM,CDE] Implement CDE feature test macros
Summary:
This patch implements feature test macros for the CDE extension
according to the upcoming ACLE specification.

The following 2 macros are being added:
- __ARM_FEATURE_CDE - defined as '1' when any coprocessor is
  configured as a CDE coprocessor
- __ARM_FEATURE_CDE_COPROC - defined as an 8-bit mask, each bit of the
  mask corresponds to a coprocessor and is set when the corresponding
  coprocessor is configured as CDE (and cleared otherwise).

The patch also exposes the value of __ARM_FEATURE_CDE_COPROC in the
target-independent method TargetInfo::getARMCDECorpocMask, the method
will be used in follow-up patches implementing semantic checks of CDE
intrinsics (we want to diagnose the cases when CDE intrinsics are used
with coprocessors that are not configured as CDE).

Reviewers: simon_tatham, dmgreen, ostannard, MarkMurrayARM

Reviewed By: simon_tatham

Subscribers: kristof.beyls, danielkiss, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75843
2020-03-09 16:14:06 +00:00
Alexey Bataev 82f7c207f5 [OPENMP50]Support 'update' clause for 'depobj' directive.
Added basic support (parsing/sema/serialization) for 'update' clause in
'depobj' directive.
2020-03-03 13:59:32 -05:00
Alexey Bataev 375437ab92 [OPENMP50]Support 'destroy' clause on 'depobj' directives.
Added basic support (parsing/sema/serialization) for 'destroy' clause in
depobj directives.
2020-03-02 14:40:53 -05:00
Alexey Bataev c112e941a0 [OPENMP50]Add basic support for depobj construct.
Added basic parsing/sema/serialization support for depobj directive.
2020-03-02 13:10:32 -05:00
Reid Kleckner bc8836651f Forward declare FileEntry and DirectoryEntry in Module.h
FileManager.h is an expensive header (~350ms for me in isolation), so
try to do without it.

Notably, we need to avoid checking the alignment of FileEntry, which
happens for DenseMap<FileEntry*> and PointerUnion<FileEntry*>. I
adjusted the code to avoid PointerUnion, and moved the DenseMap
insertion to the .cpp file.

Globally, this only saved about ~17 includes of the related headers
because SourceManager.h still includes FileManager.h, and it is more
popular than Module.h.
2020-02-27 10:18:06 -08:00
Reid Kleckner 04da3dfecc Forward declare special case lists
This avoids pulling in unordered_map from TrigramIndex.h:

$ diff -u thedeps-before.txt thedeps-after.txt | \
        grep '^[-+] ' | sort | uniq -c | sort -nr
    976 -    ../llvm/include/llvm/Support/TrigramIndex.h
    976 -    ../llvm/include/llvm/Support/SpecialCaseList.h
    976 -    ../clang/include/clang/Basic/SanitizerSpecialCaseList.h
    502 -    ../../../PROGRA~2/MIB055~1/2019/PROFES~1/VC/Tools/MSVC/14.24.28314/include/unordered_map
    467 -    ../../../PROGRA~2/MIB055~1/2019/PROFES~1/VC/Tools/MSVC/14.24.28314/include/xhash
    467 -    ../../../PROGRA~2/MIB055~1/2019/PROFES~1/VC/Tools/MSVC/14.24.28314/include/xbit_ops.h
    212 -    ../llvm/include/llvm/ADT/StringSet.h
2020-02-27 10:05:30 -08:00
John Brawn 75d4d4bd02 Add an attribute registry so plugins can add attributes
When constructing a ParsedAttr the ParsedAttrInfo gets looked up in the
AttrInfoMap, which is auto-generated using tablegen. If that lookup fails then
we look through the ParsedAttrInfos that plugins have added to the registry and
check if any has a spelling that matches.

Differential Revision: https://reviews.llvm.org/D31338
2020-02-27 17:23:16 +00:00
Xiangling Liao 8bee52bdb5 [AIX][Frontend] C++ ABI customizations for AIX boilerplate
This PR enables "XL" C++ ABI in frontend AST to IR codegen. And it is driven by
static init work. The current kind in Clang by default is Generic Itanium, which
has different behavior on static init with IBM xlclang compiler on AIX.

Differential Revision: https://reviews.llvm.org/D74015
2020-02-24 10:26:51 -05:00
Roland McGrath 271f964773 [Preprocessor][X86] Fix __code_model_*__ predefine macros
GCC defines __code_model_*__ (two trailing underscores), not
__code_model_*_ (one trailing underscore).

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D75003
2020-02-21 23:30:07 -08:00
Roland McGrath d2e949eed5 [AArch64] Predefine __AARCH64_CMODEL_*__ as GCC does
Make Clang on aarch64 targets predefine `__AARCH64_CMODEL_SMALL__`
or `__AARCH64_CMODEL_TINY__`, etc.  These are the names that GCC
uses for its predefines.

Reviewed By: tamur, MaskRay

Differential Revision: https://reviews.llvm.org/D75002
2020-02-21 23:27:36 -08:00
Sid Manning d37cbda5f9 [Hexagon] Define __ELF__ by default.
Differential Revision: https://reviews.llvm.org/D74972
2020-02-21 16:10:31 -06:00
Yaxun (Sam) Liu ed07c89fc5 Add cl_khr_mipmap_image_writes as supported to AMDGPU
Differential Revision: https://reviews.llvm.org/D74807
2020-02-19 17:40:40 -05:00
Krzysztof Parzyszek b1d47467e2 [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1
This commit removes the artificial types <512 x i1> and <1024 x i1>
from HVX intrinsics, and makes v512i1 and v1024i1 no longer legal on
Hexagon.

It may cause existing bitcode files to become invalid.

* Converting between vector predicates and vector registers must be
  done explicitly via vandvrt/vandqrt instructions (their intrinsics),
  i.e. (for 64-byte mode):
    %Q = call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %V, i32 -1)
    %V = call <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1> %Q, i32 -1)

  The conversion intrinsics are:
    declare  <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32>, i32)
    declare <128 x i1> @llvm.hexagon.V6.vandvrt.128B(<32 x i32>, i32)
    declare <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1>, i32)
    declare <32 x i32> @llvm.hexagon.V6.vandqrt.128B(<128 x i1>, i32)
  They are all pure.

* Vector predicate values cannot be loaded/stored directly. This directly
  reflects the architecture restriction. Loading and storing or vector
  predicates must be done indirectly via vector registers and explicit
  conversions via vandvrt/vandqrt instructions.
2020-02-19 14:14:56 -06:00
Jim Lin 466f8843f5 [NFC] Remove trailing space
sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h,td}
2020-02-18 10:49:13 +08:00
Atmn Patel 577c9b02ab [OpenMP][NFCI] Use the libFrontend DefaultKind in Clang
This swaps out the OpenMPDefaultClauseKind enum with a
llvm::omp::DefaultKind enum which is stored in OMPConstants.h.

This should not change any functionality.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D74513
2020-02-15 00:38:12 -06:00
Johannes Doerfert 1228d42dda [OpenMP][Part 2] Use reusable OpenMP context/traits handling
This patch implements an almost complete handling of OpenMP
contexts/traits such that we can reuse most of the logic in Flang
through the OMPContext.{h,cpp} in llvm/Frontend/OpenMP.

All but construct SIMD specifiers, e.g., inbranch, and the device ISA
selector are define in `llvm/lib/Frontend/OpenMP/OMPKinds.def`. From
these definitions we generate the enum classes `TraitSet`,
`TraitSelector`, and `TraitProperty` as well as conversion and helper
functions in `llvm/lib/Frontend/OpenMP/OMPContext.{h,cpp}`.

The above enum classes are used in the parser, sema, and the AST
attribute. The latter is not a collection of multiple primitive variant
arguments that contain encodings via numbers and strings but instead a
tree that mirrors the `match` clause (see `struct OpenMPTraitInfo`).

The changes to the parser make it more forgiving when wrong syntax is
read and they also resulted in more specialized diagnostics. The tests
are updated and the core issues are detected as before. Here and
elsewhere this patch tries to be generic, thus we do not distinguish
what selector set, selector, or property is parsed except if they do
behave exceptionally, as for example `user={condition(EXPR)}` does.

The sema logic changed in two ways: First, the OMPDeclareVariantAttr
representation changed, as mentioned above, and the sema was adjusted to
work with the new `OpenMPTraitInfo`. Second, the matching and scoring
logic moved into `OMPContext.{h,cpp}`. It is implemented on a flat
representation of the `match` clause that is not tied to clang.
`OpenMPTraitInfo` provides a method to generate this flat structure (see
`struct VariantMatchInfo`) by computing integer score values and boolean
user conditions from the `clang::Expr` we keep for them.

The OpenMP context is now an explicit object (see `struct OMPContext`).
This is in anticipation of construct traits that need to be tracked. The
OpenMP context, as well as the `VariantMatchInfo`, are basically made up
of a set of active or respectively required traits, e.g., 'host', and an
ordered container of constructs which allows duplication. Matching and
scoring is kept as generic as possible to allow easy extension in the
future.

---

Test changes:

The messages checked in `OpenMP/declare_variant_messages.{c,cpp}` have
been auto generated to match the new warnings and notes of the parser.
The "subset" checks were reversed causing the wrong version to be
picked. The tests have been adjusted to correct this.
We do not print scores if the user did not provide one.
We print spaces to make lists in the `match` clause more legible.

Reviewers: kiranchandramohan, ABataev, RaviNarayanaswamy, gtbercea, grokos, sdmitriev, JonChesterfield, hfinkel, fghanim

Subscribers: merge_guards_bot, rampitec, mgorny, hiraditya, aheejin, fedor.sergeev, simoncook, bollu, guansong, dexonsmith, jfb, s.egerton, llvm-commits, cfe-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D71830
2020-02-14 16:37:42 -06:00
Alexey Bataev 2fb6268854 [OPENMP50]Add support for hint clause in atomic directive.
According to OpenMP 5.0, hint clause is alowed to be used in atomic
directives.
2020-02-13 13:28:43 -05:00
Alexey Bataev 9a8defcc34 [OPENMP50]Add support for relaxed clause in atomic directive.
Added full support for relaxed clause.
2020-02-11 11:54:46 -05:00
Alexey Bataev 9559834a5c [OPENMP50]Add support for 'release' clause.
Added full support for 'release' clause in flush|atomic directives.
2020-02-10 16:01:41 -05:00
Alexey Bataev 04a830f80a [OPENMP50]Support for acquire clause.
Added full support for acquire clause in flush|atomic directives.
2020-02-10 14:51:46 -05:00
serge_sans_paille e67cbac812 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with proper LiveIn
declaration, better option handling and more portable testing.

Differential Revision: https://reviews.llvm.org/D68720
2020-02-09 10:42:45 +01:00
serge-sans-paille 4546211600 Revert "Support -fstack-clash-protection for x86"
This reverts commit 0fd51a4554.

Failures:

http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/4354
2020-02-09 10:06:31 +01:00
serge_sans_paille 0fd51a4554 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with proper LiveIn
declaration, better option handling and more portable testing.

Differential Revision: https://reviews.llvm.org/D68720
2020-02-09 09:35:42 +01:00
serge-sans-paille 658495e6ec Revert "Support -fstack-clash-protection for x86"
This reverts commit e229017732.

Failures:

http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-debian/builds/2604
http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/4308
2020-02-08 14:26:22 +01:00
serge_sans_paille e229017732 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with better option
handling and more portable testing

Differential Revision: https://reviews.llvm.org/D68720
2020-02-08 13:31:52 +01:00
Nico Weber b03c3d8c62 Revert "Support -fstack-clash-protection for x86"
This reverts commit 4a1a0690ad.
Breaks tests on mac and win, see https://reviews.llvm.org/D68720
2020-02-07 14:49:38 -05:00
serge_sans_paille 4a1a0690ad Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

This a recommit of 39f50da2a3 with correct option
flags set.

Differential Revision: https://reviews.llvm.org/D68720
2020-02-07 19:54:39 +01:00
Alexey Bataev ea9166b5a8 [OPENMP50]Add parsing/sema for acq_rel clause.
Added basic support (representation + parsing/sema/(de)serialization)
for acq_rel clause in flush/atomic directives.
2020-02-07 09:21:10 -05:00
serge-sans-paille f6d98429fc Revert "Support -fstack-clash-protection for x86"
This reverts commit 39f50da2a3.

The -fstack-clash-protection is being passed to the linker too, which
is not intended.

Reverting and fixing that in a later commit.
2020-02-07 11:36:53 +01:00
serge_sans_paille 39f50da2a3 Support -fstack-clash-protection for x86
Implement protection against the stack clash attack [0] through inline stack
probing.

Probe stack allocation every PAGE_SIZE during frame lowering or dynamic
allocation to make sure the page guard, if any, is touched when touching the
stack, in a similar manner to GCC[1].

This extends the existing `probe-stack' mechanism with a special value `inline-asm'.
Technically the former uses function call before stack allocation while this
patch provides inlined stack probes and chunk allocation.

Only implemented for x86.

[0] https://www.qualys.com/2017/06/19/stack-clash/stack-clash.txt
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00556.html

Differential Revision: https://reviews.llvm.org/D68720
2020-02-07 10:56:15 +01:00
Momchil Velikov 3627c91ead [ARM][TargetParser] Improve handling of dependencies between target features
The patch at https://reviews.llvm.org/D64048 added "negative"
dependency handling in `ARM::appendArchExtFeatures`: feature "noX"
removes all features, which imply "X".

This patch adds the "positive" handling: feature "X" adds all the
feature strings implied by "X".

(This patch also comes from the suggestion here
https://reviews.llvm.org/D72633#inline-658582)

Differential Revision: https://reviews.llvm.org/D72762
2020-02-05 16:07:51 +00:00
Thomas Lively 8c3e6af71b [WebAssembly] Add experimental multivalue calling ABI
Summary:
For now, this ABI simply expands all possible aggregate arguments and
returns all possible aggregates directly. This ABI will change rapidly
as we prototype and benchmark a new ABI that takes advantage of
multivalue return and possibly other changes from the MVP ABI.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72972
2020-02-04 21:09:49 -08:00
Matt Arsenault a3c814d234 Separately track input and output denormal mode
AMDGPU and x86 at least both have separate controls for whether
denormal results are flushed on output, and for whether denormals are
implicitly treated as 0 as an input. The current DAGCombiner use only
really cares about the input treatment of denormals.
2020-02-04 12:59:21 -05:00
Jonas Paulsson 563e84790f [SystemZ] Support -msoft-float
This is needed when building the Linux kernel.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D72189
2020-02-04 10:32:45 -05:00
Mikhail Maltsev 7128aace60 [ARM] Make ARM::ArchExtKind use 64-bit underlying type, NFCI
Summary:
This patch changes the underlying type of the ARM::ArchExtKind
enumeration to uint64_t and adjusts the related code.

The goal of the patch is to prepare the code base for a new
architecture extension.

Reviewers: simon_tatham, eli.friedman, ostannard, dmgreen

Reviewed By: dmgreen

Subscribers: merge_guards_bot, kristof.beyls, hiraditya, cfe-commits, llvm-commits, pbarrio

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73906
2020-02-04 11:24:18 +00:00
Alexey Bataev cb8e69148d [OPENMP50]Basic parsing/sema analysis for order(concurrent) clause.
Added parsing/sema/serialization support for order(concurrent) clause in
loop|simd-based directives.
2020-02-03 10:31:02 -05:00
Benjamin Kramer bb39b52950 Fix conversions in clang and examples 2020-01-29 02:48:15 +01:00
Benjamin Kramer 2b36e85542 GCC5 buildbot made it to clang. Fix implicit conversions it found. 2020-01-29 02:19:49 +01:00
Benjamin Kramer adcd026838 Make llvm::StringRef to std::string conversions explicit.
This is how it should've been and brings it more in line with
std::string_view. There should be no functional change here.

This is mostly mechanical from a custom clang-tidy check, with a lot of
manual fixups. It uncovers a lot of minor inefficiencies.

This doesn't actually modify StringRef yet, I'll do that in a follow-up.
2020-01-28 23:25:25 +01:00
Artem Belevich 12fefeef20 [CUDA] Assume the latest known CUDA version if we've found an unknown one.
This makes clang somewhat forward-compatible with new CUDA releases
without having to patch it for every minor release without adding
any new function.

If an unknown version is found, clang issues a warning (can be disabled
with -Wno-cuda-unknown-version) and assumes that it has detected
the latest known version. CUDA releases are usually supersets
of older ones feature-wise, so it should be sufficient to keep
released clang versions working with minor CUDA updates without
having to upgrade clang, too.

Differential Revision: https://reviews.llvm.org/D73231
2020-01-28 10:11:42 -08:00
Konstantin Pyzhov 6d614a82a4 Summary:
This CL adds clang declarations of built-in functions for AMDGPU MFMA intrinsics and instructions.
OpenCL tests for new built-ins are included.

Differential Revision: https://reviews.llvm.org/D72723
2020-01-28 03:51:27 -05:00
Diogo Sampaio bce360b704 Detect source location overflow due includes
Summary:
As discussed in http://lists.llvm.org/pipermail/cfe-dev/2019-October/063459.html
the overflow of the souce locations (limited to 2^31 chars) can generate all sorts of
weird things (bogus warnings, hangs, crashes, miscompilation and correct compilation).
In debug mode this assert would fail. So it might be a good start, as in PR42301,
to detect the failure and exit with a proper error message.

Reviewers: rsmith, thakis, miyuki

Reviewed By: miyuki

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D70183
2020-01-24 23:56:47 +00:00
Duncan P. N. Exon Smith 1e487e4c16 clang: Only define OBJC_NEW_PROPERTIES when -x objective-c
Since 2009 (in r63846) we've been `#define`-ing OBJC_NEW_PROPERTIES all
the time on Darwin, but this macro only makes sense for `-x objective-c`
and `-x objective-c++`.  Restrict it to those cases (for which there is
already separate logic).

https://reviews.llvm.org/D72970
rdar://problem/10050342
2020-01-24 14:55:12 -08:00
Heejin Ahn 65eb11306e [WebAssembly] Update bleeding-edge CPU features
Summary:
This adds bulk memory and tail call to "bleeding-edge" CPU, since their
implementation in LLVM/clang seems mostly complete.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73322
2020-01-24 14:27:35 -08:00
Heejin Ahn 764f4089e8 [WebAssembly] Add reference types target feature
Summary:
This adds the reference types target feature. This does not enable any
more functionality in LLVM/clang for now, but this is necessary to embed
the info in the target features section, which is used by Binaryen and
Emscripten. It turned out that after D69832 `-fwasm-exceptions` crashed
because we didn't have the reference types target feature.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73320
2020-01-24 14:26:27 -08:00
Yuta Saito c5bd3d0726 Support Swift calling convention for WebAssembly targets
This adds basic support for the Swift calling convention with WebAssembly
targets.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D71823
2020-01-24 10:30:46 -08:00
Saar Raz 67c608a969 [Concepts] Deprecate -fconcepts-ts, enable Concepts under -std=c++2a
Now with concepts support merged and mostly complete, we do not need -fconcepts-ts
(which was also misleading as we were not implementing the TS) and can enable
concepts features under C++2a. A warning will be generated if users still attempt
to use -fconcepts-ts.
2020-01-24 00:48:59 +02:00
Krzysztof Parzyszek 305bf5b21d [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
Krzysztof Parzyszek c12a5917d2 [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
Matt Arsenault a4451d88ee Consolidate internal denormal flushing controls
Currently there are 4 different mechanisms for controlling denormal
flushing behavior, and about as many equivalent frontend controls.

- AMDGPU uses the fp32-denormals and fp64-f16-denormals subtarget features
- NVPTX uses the nvptx-f32ftz attribute
- ARM directly uses the denormal-fp-math attribute
- Other targets indirectly use denormal-fp-math in one DAGCombine
- cl-denorms-are-zero has a corresponding denorms-are-zero attribute

AMDGPU wants a distinct control for f32 flushing from f16/f64, and as
far as I can tell the same is true for NVPTX (based on the attribute
name).

Work on consolidating these into the denormal-fp-math attribute, and a
new type specific denormal-fp-math-f32 variant. Only ARM seems to
support the two different flush modes, so this is overkill for the
other use cases. Ideally we would error on the unsupported
positive-zero mode on other targets from somewhere.

Move the logic for selecting the flush mode into the compiler driver,
instead of handling it in cc1. denormal-fp-math/denormal-fp-math-f32
are now both cc1 flags, but denormal-fp-math-f32 is not yet exposed as
a user flag.

-cl-denorms-are-zero, -fcuda-flush-denormals-to-zero and
-fno-cuda-flush-denormals-to-zero will be mapped to
-fp-denormal-math-f32=ieee or preserve-sign rather than the old
attributes.

Stop emitting the denorms-are-zero attribute for the OpenCL flag. It
has no in-tree users. The meaning would also be target dependent, such
as the AMDGPU choice to treat this as only meaning allow flushing of
f32 and not f16 or f64. The naming is also potentially confusing,
since DAZ in other contexts refers to instructions implicitly treating
input denormals as zero, not necessarily flushing output denormals to
zero.

This also does not attempt to change the behavior for the current
attribute. The LangRef now states that the default is ieee behavior,
but this is inaccurate for the current implementation. The clang
handling is slightly hacky to avoid touching the existing
denormal-fp-math uses. Fixing this will be left for a future patch.

AMDGPU is still using the subtarget feature to control the denormal
mode, but the new attribute are now emitted. A future change will
switch this and remove the subtarget features.
2020-01-17 20:09:53 -05:00
Ian Levesque 97ba483026 [xray] Allow instrumenting only function entry and/or only function exit
Extend -fxray-instrumentation-bundle to split function-entry and
function-exit into two separate options, so that it is possible to
instrument only function entry or only function exit.  For use cases
that only care about one or the other this will save significant overhead
and code size.

Differential Revision: https://reviews.llvm.org/D72890
2020-01-17 13:32:34 -08:00
Nico Weber fb5fafb23c Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well.
When LLVM_APPEND_VC_REV=OFF is set, the current git hash is no
longer embedded into binaries (mostly for --version output).
Without it, most binaries need to relink after every single
commit, even if they didn't change otherwise (due to, say,
a documentation-only commit).

LLVM_APPEND_VC_REV is ON by default, so this doesn't change the
default behavior of anything.

With this, all clients of GenerateVersionFromVCS.cmake honor
LLVM_APPEND_VC_REV.

Differential Revision: https://reviews.llvm.org/D72855
2020-01-16 19:04:08 -05:00
Krzysztof Parzyszek 6f3effbbf0 [Hexagon] Update autogenerated intrinsic info in clang
In addition to that, use target features to validate intrinsic
availability on a given target.
2020-01-16 14:20:12 -06:00
Nico Weber fb9413cb84 Remove some SVN-specific code.
$URL$ is an SVN keyword substitution enabled via
`svn propset svn:keywords "URL" tools/clang/lib/Basic/Version.cpp`.
Now that we no longer use SVN, it's no longer being replaced by
anything, and we no longer offer svn exports. So remove the
$URL$-specific logic.

The "cfe" path prefix removal also no longer makes sense now that
we're on git: Both CLANG_REPOSITORY and LLVM_REPOSITORY are usually
set to https://github.com/llvm/llvm-project.git

So remove that too, and remove the "llvm" prefix removal for symmetry.
With the github url, "llvm" _is_ found in the string, but not in
the place the function expected. Nobody noticed since the llvm
repository path is only used if CLANG_REVISION and LLVM_REVISION are
different, which in the git monorepo world they never should be.
(I might remove the "// Support LLVM in a separate repository"
block in a separate commit.)

Differential Revision: https://reviews.llvm.org/D72848
2020-01-16 11:02:52 -05:00
Scott Egerton cbe681bd83 Revert "[RISCV] Add Clang frontend support for Bitmanip extension"
This reverts commit 57cf6ee9c8.
2020-01-15 10:43:42 +00:00
Scott Egerton 57cf6ee9c8 [RISCV] Add Clang frontend support for Bitmanip extension
Summary: This adds the __riscv_bitmanip macro and the 'b' target feature to enable it.

Reviewers: asb, simoncook, lewis-revill, PaoloS, lenary

Reviewed By: lenary

Subscribers: Jim, rbar, johnrusso, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, pzheng, sameer.abuasal, apazos, luismarques, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71553
2020-01-14 17:45:45 +00:00
Fangrui Song ba91dffafe [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver
Follow-up of D72014. It is more appropriate to use a target
feature instead of a SubTypeArch to express the difference.

Reviewed By: #powerpc, jhibbits

Differential Revision: https://reviews.llvm.org/D72433
2020-01-10 11:43:17 -08:00
Jan Korous f28972facc [clang] Fix out-of-bounds memory access in ComputeLineNumbers
Differential Revision: https://reviews.llvm.org/D72409
2020-01-10 11:22:41 -08:00
Justin Hibbits ff0311c4b3 [PowerPC]: Add powerpcspe target triple subarch component
Summary:
This allows the use of '-target powerpcspe-unknown-linux-gnu' or
'powerpcspe-unknown-freebsd' to be used, instead of
'-target powerpc-unknown-linux-gnu -mspe'.

Reviewed By: dim
Differential Revision: https://reviews.llvm.org/D72014
2020-01-08 19:10:53 -06:00
Fangrui Song 8edf759ca7 [PowerPC][Triple] Use elfv2 on freebsd>=13 and linux-musl
Summary:
Every powerpc64le platform uses elfv2.

For powerpc64, the environments "elfv1" and "elfv2" were added for
FreeBSD ELFv1->ELFv2 migration in D61950.  FreeBSD developers have
decided to use OS versions to select ABI, and no one is relying on the
environments.

Also use elfv2 on powerpc64-linux-musl.

Users can always use -mabi=elfv1 and -mabi=elfv2 to override the default
ABI.

Reviewed By: adalava

Differential Revision: https://reviews.llvm.org/D72352
2020-01-07 11:40:56 -08:00
Johannes Doerfert 6c5d1f40ff [OpenMP][NFCI] Use the libFrontend ProcBindKind in Clang
This removes the OpenMPProcBindClauseKind enum in favor of
llvm::omp::ProcBindKind which lives in OpenMPConstants.h and was
introduced in D70109.

No change in behavior is expected.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D70289
2019-12-26 11:04:07 -06:00
Alexey Bataev 93dc40dddd [OPENMP50]Basic support for conditional lastprivate.
Added parsing/sema checks for conditional lastprivates.
2019-12-24 12:22:05 -05:00
Craig Topper d35bcbbb5d [Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize.
The validateOutputSize and validateInputSize need to check whether
AVX or AVX512 are enabled. But this can be affected by the
target attribute so we need to factor that in.

This patch moves some of the code from CodeGen to create an
appropriate feature map that we can pass to the function.

Differential Revision: https://reviews.llvm.org/D68627
2019-12-23 11:23:30 -08:00
Yaxun (Sam) Liu eca40066eb [NFC] Move OptionUtils from Basic to Driver
Differential Revision: https://reviews.llvm.org/D71802
2019-12-23 08:11:23 -05:00
Yonghong Song e3d8ee35e4 reland "[DebugInfo] Support to emit debugInfo for extern variables"
Commit d77ae1552f
("[DebugInfo] Support to emit debugInfo for extern variables")
added deebugInfo for extern variables for BPF target.
The commit is reverted by 891e25b02d
as the committed tests using %clang instead of %clang_cc1 causing
test failed in certain scenarios as reported by Reid Kleckner.

This patch fixed the tests by using %clang_cc1.

Differential Revision: https://reviews.llvm.org/D71818
2019-12-22 18:28:50 -08:00
Reid Kleckner 891e25b02d Revert "[DebugInfo] Support to emit debugInfo for extern variables"
This reverts commit d77ae1552f.

The tests committed along with this change do not pass, and should be
changed to use %clang_cc1.
2019-12-22 12:54:06 -08:00
Yaxun (Sam) Liu 7376d9eb38 [NFC] Separate getLastArgIntValue to Basic
getLastArgIntValue is a useful utility function to get command line argument as an integer.
Currently it is in Frontend so that it can only be used by clang -cc1. Move it to basic so
that it can also be used by clang driver.

Differential Revision: https://reviews.llvm.org/D71080
2019-12-21 20:39:31 -05:00
Karl-Johan Karlsson e8efac4b15 [clang] Fix the canonicalization of paths in -fdiagnostics-absolute-paths
In the current implementation of clang the canonicalization of paths in
diagnostic messages (when using -fdiagnostics-absolute-paths) only works
if the symbolic link is in the directory part of the filename, not if
the file itself is a symbolic link to another file.

This patch adds support to canonicalize the complete path including the
file.

Reviewers: rsmith, hans, rnk, ikudrin

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D70527
2019-12-20 09:16:33 +01:00
Amy Huang a85f5efd95 Add support for the MS qualifiers __ptr32, __ptr64, __sptr, __uptr.
Summary:
This adds parsing of the qualifiers __ptr32, __ptr64, __sptr, and __uptr and
lowers them to the corresponding address space pointer for 32-bit and 64-bit pointers.
(32/64-bit pointers added in https://reviews.llvm.org/D69639)

A large part of this patch is making these pointers ignore the address space
when doing things like overloading and casting.

https://bugs.llvm.org/show_bug.cgi?id=42359

Reviewers: rnk, rsmith

Subscribers: jholewinski, jvesely, nhaehnle, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71039
2019-12-18 10:41:12 -08:00
Alexey Bataev b6e7084e25 [OPENMP50]Add parsing/sema analysis for nontemporal clause.
Add basic support for parsing/sema analysis of the nontemporal clause in
simd-based directives.
2019-12-17 14:46:32 -05:00
Anastasia Stulova ed8dadb37c [Sema] Improve diagnostic about addr spaces for overload candidates
Allow sending address spaces into diagnostics to simplify and improve
error reporting. Improved wording of diagnostics for address spaces
in overloading.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71111
2019-12-13 12:35:18 +00:00
Warren Ristow bcae3a77af [PS4] Predefine the __SCE__ macro for the x86_64-scei-ps4 triple 2019-12-12 11:00:09 -08:00
Alexey Bataev 7b774b7cd4 [OPENMP50]Add if clause in teams distribute simd directive.
According to OpenMP 5.0, if clause can be used in for simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-12-11 12:30:18 -05:00
Yonghong Song d77ae1552f [DebugInfo] Support to emit debugInfo for extern variables
Extern variable usage in BPF is different from traditional
pure user space application. Recent discussion in linux bpf
mailing list has two use cases where debug info types are
required to use extern variables:
  - extern types are required to have a suitable interface
    in libbpf (bpf loader) to provide kernel config parameters
    to bpf programs.
    https://lore.kernel.org/bpf/CAEf4BzYCNo5GeVGMhp3fhysQ=_axAf=23PtwaZs-yAyafmXC9g@mail.gmail.com/T/#t
  - extern types are required so kernel bpf verifier can
    verify program which uses external functions more precisely.
    This will make later link with actual external function no
    need to reverify.
    https://lore.kernel.org/bpf/87eez4odqp.fsf@toke.dk/T/#m8d5c3e87ffe7f2764e02d722cb0d8cbc136880ed

This patch added clang support to emit debuginfo for extern variables
with a TargetInfo hook to enable it. The debuginfo for the
extern variable is emitted only if that extern variable is
referenced in the current compilation unit.

Currently, only BPF target enables to generate debug info for
extern variables. The emission of such debuginfo is disabled for C++
 at this moment since BPF only supports a subset of C language.
Emission with C++ can be enabled later if an appropriate use case
is identified.

-fstandalone-debug permits us to see more debuginfo with the cost
of bloated binary size. This patch did not add emission of extern
variable debug info with -fstandalone-debug. This can be
re-evaluated if there is a real need.

Differential Revision: https://reviews.llvm.org/D70696
2019-12-10 08:09:51 -08:00
Johannes Doerfert eb3e81f43f [OpenMP][NFCI] Introduce llvm/IR/OpenMPConstants.h
Summary:
The new OpenMPConstants.h is a location for all OpenMP related constants
(and helpers) to live.

This patch moves the directives there (the enum OpenMPDirectiveKind) and
rewires Clang to use the new location.

Initially part of D69785.

Reviewers: kiranchandramohan, ABataev, RaviNarayanaswamy, gtbercea, grokos, sdmitriev, JonChesterfield, hfinkel, fghanim

Subscribers: jholewinski, ppenzin, penzn, llvm-commits, cfe-commits, jfb, guansong, bollu, hiraditya, mgorny

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69853
2019-12-10 00:10:09 -06:00
Reid Kleckner eff08f4097 Revert "[Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize."
This reverts commit e1578fd2b7.

It introduces a dependency on Attr.h which I am removing from
ASTContext.h.
2019-12-06 15:42:14 -08:00
Craig Topper e1578fd2b7 [Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize.
The validateOutputSize and validateInputSize need to check whether
AVX or AVX512 are enabled. But this can be affected by the
target attribute so we need to factor that in.

This patch copies some of the code from CodeGen to create an
appropriate feature map that we can pass to the function. Probably
need some refactoring here to share more code with Codegen. Is
there a good place to do that? Also need to support the cpu_specific
attribute as well.

Differential Revision: https://reviews.llvm.org/D68627
2019-12-06 15:30:59 -08:00
Alexey Bataev 779a180d96 [OPENMP50]Add if clause in distribute simd directive.
According to OpenMP 5.0, if clause can be used in for simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-12-06 14:49:49 -05:00
cchen 47d6094d7f [OpenMP50] Add parallel master construct
Reviewers: ABataev, jdoerfert

Reviewed By: ABataev

Subscribers: rnk, jholewinski, guansong, arphaman, jfb, cfe-commits, sandoval, dreachem

Tags: #clang

Differential Revision: https://reviews.llvm.org/D70726
2019-12-05 14:35:27 -05:00
Reid Kleckner 33f6d465d7 Revert "[OpenMP50] Add parallel master construct, by Chi Chun Chen."
This reverts commit 713dab21e2.

Tests do not pass on Windows.
2019-12-04 14:50:06 -08:00
Soumi Manna 9c29aed698 Bug 43965 - Value of _MSVC_LANG doesn't match MSVC++ VS2019 /std:c++latest mode
Summary:
The patch adds correct value of _MSVC_LANG to match with MSVC++ VS2019 /std:c++latest mode.

    Bugzilla - Bug 43965
    https://bugs.llvm.org/show_bug.cgi?id=43965

    The value for a MS specific macro differs from Microsoft starting with VS2019 in /std:c++latest mode.

    -bash-4.2$ cat msvclang.cpp
    _MSVC_LANG

    -bash-4.2$ cl /std:c++latest -E msvclang.cpp
    Microsoft (R) C/C++ Optimizing Compiler Version 19.20.27508.1 for x64
    Copyright (C) Microsoft Corporation.  All rights reserved.

    /std:c++latest is provided as a preview of language features from the latest C++
    working draft, and we're eager to hear about bugs and suggestions for improvements.
    However, note that these features are provided as-is without support, and subject
    to changes or removal as the working draft evolves. See
    https://go.microsoft.com/fwlink/?linkid=2045807 for details.

    msvclang.cpp

    201705L

    -bash-4.2$ clang-cl /std:c++latest -E  msvclang.cpp
    201704L

Reviewers: rnk

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D70996
2019-12-04 14:39:41 -08:00
cchen 713dab21e2 [OpenMP50] Add parallel master construct, by Chi Chun Chen.
Reviewers: ABataev, jdoerfert

Reviewed By: ABataev

Subscribers: jholewinski, guansong, arphaman, jfb, cfe-commits, sandoval, dreachem

Tags: #clang

Differential Revision: https://reviews.llvm.org/D70726
2019-12-04 14:53:17 -05:00
Petr Hosek 9c3f9b9c12 [Clang] Define Fuchsia C++ABI
Currently, it is a modified version of the Itanium ABI, with the only
change being that constructors and destructors return 'this'.

Differential Revision: https://reviews.llvm.org/D70575
2019-12-03 18:35:57 -08:00
Victor Campos dcf11c5e86 [ARM][AArch64] Complex addition Neon intrinsics for Armv8.3-A
Summary:
Add support for vcadd_* family of intrinsics. This set of intrinsics is
available in Armv8.3-A.

The fp16 versions require the FP16 extension, which has been available
(opt-in) since Armv8.2-A.

Reviewers: t.p.northover

Reviewed By: t.p.northover

Subscribers: t.p.northover, kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D70862
2019-12-02 14:38:39 +00:00
Carey Williams 76fd58d0fe Revert "[ARM] Allocatable Global Register Variables for ARM"
This reverts commit 2d739f98d8.
2019-11-29 17:01:05 +00:00
Simon Atanasyan f4d32ae75b [mips] Check that features required by built-ins are enabled
Now Clang does not check that features required by built-in functions
are enabled. That causes errors in the backend reported in PR44018.

This patch fixes this bug by checking that required features
are enabled.

This should fix PR44018.

Differential Revision: https://reviews.llvm.org/D70808
2019-11-29 00:23:00 +03:00
Petr Hosek 68a3a3b281 [Clang] Enable RISC-V support for Fuchsia
We don't have a full sysroot yet, so for now we only include compiler
support and compiler-rt builtins, the rest of the runtimes will get
enabled later.

Differential Revision: https://reviews.llvm.org/D70477
2019-11-21 16:02:26 -08:00
Stefan Pintilie 5fcf89f778 [PowerPC] Add new Future CPU for PowerPC
This patch will add -mcpu=future into clang for PowerPC.

A CPU type is required for work that may possibly be enabled for some future
Power CPU. The CPU type future will serve that purpose. This patch introduces
no new functionality. It is an incremental patch on top of which Power PC work
for some future CPU can be done.

Differential Revision: https://reviews.llvm.org/D70262
2019-11-21 13:35:48 -06:00
Alexey Bataev 103f3c9e3b [OPENMP50]Add if clause in for simd directive.
According to OpenMP 5.0, if clause can be used in for simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-11-21 09:29:12 -05:00
Ilya Biryukov aa981c1802 Reland 9f3fdb0d7fab: [Driver] Use VFS to check if sanitizer blacklists exist
With updates to various LLVM tools that use SpecialCastList.

It was tempting to use RealFileSystem as the default, but that makes it
too easy to accidentally forget passing VFS in clang code.
2019-11-21 11:56:09 +01:00
Ilya Biryukov 9f3fdb0d7f Revert "[Driver] Use VFS to check if sanitizer blacklists exist"
This reverts commit ba6f906854.
Commit caused compilation errors on llvm tests. Will fix and re-land.
2019-11-21 11:31:14 +01:00
Ilya Biryukov ba6f906854 [Driver] Use VFS to check if sanitizer blacklists exist
Summary:
This is a follow-up to 590f279c45, which
moved some of the callers to use VFS.

It turned out more code in Driver calls into real filesystem APIs and
also needs an update.

Reviewers: gribozavr2, kadircet

Reviewed By: kadircet

Subscribers: ormris, mgorny, hiraditya, llvm-commits, jkorous, cfe-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D70440
2019-11-21 11:00:30 +01:00
Alexey Bataev d08c056695 [OPENMP50]Add if clause in simd directive.
According to OpenMP 5.0, if clause can be used in simd directive. If
condition in the if clause if false, the non-vectorized version of the
loop must be executed.
2019-11-19 15:58:19 -05:00
Anna Welker 2d739f98d8 [ARM] Allocatable Global Register Variables for ARM
Provides support for using r6-r11 as globally scoped
      register variables. This requires a -ffixed-rN flag
      in order to reserve rN against general allocation.

      If for a given GRV declaration the corresponding flag
      is not found, or the the register in question is the
      target's FP, we fail with a diagnostic.

      Differential Revision: https://reviews.llvm.org/D68862
2019-11-18 10:07:37 +00:00
Momchil Velikov aa6d48fa70 Implement target(branch-protection) attribute for AArch64
This patch implements `__attribute__((target("branch-protection=...")))`
in a manner, compatible with the analogous GCC feature:

https://gcc.gnu.org/onlinedocs/gcc-9.2.0/gcc/AArch64-Function-Attributes.html#AArch64-Function-Attributes

Differential Revision: https://reviews.llvm.org/D68711
2019-11-15 15:40:46 +00:00
Justin Hibbits bc4bc5aa0d Add 8548 CPU definition and attributes
8548 CPU is GCC's name for the e500v2, so accept this in clang.  The
e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well,
as GCC does.

Differential Revision:  https://reviews.llvm.org/D67787
2019-11-12 20:34:34 -06:00
Tim Northover 44e5879f0f AArch64: add arm64_32 support to Clang. 2019-11-12 12:45:18 +00:00
Duncan P. N. Exon Smith eef6902160 clang/Modules: Delay err_module_file_conflict if a diagnostic is in flight
As part of an audit of whether all errors are being reported from the
ASTReader, delay err_module_file_conflict if a diagnostic is already in
flight when it is hit.  This required plumbing an extra argument through
the delayed diagnostic mechanics in DiagnosticsEngine.
2019-11-11 15:34:52 -08:00
Alexey Bataev fde11e9f23 [OPENMP50]Generalize handling of context matching/scoring.
Summary:
Untie context matching/scoring from the attribute for declare variant
directive to simplify future uses in other context-dependent directives.

Reviewers: jdoerfert

Subscribers: guansong, kkwli0, caomhin, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69952
2019-11-11 14:41:10 -05:00
Alex Suhan b314414570 Basic: fix FileManager invalidation issue for file redirect
Insertion into SeenFileEntries can invalidate iterators, we need to do
another lookup on the re-intern path.
2019-11-08 17:02:44 -05:00
Jan Korous 590f279c45 [clang] Add VFS support for sanitizers' blacklists
Differential Revision: https://reviews.llvm.org/D69648
2019-11-08 10:58:50 -08:00
Nick Desaulniers 51adeae1c9 remove redundant LLVM version from version string when setting CLANG_VENDOR
Summary:
When downstream LLVM distributions (like AOSP) set the CLANG_VENDOR
cmake variable, the version string printed by the clang driver looks
like:

$ clang --version
[CLANG_VENDOR] clang version X.X.X ([CLANG_REPOSITORY_STRING] sha) (based on LLVM X.X.X)

Rather than the more standard:
$ clang --version
clang version X.X.X ([CLANG_REPOSITORY_STRING] sha)

Based on feedback the the version string is a little long, the trailing
"(based on LLVM X.X.X)" is redundant and makes less sense after moving
LLVM to the monorepo. And it is only added should vendors set the cmake
variable CLANG_VENDOR. Let's remove it.

Reviewers: jyknight, eli.friedman, rsmith, rjmccall, efriedma

Reviewed By: efriedma

Subscribers: arphaman, efriedma, cfe-commits, srhines

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69925
2019-11-08 09:24:17 -08:00
Simon Atanasyan a751f557d8 [mips] Set macros for Octeon+ CPU 2019-11-07 13:58:51 +03:00
Simon Atanasyan 3552d3e0f7 [mips] Add `octeon+` to the list of CPUs accepted by the driver 2019-11-07 13:58:50 +03:00
Craig Topper a8ccb48f69 [X86] Add 'fxsr' feature to -march=pentium2 to match X86.td and gcc. 2019-11-06 10:27:53 -08:00
Craig Topper ba73aad4f6 [X86] Add 'mmx' to all CPUs that have a version of 'sse' and weren't already enabling '3dnow'
All SSE capable CPUs have MMX. 3dnow implicitly enables MMX.

We have code that detects if sse is enabled and implicitly enables
MMX unless -mno-mmx is passed. So in most cases we were already
enabling MMX if march passed a CPU that supported SSE.

The exception to this is if you pass -march for a cpu supports SSE
and also pass -mno-sse. We should still enable MMX since its part
of the CPU capability.
2019-11-06 10:02:40 -08:00
Simon Atanasyan 0d14656b9d [mips] Set __OCTEON__ macros 2019-11-05 12:10:58 +03:00
Simon Atanasyan e578d0fd29 [mips] Fix `__mips_isa_rev` macros value for Octeon CPU 2019-11-05 12:10:58 +03:00
Alexey Bataev 14a388f43b [OPENMP50]Add support for parallel master taskloop simd directive.
Added full support for parallel master taskloop simd directive.
2019-10-30 10:23:33 -04:00
Guillaume Chatelet 1c85a2e8dc isBuiltinFunc() uses StringRef instead of const char*
Summary: This prevents a bug when passing nullptr, StringRef ctor would call strlen(nullptr).

Reviewers: vlad.tsyrklevich

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69569
2019-10-29 17:36:55 +01:00
Krzysztof Parzyszek 99f51960fd [Hexagon] Handle remaining registers in getRegisterByName()
This fixes https://llvm.org/PR43829.
2019-10-29 08:56:01 -05:00
paulhoad 8fa5e98fd1 [clang-format] Remove duplciate code from Invalid BOM detection
Summary:
Review comments on {D68767} asked that this duplicated code in clang-format was moved to one central location that being SourceManager (where it had originally be copied from I assume)

Moved function into static function  ContentCache::getInvalidBOM(...)  - (closest class to where it was defined before)
Updated clang-format to call this static function

Added unit tests for said new function in BasicTests

Sorry not my normal code area so may have the wrong reviewers. (but your names were on the recent history)

Reviewers: bruno, arphaman, klimek, owenpan, mitchell-stellar, dexonsmith

Reviewed By: owenpan

Subscribers: cfe-commits

Tags: #clang, #clang-format, #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D68914
2019-10-24 20:24:44 +01:00
Bjorn Pettersson 78424e5f84 Prune include of DataLayout.h from include/clang/Basic/TargetInfo.h. NFC
Summary:
Use a forward declaration of DataLayout instead of including
DataLayout.h in clangs TargetInfo.h. This reduces include
dependencies toward DataLayout.h (and other headers such as
DerivedTypes.h, Type.h that is included by DataLayout.h).

Needed to move implemantation of TargetInfo::resetDataLayout
from TargetInfo.h to TargetInfo.cpp.

Reviewers: rnk

Reviewed By: rnk

Subscribers: jvesely, nhaehnle, cfe-commits, llvm-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D69262

llvm-svn: 375438
2019-10-21 17:58:14 +00:00
Alexey Bataev b8552abfe7 [OPENMP50]Add support for master taskloop simd.
Added  trsing/semantics/codegen for combined construct master taskloop simd.

llvm-svn: 375255
2019-10-18 16:47:35 +00:00
Alexey Bataev 5bbceadfc8 [OPENMP50]Add support for 'parallel master taskloop' construct.
Added parsing/sema/codegen support for 'parallel master taskloop'
constructs. Some of the clauses, like 'grainsize', 'num_tasks', 'final'
and 'priority' are not supported in full, only constant expressions can
be used currently in these clauses.

llvm-svn: 374791
2019-10-14 17:17:41 +00:00
Volodymyr Sapsai e8752a9d1b [Stats] Convert some ad-hoc header search stats to ALWAYS_ENABLED_STATISTIC.
rdar://problem/55715134

Reviewers: dsanders, bogner, rtereshin

Reviewed By: dsanders

Subscribers: hiraditya, jkorous, dexonsmith, ributzka, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68252

llvm-svn: 374581
2019-10-11 18:22:34 +00:00
Alexey Bataev 60e51c4803 [OPENMP50]Support for 'master taskloop' directive.
Added full support for master taskloop directive.

llvm-svn: 374437
2019-10-10 20:13:02 +00:00
Yonghong Song 05e46979d2 [BPF] do compile-once run-everywhere relocation for bitfields
A bpf specific clang intrinsic is introduced:
   u32 __builtin_preserve_field_info(member_access, info_kind)
Depending on info_kind, different information will
be returned to the program. A relocation is also
recorded for this builtin so that bpf loader can
patch the instruction on the target host.
This clang intrinsic is used to get certain information
to facilitate struct/union member relocations.

The offset relocation is extended by 4 bytes to
include relocation kind.
Currently supported relocation kinds are
 enum {
    FIELD_BYTE_OFFSET = 0,
    FIELD_BYTE_SIZE,
    FIELD_EXISTENCE,
    FIELD_SIGNEDNESS,
    FIELD_LSHIFT_U64,
    FIELD_RSHIFT_U64,
 };
for __builtin_preserve_field_info. The old
access offset relocation is covered by
    FIELD_BYTE_OFFSET = 0.

An example:
struct s {
    int a;
    int b1:9;
    int b2:4;
};
enum {
    FIELD_BYTE_OFFSET = 0,
    FIELD_BYTE_SIZE,
    FIELD_EXISTENCE,
    FIELD_SIGNEDNESS,
    FIELD_LSHIFT_U64,
    FIELD_RSHIFT_U64,
};

void bpf_probe_read(void *, unsigned, const void *);
int field_read(struct s *arg) {
  unsigned long long ull = 0;
  unsigned offset = __builtin_preserve_field_info(arg->b2, FIELD_BYTE_OFFSET);
  unsigned size = __builtin_preserve_field_info(arg->b2, FIELD_BYTE_SIZE);
 #ifdef USE_PROBE_READ
  bpf_probe_read(&ull, size, (const void *)arg + offset);
  unsigned lshift = __builtin_preserve_field_info(arg->b2, FIELD_LSHIFT_U64);
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
  lshift = lshift + (size << 3) - 64;
 #endif
 #else
  switch(size) {
  case 1:
    ull = *(unsigned char *)((void *)arg + offset); break;
  case 2:
    ull = *(unsigned short *)((void *)arg + offset); break;
  case 4:
    ull = *(unsigned int *)((void *)arg + offset); break;
  case 8:
    ull = *(unsigned long long *)((void *)arg + offset); break;
  }
  unsigned lshift = __builtin_preserve_field_info(arg->b2, FIELD_LSHIFT_U64);
 #endif
  ull <<= lshift;
  if (__builtin_preserve_field_info(arg->b2, FIELD_SIGNEDNESS))
    return (long long)ull >> __builtin_preserve_field_info(arg->b2, FIELD_RSHIFT_U64);
  return ull >> __builtin_preserve_field_info(arg->b2, FIELD_RSHIFT_U64);
}

There is a minor overhead for bpf_probe_read() on big endian.

The code and relocation generated for field_read where bpf_probe_read() is
used to access argument data on little endian mode:
        r3 = r1
        r1 = 0
        r1 = 4  <=== relocation (FIELD_BYTE_OFFSET)
        r3 += r1
        r1 = r10
        r1 += -8
        r2 = 4  <=== relocation (FIELD_BYTE_SIZE)
        call bpf_probe_read
        r2 = 51 <=== relocation (FIELD_LSHIFT_U64)
        r1 = *(u64 *)(r10 - 8)
        r1 <<= r2
        r2 = 60 <=== relocation (FIELD_RSHIFT_U64)
        r0 = r1
        r0 >>= r2
        r3 = 1  <=== relocation (FIELD_SIGNEDNESS)
        if r3 == 0 goto LBB0_2
        r1 s>>= r2
        r0 = r1
LBB0_2:
        exit

Compare to the above code between relocations FIELD_LSHIFT_U64 and
FIELD_LSHIFT_U64, the code with big endian mode has four more
instructions.
        r1 = 41   <=== relocation (FIELD_LSHIFT_U64)
        r6 += r1
        r6 += -64
        r6 <<= 32
        r6 >>= 32
        r1 = *(u64 *)(r10 - 8)
        r1 <<= r6
        r2 = 60   <=== relocation (FIELD_RSHIFT_U64)

The code and relocation generated when using direct load.
        r2 = 0
        r3 = 4
        r4 = 4
        if r4 s> 3 goto LBB0_3
        if r4 == 1 goto LBB0_5
        if r4 == 2 goto LBB0_6
        goto LBB0_9
LBB0_6:                                 # %sw.bb1
        r1 += r3
        r2 = *(u16 *)(r1 + 0)
        goto LBB0_9
LBB0_3:                                 # %entry
        if r4 == 4 goto LBB0_7
        if r4 == 8 goto LBB0_8
        goto LBB0_9
LBB0_8:                                 # %sw.bb9
        r1 += r3
        r2 = *(u64 *)(r1 + 0)
        goto LBB0_9
LBB0_5:                                 # %sw.bb
        r1 += r3
        r2 = *(u8 *)(r1 + 0)
        goto LBB0_9
LBB0_7:                                 # %sw.bb5
        r1 += r3
        r2 = *(u32 *)(r1 + 0)
LBB0_9:                                 # %sw.epilog
        r1 = 51
        r2 <<= r1
        r1 = 60
        r0 = r2
        r0 >>= r1
        r3 = 1
        if r3 == 0 goto LBB0_11
        r2 s>>= r1
        r0 = r2
LBB0_11:                                # %sw.epilog
        exit

Considering verifier is able to do limited constant
propogation following branches. The following is the
code actually traversed.
        r2 = 0
        r3 = 4   <=== relocation
        r4 = 4   <=== relocation
        if r4 s> 3 goto LBB0_3
LBB0_3:                                 # %entry
        if r4 == 4 goto LBB0_7
LBB0_7:                                 # %sw.bb5
        r1 += r3
        r2 = *(u32 *)(r1 + 0)
LBB0_9:                                 # %sw.epilog
        r1 = 51   <=== relocation
        r2 <<= r1
        r1 = 60   <=== relocation
        r0 = r2
        r0 >>= r1
        r3 = 1
        if r3 == 0 goto LBB0_11
        r2 s>>= r1
        r0 = r2
LBB0_11:                                # %sw.epilog
        exit

For native load case, the load size is calculated to be the
same as the size of load width LLVM otherwise used to load
the value which is then used to extract the bitfield value.

Differential Revision: https://reviews.llvm.org/D67980

llvm-svn: 374099
2019-10-08 18:23:17 +00:00
Alexey Bataev dba792c522 [OPENMP]Use standard parsing for 'match' clause, NFC.
Reused standard clauses parsing scheme for parsing/matching 'match'
clause in 'declare variant' directive.

llvm-svn: 372635
2019-09-23 18:13:31 +00:00
Ulrich Weigand 48b40834dc [SystemZ] Support z15 processor name
The recently announced IBM z15 processor implements the architecture
already supported as "arch13" in LLVM.  This patch adds support for
"z15" as an alternate architecture name for arch13.

Corrsponding LLVM support was committed as rev. 372435.

llvm-svn: 372436
2019-09-20 23:06:03 +00:00
Eli Friedman 33054a02f7 [ARM] Update clang for removal of vfp2d16 and vfp2d16sp
Matching fix for https://reviews.llvm.org/D67375 (r372186).

Differential Revision: https://reviews.llvm.org/D67467

llvm-svn: 372187
2019-09-17 21:43:19 +00:00
Kito Cheng 6455938441 [RISCV] Define __riscv_cmodel_medlow and __riscv_cmodel_medany correctly
RISC-V LLVM was only implement small/medlow code model, so it defined
__riscv_cmodel_medlow directly without check.

Now, we have medium/medany code model in RISC-V back-end, it should
define according the actually code model.

Reviewed By: lewis-revill

Differential Revision: https://reviews.llvm.org/D67065

llvm-svn: 372078
2019-09-17 08:09:56 +00:00
Erich Keane b79f331958 Move some definitions from Sema to Basic to fix shared libs build
r371875 moved some functionality around to a Basic header file, but
didn't move its definitions as well.  This patch moves some things
around so that shared library building can work.

llvm-svn: 371985
2019-09-16 13:58:59 +00:00
Alexey Bataev d158cf64d6 [OPENMP5.0]Add basic support for declare variant directive.
Added basic support for declare variant directive and its match clause
with user context selector.

llvm-svn: 371892
2019-09-13 20:18:17 +00:00
Amy Huang 7b1d793713 Reland "Change the X86 datalayout to add three address spaces
for 32 bit signed, 32 bit unsigned, and 64 bit pointers."
This reverts 57076d3199.

Original review at https://reviews.llvm.org/D64931.
Review for added fix at https://reviews.llvm.org/D66843.

llvm-svn: 371568
2019-09-10 23:15:38 +00:00
David Candler a59bffb576 [ARM] Add support for the s,j,x,N,O inline asm constraints
A number of inline assembly constraints are currently supported by LLVM, but rejected as invalid by Clang:

Target independent constraints:

s: An integer constant, but allowing only relocatable values

ARM specific constraints:

j: An immediate integer between 0 and 65535 (valid for MOVW)
x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or q0-q3
N: An immediate integer between 0 and 31 (Thumb1 only)
O: An immediate integer which is a multiple of 4 between -508 and 508. (Thumb1 only)

This patch adds support to Clang for the missing constraints along with some checks to ensure that the constraints are used with the correct target and Thumb mode, and that immediates are within valid ranges (at least where possible). The constraints are already implemented in LLVM, but just a couple of minor corrections to checks (V8M Baseline includes MOVW so should work with 'j', 'N' and 'O' shouldn't be valid in Thumb2) so that Clang and LLVM are in line with each other and the documentation.

Differential Revision: https://reviews.llvm.org/D65863

Change-Id: I18076619e319bac35fbb60f590c069145c9d9a0a
llvm-svn: 371079
2019-09-05 15:17:25 +00:00
Justin Hibbits 3dac214273 Add -m(no)-spe to clang
Summary:
r337347 added support for the Signal Processing Engine (SPE) to LLVM.
This follows that up with the clang side.

This adds -mspe and -mno-spe, to match GCC.

Subscribers: nemanjai, kbarton, cfe-commits

Differential Revision: https://reviews.llvm.org/D49754

llvm-svn: 371066
2019-09-05 13:38:46 +00:00
Matt Arsenault 281f2e2c37 AMDGPU: Add builtins for is_shared/is_private
llvm-svn: 371010
2019-09-05 03:00:43 +00:00
Sam Elliott 03c9e139c7 [RISCV] Correct Logic around ilp32e macros
Summary:
GCC seperates the `__riscv_float_abi_*` macros and the
`__riscv_abi_rve` macro. If the chosen abi is ilp32e, `gcc -march=rv32i
-mabi=ilp32i -E -dM` shows that both `__riscv_float_abi_soft` and
`__riscv_abi_rve` are set.

This patch corrects the compiler logic around these defines.

At the moment, this patch will not change clang's behaviour, because we do not
accept the `ilp32e` abi yet.

Reviewers: luismarques, asb

Reviewed By: luismarques

Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66591

llvm-svn: 370709
2019-09-03 08:47:58 +00:00
Alex Lorenz 0377ca641c Introduce a DirectoryEntryRef that stores both a reference and an
accessed name to the directory entry

This commit introduces a parallel API that returns a DirectoryEntryRef
to the FileManager, similar to the parallel FileEntryRef API. All
uses will have to be update in follow-up patches. The immediate use of the new API in this
patch fixes the issue where a file manager was reused in clang-scan-deps,
but reported an different file path whenever a framework lookup was done through a symlink.

Differential Revision: https://reviews.llvm.org/D67026

llvm-svn: 370562
2019-08-31 01:26:04 +00:00
Duncan P. N. Exon Smith e1b7f22b34 ASTReader: Bypass overridden files when reading PCHs
If contents of a file that is part of a PCM are overridden when reading
it, but weren't overridden when the PCM was being built, the ASTReader
will emit an error.  Now it creates a separate FileEntry for recovery,
bypassing the overridden content instead of discarding it.  The
pre-existing testcase clang/test/PCH/remap-file-from-pch.cpp confirms
that the new recovery method works correctly.

This resolves a long-standing FIXME to avoid hypothetically invalidating
another precompiled module that's already using the overridden contents.

This also removes ContentCache-related API that would be unsafe to use
across `CompilerInstance`s in an implicit modules build.  This helps to
unblock us sinking it from SourceManager into FileManager in the future,
which would allow us to delete `InMemoryModuleCache`.

https://reviews.llvm.org/D66710

llvm-svn: 370546
2019-08-30 22:59:25 +00:00
Duncan P. N. Exon Smith 122705b911 FileManager: Remove ShouldCloseOpenFile argument from getBufferForFile, NFC
Remove this dead code.  We always close it.

llvm-svn: 370488
2019-08-30 16:56:26 +00:00
Volodymyr Sapsai 0785f8d0bb Remove `FileManager::invalidateCache` as it has no callers anymore. NFC.
llvm-svn: 370400
2019-08-29 19:51:25 +00:00
Craig Topper 5a43fdd313 [X86] Remove what little support we had for MPX
-Deprecate -mmpx and -mno-mpx command line options
-Remove CPUID detection of mpx for -march=native
-Remove MPX from all CPUs
-Remove MPX preprocessor define

I've left the "mpx" string in the backend so we don't fail on old IR, but its not connected to anything.

gcc has also deprecated these command line options. https://www.phoronix.com/scan.php?page=news_item&px=GCC-Patch-To-Drop-MPX

Differential Revision: https://reviews.llvm.org/D66669

llvm-svn: 370393
2019-08-29 18:09:02 +00:00
Vlad Tsyrklevich 57076d3199 Revert "Change the X86 datalayout to add three address spaces for 32 bit signed,"
This reverts commit r370083 because it caused check-lld failures on
sanitizer-x86_64-linux-fast.

llvm-svn: 370142
2019-08-28 01:08:54 +00:00
Amy Huang 1299945b81 Change the X86 datalayout to add three address spaces for 32 bit signed,
32 bit unsigned, and 64 bit pointers.

llvm-svn: 370083
2019-08-27 17:46:53 +00:00
Sam Elliott f260630e8f [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics
Summary: This ensures that libcalls aren't generated when the target supports atomics. Atomics aren't in the base RV32I/RV64I instruction sets, so MaxAtomicInlineWidth and MaxAtomicPromoteWidth are set only when the atomics extension is being targeted. This must be done in setMaxAtomicWidth, as this should be done after handleTargetFeatures has been called.

Reviewers: jfb, jyknight, wmi, asb

Reviewed By: asb

Subscribers: pzheng, MaskRay, s.egerton, lenary, dexonsmith, psnobl, benna, Jim, JohnLLVM, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, lewis-revill, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57450

llvm-svn: 370073
2019-08-27 15:41:16 +00:00
Duncan P. N. Exon Smith f584819085 ContentCache: Drop getBuffer's dependency on SourceManager
Refactor ContentCache::IsSystemFile to IsFileVolatile, checking
SourceManager::userFilesAreVolatile at construction time.  This is a
step toward lowering ContentCache down from SourceManager to
FileManager.

No functionality change intended.

https://reviews.llvm.org/D66713

llvm-svn: 369958
2019-08-26 20:32:05 +00:00
Richard Smith 4d3a336612 [msvc] Add necessary #include to make compiler intrinsics available.
llvm-svn: 369944
2019-08-26 18:33:15 +00:00
Duncan P. N. Exon Smith 9ef6c49baf FileManager: Use llvm::Expected in new getFileRef API
`FileManager::getFileRef` is a modern API which we expect to convert to
over time.  We should modernize the error handling as well, using
`llvm::Expected` instead of `llvm::ErrorOr`, to help clients that care
about errors to ensure nothing is missed.

However, not all clients care.  I've also added another path for those
that don't:

- `FileEntryRef` is now copy- and move-assignable (using a pointer
  instead of a reference).
- `FileManager::getOptionalFileRef` returns an `llvm::Optional` instead
  of `llvm::Expected`.
- Added an `llvm::expectedToOptional` utility in case this is useful
  elsewhere.

https://reviews.llvm.org/D66705

llvm-svn: 369943
2019-08-26 18:29:51 +00:00
Richard Smith ac1d5986c8 Fix file header.
llvm-svn: 369941
2019-08-26 18:21:13 +00:00
Richard Smith 26a92d5852 Improve behavior in the case of stack exhaustion.
Summary:
Clang performs various recursive operations (such as template instantiation),
and may use non-trivial amounts of stack space in each recursive step (for
instance, due to recursive AST walks). While we try to keep the stack space
used by such steps to a minimum and we have explicit limits on the number of
such steps we perform, it's impractical to guarantee that we won't blow out the
stack on deeply recursive template instantiations on complex ASTs, even with
only a moderately high instantiation depth limit.

The user experience in these cases is generally terrible: we crash with
no hint of what went wrong. Under this patch, we attempt to do better:

 * Detect when the stack is nearly exhausted, and produce a warning with a
   nice template instantiation backtrace, telling the user that we might
   run slowly or crash.

 * For cases where we're forced to trigger recursive template
   instantiation in arbitrarily-deeply-nested contexts, check whether
   we're nearly out of stack space and allocate a new stack (by spawning
   a new thread) after producing the warning.

Reviewers: rnk, aaron.ballman

Subscribers: mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66361

llvm-svn: 369940
2019-08-26 18:18:07 +00:00
Richard Smith 98f9e94e57 Fix use of invalidated iterator introduced by r369680.
llvm-svn: 369932
2019-08-26 17:31:06 +00:00
Duncan P. N. Exon Smith 894b8d1d85 FileManager: Factor duplicated code in getBufferForFile, NFC
Incidentally, this also unifies the two versions (removing an
unnecessary call to `SmallString::c_str`).

llvm-svn: 369861
2019-08-25 01:18:35 +00:00
Alexey Bataev 729e242a79 [OPENMP5.0]Add support for device_type clause in declare target
construct.

OpenMP 5.0 introduced new clause for declare target directive, device_type clause, which may accept values host, nohost, and any. Host means
that the function must be emitted only for the host, nohost - only for
the device, and any - for both, device and the host.

llvm-svn: 369775
2019-08-23 16:11:14 +00:00
Alex Lorenz 4dc5573acc Introduce FileEntryRef and use it when handling includes to report correct dependencies
when the FileManager is reused across invocations

This commit introduces a parallel API to FileManager's getFile: getFileEntryRef, which returns
a reference to the FileEntry, and the name that was used to access the file. In the case of
a VFS with 'use-external-names', the FileEntyRef contains the external name of the file,
not the filename that was used to access it.

The new API is adopted only in the HeaderSearch and Preprocessor for include file lookup, so that the
accessed path can be propagated to SourceManager's FileInfo. SourceManager's FileInfo now can report this accessed path, using
the new getName method. This API is then adopted in the dependency collector, which now correctly reports dependencies when a file
is included both using a symlink and a real path in the case when the FileManager is reused across multiple Preprocessor invocations.

Note that this patch does not fix all dependency collector issues, as the same problem is still present in other cases when dependencies
are obtained using FileSkipped, InclusionDirective, and HasInclude. This will be fixed in follow-up commits.

Differential Revision: https://reviews.llvm.org/D65907

llvm-svn: 369680
2019-08-22 18:15:50 +00:00
Alex Lorenz 06abd69695 NFCI: Simplify SourceManager::translateFile by removing code path that should never be taken
I noticed that SourceManager::translateFile has code that doesn't really make sense.
In particular, if it fails to find a FileID by comparing FileEntry * values, it tries to
look through files that have the same filename, to see if they have a matching inode to try to
find the right FileID. However, the inode comparison seem redundant, as Clang's FileManager
already deduplicates FileEntry * values by inode.
Thus the comparisons between inodes should never actually succeed, and the comparison between FileEntry * values should be sufficient here.

Differential Revision: https://reviews.llvm.org/D65481

llvm-svn: 369585
2019-08-21 21:37:09 +00:00
Nico Weber f56e8991f4 clang: Fix typo in comment
llvm-svn: 369536
2019-08-21 15:37:27 +00:00
Jian Cai 16fa8b0970 Reland "[ARM] push LR before __gnu_mcount_nc"
This relands r369147 with fixes to unit tests.

https://reviews.llvm.org/D65019

llvm-svn: 369173
2019-08-16 23:30:16 +00:00
Jian Cai 2d957cfe02 Revert "[ARM] push LR before __gnu_mcount_nc"
This reverts commit f4cf3b9593.

llvm-svn: 369149
2019-08-16 20:40:21 +00:00
Jian Cai f4cf3b9593 [ARM] push LR before __gnu_mcount_nc
Push LR register before calling __gnu_mcount_nc as it expects the value of LR register to be the top value of
the stack on ARM32.

Differential Revision: https://reviews.llvm.org/D65019

llvm-svn: 369147
2019-08-16 20:21:08 +00:00
Lewis Revill 1653ebee3f [RISCV] Add inline asm constraint A for RISC-V
This allows the constraint A to be used in inline asm for RISC-V, which
allows an address held in a register to be used.

This patch adds the minimal amount of code required to get operands with
the right constraints to compile.

Differential Revision: https://reviews.llvm.org/D54295

llvm-svn: 369093
2019-08-16 10:23:56 +00:00
Jonas Devlieghere 2b3d49b610 [Clang] Migrate llvm::make_unique to std::make_unique
Now that we've moved to C++14, we no longer need the llvm::make_unique
implementation from STLExtras.h. This patch is a mechanical replacement
of (hopefully) all the llvm::make_unique instances across the monorepo.

Differential revision: https://reviews.llvm.org/D66259

llvm-svn: 368942
2019-08-14 23:04:18 +00:00
Stanislav Mekhanoshin c17705b7fb [AMDGPU] Do not assume a default GCN target
Differential Revision: https://reviews.llvm.org/D66246

llvm-svn: 368917
2019-08-14 20:55:15 +00:00
Erik Pilkington aa3855694f [Sema][ObjC] Fix a -Wformat false positive with localizedStringForKey
Only honour format_arg attributes on -[NSBundle localizedStringForKey] when its
argument has a format specifier in it, otherwise its likely to just be a key to
fetch localized strings.

Fixes rdar://23622446

Differential revision: https://reviews.llvm.org/D27165

llvm-svn: 368878
2019-08-14 16:57:11 +00:00
Pengfei Wang e28cbbd5d4 [X86] Support -march=tigerlake
Support -march=tigerlake for x86.
Compare with Icelake Client, It include 4 more new features ,they are
avx512vp2intersect, movdiri, movdir64b, shstk.

Patch by Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D65840

llvm-svn: 368543
2019-08-12 01:29:46 +00:00
Richard Sandiford eb485fbc71 Add SVE opaque built-in types
This patch adds the SVE built-in types defined by the Procedure Call
Standard for the Arm Architecture:

   https://developer.arm.com/docs/100986/0000

It handles the types in all relevant places that deal with built-in types.
At the moment, some of these places bail out with an error, including:

   (1) trying to generate LLVM IR for the types
   (2) trying to generate debug info for the types
   (3) trying to mangle the types using the Microsoft C++ ABI
   (4) trying to @encode the types in Objective C

(1) and (2) are fixed by follow-on patches but (unlike this patch)
they deal mostly with target-specific LLVM details, so seemed like
a logically separate change.  There is currently no spec for (3) and
(4), so reporting an error seems like the correct behaviour for now.

The intention is that the types will become sizeless types:

   http://lists.llvm.org/pipermail/cfe-dev/2019-June/062523.html

The main purpose of the sizeless type extension is to diagnose
impossible or dangerous uses of the types, such as any that would
require sizeof to have a meaningful defined value.

Until then, the patch sets the alignments of the types to the values
specified in the link above.  It also sets the sizes of the types to
zero, which is chosen to be consistently wrong and shouldn't affect
correctly-written code (i.e. code that would compile even with the
sizeless type extension).

The patch adds the common subset of functionality needed to test the
sizeless type extension on the one hand and to provide SVE intrinsic
functions on the other.  After this patch, the two pieces of work are
essentially independent.

The patch is based on one by Graham Hunter:

   https://reviews.llvm.org/D59245

Differential Revision: https://reviews.llvm.org/D62960

llvm-svn: 368413
2019-08-09 08:52:54 +00:00
Diogo N. Sampaio 9427aa2d54 [ARM] Set default alignment to 64bits
Summary:
The maximum alignment used by ARM arch
is 64bits, not 128.

This could cause overaligned memory
access for 128 bit neon vector that
have unpredictable behaviour.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=42668

Reviewers: ostannard, dmgreen, srhines, danalbert, pirama, peter.smith

Reviewed By: pirama, peter.smith

Subscribers: phosek, thegameg, thakis, llvm-commits, carwil, peter.smith, javed.absar, kristof.beyls, cfe-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65000

llvm-svn: 368288
2019-08-08 12:50:36 +00:00
Rainer Orth 09d890d728 Move LangStandard*, InputKind::Language to Basic
This patch is a prerequisite for using LangStandard from Driver in
https://reviews.llvm.org/D64793.

It moves LangStandard* and InputKind::Language to Basic.  It is mostly
mechanical, with only a few changes of note:

- enum Language has been changed into enum class Language : uint8_t to
  avoid a clash between OpenCL in enum Language and OpenCL in enum
  LangFeatures and not to increase the size of class InputKind.

- Now that getLangStandardForName, which is currently unused, also checks
  both canonical and alias names, I've introduced a helper getLangKind
  which factors out a code pattern already used 3 times.

The patch has been tested on x86_64-pc-solaris2.11, sparcv9-sun-solaris2.11,
and x86_64-pc-linux-gnu.

There's a companion patch for lldb which uses LangStandard.h
(https://reviews.llvm.org/D65717).

While polly includes isl which in turn uses InputKind::C, that part of the
code isn't even built inside the llvm tree.  I've posted a patch to allow
for both InputKind::C and Language::C upstream
(https://groups.google.com/forum/#!topic/isl-development/6oEvNWOSQFE).

Differential Revision: https://reviews.llvm.org/D65562

llvm-svn: 367864
2019-08-05 13:59:26 +00:00
Serge Pavlov fcb6123d05 Use switch instead of series of comparisons
This is style correction, no functional changes.

Differential Revision: https://reviews.llvm.org/D65670

llvm-svn: 367759
2019-08-03 16:32:49 +00:00
Harlan Haskins 8d323d1506 [clang] Adopt new FileManager error-returning APIs
Update the callers of FileManager::getFile and FileManager::getDirectory to handle the new llvm::ErrorOr-returning methods.

Signed-off-by: Harlan Haskins <harlan@apple.com>
llvm-svn: 367616
2019-08-01 21:31:56 +00:00
Harlan Haskins 461f0722dd [clang] Adopt llvm::ErrorOr in FileManager methods
Previously, the FileManager would use NULL returns to signify whether a file existed, but that doesn’t cover permissions issues or anything else that might occur while trying to stat or read a file. Instead, convert getFile and getDirectory into returning llvm::ErrorOr

Signed-off-by: Harlan Haskins <harlan@apple.com>
llvm-svn: 367615
2019-08-01 21:31:49 +00:00
Serge Pavlov 3c26163d1a [Parser] Use special definition for pragma annotations
Previously pragma annotation tokens were described as any other
annotations in TokenKinds.def. This change introduces special macro
PRAGMA_ANNOTATION for the pragma descriptions. It allows implementing
checks that deal with pragma annotations only.

Differential Revision: https://reviews.llvm.org/D65405

llvm-svn: 367575
2019-08-01 15:15:10 +00:00
Sam Elliott f46d413fa0 [RISCV] Add FreeBSD targets
Reviewers: asb

Reviewed By: asb

Subscribers: simoncook, s.egerton, lenary, psnobl, benna, mhorne, emaste, kito-cheng, shiva0217, rogfer01, rkruppe, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57795

Patch by James Clarke (jrtc27)

llvm-svn: 367557
2019-08-01 13:14:30 +00:00
Momchil Velikov a36d31478c [AArch64] Add support for Transactional Memory Extension (TME)
Re-commit r366322 after some fixes

TME is a future architecture technology, documented in

  https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools
  https://developer.arm.com/docs/ddi0601/a

More about the future architectures:

  https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/new-technologies-for-the-arm-a-profile-architecture

This patch adds support for the TME instructions TSTART, TTEST, TCOMMIT, and
TCANCEL and the target feature/arch extension "tme".

It also implements TME builtin functions, defined in ACLE Q2 2019
(https://developer.arm.com/docs/101028/latest)

Differential Revision: https://reviews.llvm.org/D64416

Patch by Javed Absar and Momchil Velikov

llvm-svn: 367428
2019-07-31 12:52:17 +00:00
Sam Elliott 9e6b2e1605 [RISCV] Support 'f' Inline Assembly Constraint
Summary:
This adds the 'f' inline assembly constraint, as supported by GCC. An
'f'-constrained operand is passed in a floating point register. Exactly
which kind of floating-point register (32-bit or 64-bit) is decided
based on the operand type and the available standard extensions (-f and
-d, respectively).

This patch adds support in both the clang frontend, and LLVM itself.

Reviewers: asb, lewis-revill

Reviewed By: asb

Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65500

llvm-svn: 367403
2019-07-31 09:45:55 +00:00
Simon Cook 7deaeee753 [RISCV] Add support for floating point registers in inlineasm
This adds support for parsing/emitting in IR the floating-point RISC-V
registers in inline assembly clobber lists.

Differential Revision: https://reviews.llvm.org/D64737

llvm-svn: 367399
2019-07-31 09:12:00 +00:00
Rainer Orth b9f8ab2c7e [Driver] Define _FILE_OFFSET_BITS=64 on Solaris
make check-all currently fails on x86_64-pc-solaris2.11 when building with GCC 9:

  Undefined                       first referenced
   symbol                             in file
  _ZN11__sanitizer14internal_lseekEimi SANITIZER_TEST_OBJECTS.sanitizer_libc_test.cc.i386.o
  _ZN11__sanitizer23MapWritableFileToMemoryEPvmim SANITIZER_TEST_OBJECTS.sanitizer_libc_test.cc.i386.o
  ld: fatal: symbol referencing errors
  clang-9: error: linker command failed with exit code 1 (use -v to see invocation)
  make[3]: *** [projects/compiler-rt/lib/sanitizer_common/tests/CMakeFiles/TSanitizer-i386-Test.dir/build.make:92: projects/compiler-rt/lib/sanitizer_common/tests/Sanitizer-i386-Test] Error 1

While e.g. __sanitizer::internal_lseek is defined in sanitizer_solaris.cc, g++ 9
predefines _FILE_OFFSET_BITS=64 while clang++ currently does not.

This patch resolves this inconsistency by following the gcc lead, which allows
make check-all to finish successfully.

There's one caveat: gcc defines _LARGEFILE_SOURCE and _LARGEFILE64_SOURCE for C++ only, while clang has long been doing it for
all languages.  I'd like to keep it this way because those macros do is to make
declarations of fseek/ftello (_LARGEFILE_SOURCE) resp. the 64-bit versions
of largefile functions (*64 with _LARGEFILE64_SOURCE) visible additionally.
However, _FILE_OFFSET_BITS=64 changes all affected functions to be largefile-aware.
I'd like to restrict this to C++, just like gcc does.

To avoid a similar inconsistence with host compilers that don't predefine _FILE_OFFSET_BITS=64
(e.g. clang < 9, gcc < 9), this needs a compantion patch https://reviews.llvm.org/D64483.

Tested on x86_64-pc-solaris2.11.

Differential Revision: https://reviews.llvm.org/D64482

llvm-svn: 367305
2019-07-30 10:38:41 +00:00
Sander de Smalen 405c999d97 [AArch64] Disable __ARM_FEATURE_SVE without ACLE.
The Arm C Language Extensions for SVE document specifies that 
__ARM_FEATURE_SVE should be set when the compiler supports SVE and
implements all the extensions described in the document.

This is currently not yet the case, so the feature should be disabled
until the compiler can provide all the extensions as described.

Reviewers: c-rhodes, rengolin, rovka, ktkachov

Reviewed By: rengolin

Differential Revision: https://reviews.llvm.org/D65404

llvm-svn: 367301
2019-07-30 10:14:39 +00:00
Petr Hosek 92a2e1bbb9 Revert "[ARM] Set default alignment to 64bits"
This reverts commit r367119.

This broke several bots:

http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/26891/steps/ninja%20check%201/logs/FAIL%3A%20Clang%3A%3Aexception-alignment.cpp
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/245/consoleFull

llvm-svn: 367166
2019-07-27 01:59:23 +00:00
Simi Pallipurath 92363a3ada [ARM] Set default alignment to 64bits
The maximum alignment used by ARM arch
is 64bits, not 128.

This could cause overaligned memory
access for 128 bit neon vector that
have unpredictable behaviour.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=42668

Patch by: Diogo Sampaio(diogo.sampaio@arm.com)

Differential Revision: https://reviews.llvm.org/D65000

Change-Id: I5a62b766491f15dd51e4cfe6625929db897f67e3
llvm-svn: 367119
2019-07-26 15:05:19 +00:00
Erich Keane 393094859e Remove CallingConvMethodType
This seems to be an old vestage of a previous implementation of getting
the default calling convention, and everything is now using
CXXABI/ASTContext's getDefaultCallingConvention.  Remove it, since it
isn't doing anything.

llvm-svn: 367039
2019-07-25 17:14:45 +00:00
Sjoerd Meijer a19f5a76e6 Test commit. NFC.
Removed 2 trailing whitespaces in 2 files that used to be in different
repos to test my new github monorepo workflow.

llvm-svn: 366904
2019-07-24 13:30:36 +00:00
Sander de Smalen 2b290885d9 [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list
Adds the SVE vector and predicate registers to the list of known registers.

Patch by Kerry McLaughlin.

Reviewers: erichkeane, sdesmalen, rengolin

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D64739

llvm-svn: 366878
2019-07-24 08:42:34 +00:00
Rainer Orth 2da6eea07c [clang, test] Fix Clang :: Headers/max_align.c on 64-bit SPARC
Clang :: Headers/max_align.c currently FAILs on 64-bit SPARC:

  error: 'error' diagnostics seen but not expected: 
    File /vol/llvm/src/clang/dist/test/Headers/max_align.c Line 12: static_assert failed due to requirement '8 == _Alignof(max_align_t)' ""
  1 error generated.

This happens because SuitableAlign isn't defined for SPARCv9 unlike SPARCv8
(which uses the default of 64 bits).  gcc's sparc/sparc.h has

  #define BIGGEST_ALIGNMENT (TARGET_ARCH64 ? 128 : 64)

This patch sets SuitableAlign to match and updates the corresponding testcase.

Tested on sparcv9-sun-solaris2.11.

Differential Revision: https://reviews.llvm.org/D64487

llvm-svn: 366820
2019-07-23 16:24:00 +00:00
Sunil Srivastava f4038e75d2 Disallow most calling convention attributes on PS4
PS4 now only allows "cdecl", and its equivalent on PS4, "sysv_abi".

Differential Revision: https://reviews.llvm.org/D64780

llvm-svn: 366617
2019-07-19 21:38:34 +00:00
Alex Bradbury e078967adf [RISCV] Hard float ABI support
The RISC-V hard float calling convention requires the frontend to:

* Detect cases where, once "flattened", a struct can be passed using
int+fp or fp+fp registers under the hard float ABI and coerce to the
appropriate type(s)
* Track usage of GPRs and FPRs in order to gate the above, and to
determine when signext/zeroext attributes must be added to integer
scalars

This patch attempts to do this in compliance with the documented ABI,
and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as
author of that code I've tagged you as reviewer for initial feedback on
my usage.

Note that a previous version of the ABI indicated that when passing an
int+fp struct using a GPR+FPR, the int would need to be sign or
zero-extended appropriately. GCC never did this and the ABI was changed,
which makes life easier as ABIArgInfo::CoerceAndExpand can't currently
handle sign/zero-extension attributes.

Re-landed after backing out 366450 due to missed hunks.

Differential Revision: https://reviews.llvm.org/D60456

llvm-svn: 366480
2019-07-18 18:29:59 +00:00
Alex Bradbury 9b732fe99b Revert "[RISCV] Hard float ABI support" r366450
The commit was missing a few hunks. Will fix and recommit.

llvm-svn: 366454
2019-07-18 16:13:17 +00:00
Alex Bradbury fc3aa2ab48 [RISCV] Hard float ABI support
The RISC-V hard float calling convention requires the frontend to:

* Detect cases where, once "flattened", a struct can be passed using
int+fp or fp+fp registers under the hard float ABI and coerce to the
appropriate type(s) * Track usage of GPRs and FPRs in order to gate the
above, and to
determine when signext/zeroext attributes must be added to integer
scalars

This patch attempts to do this in compliance with the documented ABI,
and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as
author of that code I've tagged you as reviewer for initial feedback on
my usage.

Note that a previous version of the ABI indicated that when passing an
int+fp struct using a GPR+FPR, the int would need to be sign or
zero-extended appropriately. GCC never did this and the ABI was changed,
which makes life easier as ABIArgInfo::CoerceAndExpand can't currently
handle sign/zero-extension attributes.

Differential Revision: https://reviews.llvm.org/D60456

llvm-svn: 366450
2019-07-18 15:33:41 +00:00
Momchil Velikov 0e2b74a2b0 Revert [AArch64] Add support for Transactional Memory Extension (TME)
This reverts r366322 (git commit 4b8da3a503)

llvm-svn: 366355
2019-07-17 17:43:32 +00:00
Momchil Velikov 4b8da3a503 [AArch64] Add support for Transactional Memory Extension (TME)
TME is a future architecture technology, documented in

https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools
https://developer.arm.com/docs/ddi0601/a

More about the future architectures:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/new-technologies-for-the-arm-a-profile-architecture

This patch adds support for the TME instructions TSTART, TTEST, TCOMMIT, and
TCANCEL and the target feature/arch extension "tme".

It also implements TME builtin functions, defined in ACLE Q2 2019
(https://developer.arm.com/docs/101028/latest)

Patch by Javed Absar and Momchil Velikov

Differential Revision: https://reviews.llvm.org/D64416

llvm-svn: 366322
2019-07-17 13:23:27 +00:00
Momchil Velikov e14cfe2d2e [AArch64] Consistent types and naming for AArch64 target features (NFC)
Differential Revision: https://reviews.llvm.org/D64415

Committed as obvious.

llvm-svn: 366315
2019-07-17 11:24:37 +00:00