Commit Graph

4335 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes a040566fec Add more methods to gather target specific elf stuff
Support for .text relocations, implementing TargetELFWriter overloaded methods for x86/x86_64.
Use a map to track global values to their symbol table indexes
Code cleanup and small fixes

llvm-svn: 73894
2009-06-22 19:16:16 +00:00
Rafael Espindola 6ead59f8ed Fix PR4185.
Handle FpSET_ST0_80 being used when ST0 is still alive.

llvm-svn: 73850
2009-06-21 12:02:51 +00:00
Chris Lattner 7719d0184a simplify closing paren and (rip) printing.
llvm-svn: 73841
2009-06-21 02:22:53 +00:00
Chris Lattner a3da048c82 indentation fix
llvm-svn: 73840
2009-06-21 02:22:34 +00:00
Chris Lattner e80442452e remove #if 0 code
llvm-svn: 73837
2009-06-21 01:48:49 +00:00
Chris Lattner cfad3f3807 cosmetic changes.
llvm-svn: 73836
2009-06-21 01:27:55 +00:00
Chris Lattner 7d2b049404 change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.

llvm-svn: 73834
2009-06-20 20:38:48 +00:00
Chris Lattner 40f560d433 remove dead code, the main codepath never has to deal
with MBB's.

llvm-svn: 73830
2009-06-20 19:34:47 +00:00
Chris Lattner 9c2119616f eliminate the "call" operand modifier from the asm descriptions, modeling
it as a pcrel immediate instead.  This gets pc-rel weirdness out of the
main printoperand codepath.

llvm-svn: 73829
2009-06-20 19:34:09 +00:00
Chris Lattner b4b5c10477 fix edit-o
llvm-svn: 73824
2009-06-20 08:13:12 +00:00
Chris Lattner 9fc4db5615 some comments and cleanup
llvm-svn: 73818
2009-06-20 07:59:10 +00:00
Chris Lattner a0022a772b implement support for lowering subregs when preparing to print
LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.

Implement support for printing mbb labels as operands.

llvm-svn: 73817
2009-06-20 07:03:18 +00:00
Devang Patel 1b61c2a1ce Initialize MMI
llvm-svn: 73813
2009-06-20 01:00:07 +00:00
Chris Lattner 1f8d968687 hook up printMemReference.
llvm-svn: 73811
2009-06-20 00:50:32 +00:00
Chris Lattner 4682015e61 Start implementing translation of MachineInstr to MCInst. Next
step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.

llvm-svn: 73810
2009-06-20 00:49:26 +00:00
Chris Lattner 8d284c7683 stub out some hacky code for wiring up the new asmprinter interfaces
on X86.  Not useful yet.

llvm-svn: 73799
2009-06-19 23:59:57 +00:00
Devang Patel 88be5cf01f DwarfWriter is used to emit EH info also.
llvm-svn: 73792
2009-06-19 23:21:20 +00:00
Devang Patel 33f4eb462f Move up dwarf writer initialization in common AsmPrinter class.
llvm-svn: 73784
2009-06-19 21:54:26 +00:00
Eli Friedman 2fc939c809 Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to
handle with an SSE2 instruction.

llvm-svn: 73760
2009-06-19 07:00:55 +00:00
Eli Friedman 707cbc4126 Misc tweaks to Intel asm printing to make it more compatible with MASM.
Patch by Benedict Gaster.

llvm-svn: 73753
2009-06-19 04:48:38 +00:00
Chris Lattner a08186aabc add a file I missed, this goes with r73743
llvm-svn: 73744
2009-06-19 00:47:59 +00:00
Chris Lattner 3235c38dbb Add some scaffolding for a new experimental asmprinter
implementation.  The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst.  MCInst
and the new asmprinters will not depend on most of the 
llvm code generators.  This allows building diassemblers
that don't link in the whole llvm code generator.  This is
step #1 of many.

llvm-svn: 73743
2009-06-19 00:47:33 +00:00
Chris Lattner 8284b66264 merge the common darwin settings from the X86/PPC/ARM targets
into DarwinTargetAsmInfo.cpp.  The remaining differences should
be evaluated.  It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.

llvm-svn: 73742
2009-06-19 00:08:39 +00:00
Chris Lattner b84764516d move mangler quote handling from asm printers to TargetAsmInfo.
llvm-svn: 73738
2009-06-18 23:41:35 +00:00
Chris Lattner 4df8e5c800 minor cleanup
llvm-svn: 73737
2009-06-18 23:33:13 +00:00
Chris Lattner 09081b25a5 simplify macro debug info directive handling.
llvm-svn: 73736
2009-06-18 23:31:37 +00:00
Evan Cheng de9e36a74e On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body.
llvm-svn: 73720
2009-06-18 20:37:15 +00:00
Devang Patel 722848dc01 Do not use first actual instruction's location for prologue. The debug wants to skip prologue while setting a breakpoint for the function.
llvm-svn: 73592
2009-06-17 00:48:26 +00:00
Douglas Gregor 1b731d5dbe Introduce new headers whose inclusion forces linking and
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.

llvm-svn: 73543
2009-06-16 20:12:29 +00:00
Evan Cheng 0d9730f39f CALL64pcrel32 immediate field is 32-bit. Patch by Abhinav Duggal.
llvm-svn: 73536
2009-06-16 19:44:27 +00:00
Eli Friedman 48021d15d6 Misc accumulated tweaks to legalization logic for various targets.
llvm-svn: 73476
2009-06-16 06:40:59 +00:00
Chris Lattner 0101f45785 another xform that is target-independent (should be done in instcombine).
llvm-svn: 73472
2009-06-16 06:15:56 +00:00
Chris Lattner aba55a69b1 I think instcombine should unconditionally do this xform.
llvm-svn: 73471
2009-06-16 06:11:35 +00:00
Bill Wendling 92b17b550e There doesn't seem to be a reason to move the save FP stuff.
llvm-svn: 73468
2009-06-16 04:12:45 +00:00
Bill Wendling f6c6a7f1b7 The DWARF to compact encoding converter assumes that the DW_CFA_def_cfa_offset
comes after the DW_CFA_def_cfa_register, because the CFA is really ESP from the
start of the function and only gets an offset when the "subl $xxx,%esp"
instruction happens, not the other way around.

And reapply r72898:

The DWARF unwind info was incorrect. While compiling with
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.

llvm-svn: 73465
2009-06-16 04:06:15 +00:00
Bill Wendling 2dadb42dd0 The Ls and Qs were mixed up. Patch by Sean.
llvm-svn: 73417
2009-06-15 20:59:31 +00:00
Bill Wendling e790614fa5 "The Intel instruction tables should include the 64-bit and 32-bit instructions
that push immediate operands of 1, 2, and 4 bytes (extended to the native
register size in each case).  The assembly mnemonics are "pushl" and "pushq."
One such instruction appears at the beginning of the "start" function , so this
is essential for accurate disassembly when unwinding."

Patch by Sean Callanan!

llvm-svn: 73407
2009-06-15 19:39:04 +00:00
Chris Lattner 8565c4bed4 remove extraneous const qualifier
llvm-svn: 73373
2009-06-15 04:42:32 +00:00
Chris Lattner c68a564cdd I got J and K backward, many thanks to Eli for spotting this!
llvm-svn: 73372
2009-06-15 04:39:05 +00:00
Chris Lattner ea3621a6b1 implement support for the 'K' asm constraint, PR4347
llvm-svn: 73366
2009-06-15 04:01:39 +00:00
Arnold Schwaighofer e3a018d707 Fix Bug 4278: X86-64 with -tailcallopt calling convention
out of sync with regular cc.

The only difference between the tail call cc and the normal
cc was that one parameter register - R9 - was reserved for
calling functions through a function pointer. After time the
tail call cc has gotten out of sync with the regular cc. 

We can use R11 which is also caller saved but not used as
parameter register for potential function pointers and
remove the special tail call cc on x86-64.

llvm-svn: 73233
2009-06-12 16:26:57 +00:00
Eli Friedman 32ad5e9c08 Misc x86 README updates: remove a couple of already-fixed issues,
add a few suggestions from looking at some assembly code.

llvm-svn: 73210
2009-06-11 23:07:04 +00:00
Bruno Cardoso Lopes 66189503ef Use forward declarations and move TargetELFWriterInfo impl to a new file.
llvm-svn: 73209
2009-06-11 22:13:00 +00:00
Bruno Cardoso Lopes 1656366e4d Support for ELF Visibility
Emission for globals, using the correct data sections
Function alignment can be computed for each target using TargetELFWriterInfo
Some small fixes

llvm-svn: 73201
2009-06-11 19:16:03 +00:00
Anton Korobeynikov 06039d1190 Silence a warning
llvm-svn: 73152
2009-06-09 23:00:39 +00:00
Bill Wendling 0422f4ca0c Simplified logic of this if-then statement to reduce nesting. No functionality
change.

llvm-svn: 73143
2009-06-09 20:08:51 +00:00
Anton Korobeynikov 77d1943637 The attached patches implement most of the ARM AAPCS-VFP hard float
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

llvm-svn: 73095
2009-06-08 22:53:56 +00:00
Bill Wendling d9173b83db Revert r72898. It does not solve the problem I want it to solve.
llvm-svn: 73075
2009-06-08 18:18:28 +00:00
Eli Friedman 0d4234416f Get rid of some unnecessary code.
llvm-svn: 73017
2009-06-07 07:28:45 +00:00
Eli Friedman 3234587213 Slightly generalize the code that handles shuffles of consecutive loads
on x86 to handle more cases.  Fix a bug in said code that would cause it 
to read past the end of an object.  Rewrite the code in 
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. 
Remove PerformBuildVectorCombine, which is no longer necessary with 
these changes.  In addition to simplifying the code, with this change, 
we can now catch a few more cases of consecutive loads.

llvm-svn: 73012
2009-06-07 06:52:44 +00:00