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Author SHA1 Message Date
Vincent Lee adfbb5411b [lld-macho] Add warn flags to enable/disable warnings on -install_name 
ld64 doesn't warn on builds using `-install_name` if it's a bundle. But, the
current warning is nice to have because `install_name` only works with dylib.
To prevent an overflow of warnings in build logs and have parity with ld64,
create a `--warn-dylib-install-name` and `--warn-no-dylib-install-name` flag
that enables this LLD specific warning.

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D113534
 2021-11-17 16:18:14 -08:00
Daan De Meyer 5a6dac66db LiteralSupport: Don't assert() on invalid input 
When using clangd, it's possible to trigger assertions in
NumericLiteralParser and CharLiteralParser when switching git branches.
This commit removes the initial asserts on invalid input and replaces
those asserts with the error handling mechanism from those respective
classes instead. This allows clangd to gracefully recover without
crashing.

See https://github.com/clangd/clangd/issues/888 for more information
on the clangd crashes.
 2021-11-17 23:51:30 +00:00
Leonard Chan 1a84d1c81e [compiler-rt][asan] Re-add `self` 
We ran into errors where this wasn't defined in Fuchsia's asan implementation.
 2021-11-17 15:48:41 -08:00
Vitaly Buka 22e66a97cb Revert "[sanitizer] Add a few of type_traits tools" 
Does not work with GCC

This reverts commit a82ee2be9c.
 2021-11-17 15:46:16 -08:00
J. Ryan Stinnett 1f7827e6aa [MLIR][Docs] Fix link syntax in Rationale.md 2021-11-17 23:38:19 +00:00
Craig Topper d78fdf111d [LegalizeTypes] Further limit expansion of CTTZ during type promotion. 
Don't expand CTTZ if CTPOP or CTLZ is supported on the promoted type.
We have special handling for CTTZ expansion to use those ops with a
small conversion. The setup for that doesn't generate extra code or
large constants so we don't gain anything from expanding early and we
make CTTZ_ZERO_UNDEF codegen worse.

Follow up from post commit feedback on D112268. We don't seem to have
any in tree tests that care about this.
 2021-11-17 15:27:29 -08:00
Greg Clayton 951b107eed [NFC] Refactor symbol table parsing. 
Symbol table parsing has evolved over the years and many plug-ins contained duplicate code in the ObjectFile::GetSymtab() that used to be pure virtual. With this change, the "Symbtab *ObjectFile::GetSymtab()" is no longer virtual and will end up calling a new "void ObjectFile::ParseSymtab(Symtab &symtab)" pure virtual function to actually do the parsing. This helps centralize the code for parsing the symbol table and allows the ObjectFile base class to do all of the common work, like taking the necessary locks and creating the symbol table object itself. Plug-ins now just need to parse when they are asked to parse as the ParseSymtab function will only get called once.

Differential Revision: https://reviews.llvm.org/D113965
 2021-11-17 15:14:01 -08:00
Vitaly Buka a82ee2be9c [sanitizer] Add a few of type_traits tools 
For D114047
 2021-11-17 15:06:38 -08:00
Rob Suderman 044e7e013e [mlir][tosa] Fixed shape inference for tosa.transpose_conv2d 
Transpose conv2d shape inference was incorrect, tests did not properly validate
that the shape inference was executing. Corrected shape inference, and extended
tests to actually execute.

Reviewed By: NatashaKnk

Differential Revision: https://reviews.llvm.org/D114026
 2021-11-17 14:59:52 -08:00
James Farrell a340a491b2 Add Android test case for -Wpartial-availability. Also update Android availability tests to match on the whole string, so we can distinguish between "Android 16" and "Android 16.0.0" at the end of warning messages. 
Reviewed By: danalbert, srhines

Differential Revision: https://reviews.llvm.org/D114036
 2021-11-17 22:45:23 +00:00
Peyton, Jonathan L a733b18bdb [OpenMP][libomp] Enable HWLOC topology detection of multiple CPU kinds 
Teach the HWLOC topology method how to detect Atom and Core
types so hybrid CPUs are properly detected and represented when using
the HWLOC topology method.

Differential Revision: https://reviews.llvm.org/D112270
 2021-11-17 16:30:18 -06:00
River Riddle edc6c0ecb9 [mlir] Refactor AbstractOperation and OperationName 
The current implementation is quite clunky; OperationName stores either an Identifier
or an AbstractOperation that corresponds to an operation. This has several problems:

* OperationNames created before and after an operation are registered are different
* Accessing the identifier name/dialect/etc. from an OperationName are overly branchy
  - they need to dyn_cast a PointerUnion to check the state

This commit refactors this such that we create a single information struct for every
operation name, even operations that aren't registered yet. When an OperationName is
created for an unregistered operation, we only populate the name field. When the
operation is registered, we populate the remaining fields. With this we now have two
new classes: OperationName and RegisteredOperationName. These both point to the
same underlying operation information struct, but only RegisteredOperationName can
assume that the operation is actually registered. This leads to a much cleaner API, and
we can also move some AbstractOperation functionality directly to OperationName.

Differential Revision: https://reviews.llvm.org/D114049
 2021-11-17 22:29:57 +00:00
Peyton, Jonathan L 286094af9b [OpenMP][libomp] Improve Windows Processor Group handling within topology 
The current implementation of Windows Processor Groups has
a separate topology method to handle them. This patch deprecates
that specific method and uses the regular CPUID topology
method by default and inserts the Windows Processor Group objects
in the topology manually.

Notes:
* The preference for processor groups is lowered to a value less than
  socket so that the user will see sockets in the KMP_AFFINITY=verbose
  output instead of processor groups when sockets=processor groups.
* The topology's capacity is modified to handle additional topology layers
  without the need for reallocation.
* If a user asks for a granularity setting that is "above" the processor
  group layer, then the granularity is adjusted "down" to the processor
  group since this is the coarsest layer available for threads.

Differential Revision: https://reviews.llvm.org/D112273
 2021-11-17 16:29:01 -06:00
Peyton, Jonathan L 1dd797168e [OpenMP][libomp] Add support for offline CPUs in Linux 
If some CPUs are offline, then make sure they are not included in the
fullMask even if norespect is given to KMP_AFFINITY.

Differential Revision: https://reviews.llvm.org/D112274
 2021-11-17 16:28:01 -06:00
Greg McGary 9cc489a4b2 [lld-macho][nfc] Factor-out NFC changes from main __eh_frame diff 
In order to keep signal:noise high for the `__eh_frame` diff, I have teased-out the NFC changes and put them here.

Differential Revision: https://reviews.llvm.org/D114017
 2021-11-17 15:16:44 -07:00
Jacques Pienaar 0d0c46a35b [mlir] Improve documentation of shape dialect 
Add small example of usage (brief which will be further refined).
 2021-11-17 14:07:06 -08:00
Nathan Ridge 7a8c7946fc [clang] Allocate 2 bits to store the constexpr specifier kind when serializing 
Now that consteval and constinit are possible values, 1 bit
is no longer enough.

Fixes https://github.com/clangd/clangd/issues/887

Differential Revision: https://reviews.llvm.org/D111971
 2021-11-17 16:56:46 -05:00
Alex Zinenko bca003dea8 [mlir] Fix wrong variable name in Linalg OpDSL 
The name seems to have been left over from a renaming effort on an unexercised
codepaths that are difficult to catch in Python. Fix it and add a test that
exercises the codepath.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D114004
 2021-11-17 22:55:35 +01:00
owenca e852cc0d5a [clang-format][NFC] Add a default value to parseBlock() 
Differential Revision: https://reviews.llvm.org/D114073
 2021-11-17 13:48:53 -08:00
Louis Dionne eb8650a757 [runtimes][NFC] Remove filenames at the top of the license notice 
We've stopped doing it in libc++ for a while now because these names
would end up rotting as we move things around and copy/paste stuff.
This cleans up all the existing files so as to stop the spreading
as people copy-paste headers around.
 2021-11-17 16:30:52 -05:00
Peyton, Jonathan L a0afb9d0fc [OpenMP][libomp] Allow users to specify KMP_HW_SUBSET in any order 
Remove restriction forcing users to specify the KMP_HW_SUBSET value in
topology order. This patch sorts the user KMP_HW_SUBSET value before
trying to apply it. For example: 1s,4c,2t is equivalent to 2t,1s,4c

Differential Revision: https://reviews.llvm.org/D112027
 2021-11-17 15:27:37 -06:00
Lawrence D'Anna 63270710f1 [lldb] remove usage of distutils, fix python path on debian/ubuntu 
distutils is deprecated and will be removed, so we shouldn't be
using it.

We were using it to compute LLDB_PYTHON_RELATIVE_PATH.

Discussing a similar issue
[at python.org](https://bugs.python.org/issue41282), Filipe Laíns said:

    If you are relying on the value of distutils.sysconfig.get_python_lib()
    as you shown in your system, you probably don't want to. That
    directory (dist-packages) should be for Debian provided packages
    only, so moving to sysconfig.get_path() would be a good thing,
    as it has the correct value for user installed packages on your
    system.

So I propose using a relative path from `sys.prefix` to
`sysconfig.get_path("platlib")` instead.

On Mac and windows, this results in the same paths as we had before,
which are `lib/python3.9/site-packages` and `Lib\site-packages`,
respectively.

On ubuntu however, this will change the path from
`lib/python3/dist-packages` to `lib/python3.9/site-packages`.

This change seems to be correct, as Filipe said above, `dist-packages`
belongs to the distribution, not us.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D114106
 2021-11-17 13:14:30 -08:00
Louis Dionne 95741660b4 [libc++][NFC] Re-indent and re-order includes in uses_alloc_types.h 2021-11-17 16:13:58 -05:00
Yitzhak Mandelbaum ccd729faa5 [NFC] Update comments to refer to unique_ptr instead of raw pointers. 2021-11-17 21:08:09 +00:00
Nico Weber 3623163ae8 [clang] Fix typo in 36873fb768 2021-11-17 16:06:27 -05:00
Nico Weber 36873fb768 [clang] Try to fix test more after ae98182cf7 
We need to use the td-based marshalling instead of doing this manually,
else the setting gets lost on the way to codegen in most build configs.
 2021-11-17 15:59:23 -05:00
Jonathan Peyton c46becf500 [OpenMP][libomp][NFC] Remove non-ASCII apostrophe in comment 2021-11-17 14:46:40 -06:00
Philip Reames ad69402f3e [SCEVAA] Avoid forming malformed pointer diff expressions 
This solves the same crash as in D104503, but with a different approach.

The test case test_non_dom demonstrates a case where scev-aa crashes today. (If exercised either by -eval-aa or -licm.) The basic problem is that SCEV-AA expects to be able to compute a pointer difference between two SCEVs for any two pair of pointers we do an alias query on. For (valid, but out of scope) reasons, we can end up asking whether expressions in different sub-loops can alias each other. This results in a subtraction expression being formed where neither operand dominates the other.

The approach this patch takes is to leverage the "defining scope" notion we introduced for flag semantics to detect and disallow the formation of the problematic SCEV. This ends up being relatively straight forward on that new infrastructure. This change does hint that we should probably be verifying a similar property for all SCEVs somewhere, but I'll leave that to a follow on change.

Differential Revision: D114112
 2021-11-17 12:38:04 -08:00
Michael Liao b861c3600c Fix -Wparentheses warnings. NFC. 2021-11-17 15:30:38 -05:00
Jonas Paulsson 4c32e3d967 [SystemZ] [Sanitizer] Bugfixes in internal_clone(). 
The __flags variable needs to be of type 'long' in order to get sign extended
properly.

internal_clone() uses an svc (Supervisor Call) directly (as opposed to
internal_syscall), and therefore needs to take care to set errno and return
-1 as needed.

Review: Ulrich Weigand
 2021-11-17 14:42:08 -05:00
Simon Pilgrim 5f99f771ec [X86] splitVector - only extract lower half subvector from splats 
If we're splitting a source vector that is a splat (with no undefs), just extract (for free) the lower half subvector and use it for both halfs.
 2021-11-17 19:38:43 +00:00
Nico Weber a11d27f4ff [clang] Try to fix test after ae98182cf7 
The test assumes an integrated assembler, so use a triple where
that's the default.
 2021-11-17 14:30:08 -05:00
Pavel Labath 1b468f1c1b [lldb] Port PlatformWindows, PlatformOpenBSD and PlatformRemoteGDBServer to GetSupportedArchitectures 2021-11-17 20:09:31 +01:00
Nico Weber b1ad813b47 [clang] Address review comments on https://reviews.llvm.org/D113707 
- Drop a needless `l` size suffix on a mov instruction in AT&T mode
- Move varying bits of test flags to front
- Add a comment about MS mode test
 2021-11-17 14:04:16 -05:00
Michael Jones 47d0c83e1f [libc] fix strtof/d/ld NaN parsing 
Fix the fact that previously strtof/d/ld would only accept a NaN as
having parentheses if the thing in the parentheses was a valid number,
now it will accept any combination of letters and numbers, but will only
put valid numbers in the mantissa.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D113790
 2021-11-17 11:00:54 -08:00
Simon Pilgrim 3020608b61 Fix MSVC signed/unsigned mismatch warning. NFC. 2021-11-17 18:59:23 +00:00
Simon Pilgrim e76032c173 [X86] LowerRotate - improve vXi8 rotate-by-scalar lowering with direct use of (extended) shift-by-scalar helpers. 
If we're rotating vXi8 by a splatted amount, then unpack to vXi16, perform a SHL by the (extended) scalar, and then pack the results.

This is a vector equivalent to the "rotl(x,y) -> (((aext(x) << bw) | zext(x)) << (y & (bw-1))) >> bw" style expansion we do for scalars in LowerFunnelShift.

I think we can usefully use this for other vector types and vector funnel-shifts in the future, depending how we expand beyond D113192 for matching rotations/funnel-shifts for more type/ops.
 2021-11-17 18:59:23 +00:00
Mike Rice 69f35f8969 [OpenMP] Add version macro support for 5.1 and 5.2 
Differential Revision: https://reviews.llvm.org/D114102
 2021-11-17 10:51:08 -08:00
Stanislav Mekhanoshin 6d3db28088 [InstCombine] Generalize complex OR patterns to AND 
For every pattern with only NOT, OR, and AND operations there is
always a symmetrical attern with AND and OR swapped.

This adds 2 transformations: https://reviews.llvm.org/D113526

```
(~(a & b) | c) & (~(a & c) | b) --> ~((b ^ c) & a)
(~(a & b) | c) & ~(a & c) --> ~((b | c) & a)
```

```
----------------------------------------
define i4 @src(i4 %a, i4 %b, i4 %c) {
%0:
  %and1 = and i4 %b, %a
  %not1 = xor i4 %and1, 15
  %and2 = and i4 %a, %c
  %not2 = xor i4 %and2, 15
  %or = or i4 %not2, %b
  %r = and i4 %or, %not1
  ret i4 %r
}
=>
define i4 @tgt(i4 %a, i4 %b, i4 %c) {
%0:
  %or = or i4 %b, %c
  %and = and i4 %or, %a
  %r = xor i4 %and, 15
  ret i4 %r
}
Transformation seems to be correct!

----------------------------------------
define i4 @src(i4 %a, i4 %b, i4 %c) {
%0:
  %and1 = and i4 %a, %b
  %not1 = xor i4 %and1, 15
  %or1 = or i4 %not1, %c
  %and2 = and i4 %a, %c
  %not2 = xor i4 %and2, 15
  %or2 = or i4 %not2, %b
  %and3 = and i4 %or1, %or2
  ret i4 %and3
}
=>
define i4 @tgt(i4 %a, i4 %b, i4 %c) {
%0:
  %xor = xor i4 %b, %c
  %and = and i4 %xor, %a
  %not = xor i4 %and, 15
  ret i4 %not
}
Transformation seems to be correct!
```

Differential Revision: https://reviews.llvm.org/D113526
 2021-11-17 10:47:36 -08:00
Nico Weber 1718fe4643 [llvm-objcopy] Fix some comment typos 2021-11-17 13:43:30 -05:00
Nico Weber ae98182cf7 [clang] Make -masm=intel affect inline asm style 
With this,

  void f() {  __asm__("mov eax, ebx"); }

now compiles with clang with -masm=intel.

This matches gcc.

The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.

One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):

  __asm__("mov eax, ebx");
  __asm__(".att_syntax\nmovl %ebx, %eax");
  __asm__("mov eax, ebx");

This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:

    bt{l %[Offset],%[Base] | %[Base],%[Offset]}

This works in LLVM after D113932 and D113894, so use that.

(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)

It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.

Fixes PR21401 and PR20241.

Differential Revision: https://reviews.llvm.org/D113707
 2021-11-17 13:41:59 -05:00
Keith Smiley 68311f21eb [llvm-objcopy][MachO] Add llvm-strip support for newer load commands 
Previously llvm-strip would fail because of unknown commands.

Fixes https://bugs.llvm.org/show_bug.cgi?id=50044

Differential Revision: https://reviews.llvm.org/D113734
 2021-11-17 10:36:35 -08:00
Louis Dionne 3e957e5d66 [libc++] Refactor tests for trivially copyable atomics 
- Replace irrelevant synopsis by a comment
- Use a .verify.cpp test instead of .compile.fail.cpp
- Remove unnecessary includes in one of the tests (was a copy-paste error)

Differential Revision: https://reviews.llvm.org/D114094
 2021-11-17 13:32:12 -05:00
Nico Weber bf834b2629 [x86/asm] Let EmitMSInlineAsmStr() handle variants too 
This is preparation for D113707, where I want to make `-masm=intel`
emit `asm inteldialect` instructions.

`{movq %rbx, %rax|mov rax, rbx}` is supposed to evaluate to the bit
between { and | for att and to the bit between | and } for intel.
Since intel will become `asm inteldialect`, which alls EmitMSInlineAsmStr(),
EmitMSInlineAsmStr() has to support variants as well.

(clang translates `{...|...}` to `$(...$|...$)`. I'm not sure why
it doesn't just send along only the first `...` or the second `...`
to LLVM, but given the notes in PR23933 let's not do a big
reorganization in this codepath.)

Differential Revision: https://reviews.llvm.org/D113932
 2021-11-17 13:31:59 -05:00
Craig Topper 0274be28d7 [RISCV] Lower vector CTLZ_ZERO_UNDEF/CTTZ_ZERO_UNDEF by converting to FP and extracting the exponent. 
If we have a large enough floating point type that can exactly
represent the integer value, we can convert the value to FP and
use the exponent to calculate the leading/trailing zeros.

The exponent will contain log2 of the value plus the exponent bias.
We can then remove the bias and convert from log2 to leading/trailing
zeros.

This doesn't work for zero since the exponent of zero is zero so we
can only do this for CTLZ_ZERO_UNDEF/CTTZ_ZERO_UNDEF. If we need
a value for zero we can use a vmseq and a vmerge to handle it.

We need to be careful to make sure the floating point type is legal.
If it isn't we'll continue using the integer expansion. We could split the vector
and concatenate the results but that needs some additional work and evaluation.

Differential Revision: https://reviews.llvm.org/D111904
 2021-11-17 10:29:41 -08:00
Nico Weber 103cc914d6 [x86/asm] Make variants work when converting at&t inline asm input to intel asm output 
`asm` always has AT&T-style input (`asm inteldialect` has Intel-style asm
input), so EmitGCCInlineAsmStr() always has to pick the same variant since it
cares about the input asm string, not the output asm string.

For PowerPC, that default variant is 1. For other targets, it's 0.

Without this, the included test case errors out with

    error: unknown use of instruction mnemonic without a size suffix
             mov rax, rbx

since it picks the intel branch and then tries to interpret it as AT&T
when selecting intel-style output with `-x86-asm-syntax=intel`.

Differential Revision: https://reviews.llvm.org/D113894
 2021-11-17 13:23:18 -05:00
Kadir Cetinkaya e76e572989
[clangd] Dont include file version in task name 
This will drop file version information from span names, reducing
overall cardinality and also effect logging when skipping actions in scheduler.

Differential Revision: https://reviews.llvm.org/D113390
 2021-11-17 19:10:09 +01:00
Keith Smiley 693b02023e [llvm-objdump/mac] Add support for new load commands 
Differential Revision: https://reviews.llvm.org/D113733
 2021-11-17 09:53:25 -08:00
Peter Klausler 78d60094c7 [flang] Deal with negative character lengths in semantics 
Fortran defines LEN(X) = 0 after CHARACTER(LEN=-1)::X so
apply MAX(0, ...) to character length expressions.

Differential Revision: https://reviews.llvm.org/D114030
 2021-11-17 09:49:15 -08:00
DianQK 1e9fa0b12a Fix the side effect of outlined function when the register is implicit use and implicit-def in the same instruction. 
This is the diff associated with {D95267}, and we need to mark $x0 as live whether or not $x0 is dead.

The compiler also needs to mark register $x0 as live in for the following case.

```
$x1 = ADDXri $sp, 16, 0
BL @spam, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $x1, implicit-def $sp, implicit-def $x0
```

This change fixes an issue where the wrong registers were used when -machine-outliner-reruns>0.
As an example:

```
lang=c
typedef struct {
    double v1;
    double v2;
} D16;

typedef struct {
    D16 v1;
    D16 v2;
} D32;

typedef long long LL8;
typedef struct {
    long long v1;
    long long v2;
} LL16;
typedef struct {
    LL16 v1;
    LL16 v2;
} LL32;

typedef struct {
    LL32 v1;
    LL32 v2;
} LL64;

LL8 needx0(LL8 v0, LL8 v1);

void bar(LL64 v1, LL32 v2, LL16 v3, LL32 v4, LL8 v5, D16 v6, D16 v7, D16 v8);

LL8 foo(LL8 v0, LL64 v1, LL32 v2, LL16 v3, LL32 v4, LL8 v5, D16 v6, D16 v7, D16 v8)
{
  LL8 result = needx0(v0, 0);
  bar(v1, v2, v3, v4, v5, v6, v7, v8);
  return result + 1;
}
```

As you can see from the `foo` function, we should not modify the value of `x0` until we call `needx0`.
This code is compiled to give the following instruction MIR code.

```
$sp = frame-setup SUBXri $sp, 256, 0
frame-setup STPDi killed $d13, killed $d12, $sp, 16
frame-setup STPDi killed $d11, killed $d10, $sp, 18
frame-setup STPDi killed $d9, killed $d8, $sp, 20

frame-setup STPXi killed $x26, killed $x25, $sp, 22
frame-setup STPXi killed $x24, killed $x23, $sp, 24
frame-setup STPXi killed $x22, killed $x21, $sp, 26
frame-setup STPXi killed $x20, killed $x19, $sp, 28
...
$x1 = MOVZXi 0, 0
BL @needx0, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit $x1, implicit-def $sp, implicit-def $x0
...
```

Since there are some other instruction sequences that duplicate `foo`, after the first execution of Machine Outliner you will get:
```
$sp = frame-setup SUBXri $sp, 256, 0
frame-setup STPDi killed $d13, killed $d12, $sp, 16
frame-setup STPDi killed $d11, killed $d10, $sp, 18
frame-setup STPDi killed $d9, killed $d8, $sp, 20

$x7 = ORRXrs $xzr, $lr, 0
BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $lr, implicit $sp, implicit $xzr, implicit $x7, implicit $x19, implicit $x20, implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26
$lr = ORRXrs $xzr, $x7, 0
...
BL @OUTLINED_FUNCTION_1, implicit-def $lr, implicit $sp, implicit-def $lr, implicit-def $sp, implicit-def $x0, implicit-def $x1, implicit $sp
...
```

For the first time we outlined the following sequence:
```
frame-setup STPXi killed $x26, killed $x25, $sp, 22
frame-setup STPXi killed $x24, killed $x23, $sp, 24
frame-setup STPXi killed $x22, killed $x21, $sp, 26
frame-setup STPXi killed $x20, killed $x19, $sp, 28
```
and
```
$x1 = MOVZXi 0, 0
BL @needx0, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit $x1, implicit-def $sp, implicit-def $x0
```

When we execute the outline again, we will get:
```
$x0 = ORRXrs $xzr, $lr, 0 <---- here
BL @OUTLINED_FUNCTION_2_0, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $lr, implicit $sp, implicit $xzr, implicit $d8, implicit $d9, implicit $d10, implicit $d11, implicit $d12, implicit $d13, implicit $x0
$lr = ORRXrs $xzr, $x0, 0

$x7 = ORRXrs $xzr, $lr, 0
BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $lr, implicit $sp, implicit $xzr, implicit $x7, implicit $x19, implicit $x20, implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26
$lr = ORRXrs $xzr, $x7, 0
...
BL @OUTLINED_FUNCTION_1, implicit-def $lr, implicit $sp, implicit-def $lr, implicit-def $sp, implicit-def $x0, implicit-def $x1, implicit $sp
```

When calling `OUTLINED_FUNCTION_2_0`, we used `x0` to save the `lr` register.
The reason for the above error appears to be that:
```
BL @OUTLINED_FUNCTION_1, implicit-def $lr, implicit $sp, implicit-def $lr, implicit-def $sp, implicit-def $x0, implicit-def $x1, implicit $sp
```
should be:
```
BL @OUTLINED_FUNCTION_1, implicit-def $lr, implicit $sp, implicit-def $lr, implicit-def $sp, implicit-def $x0, implicit-def $x1, implicit $sp, implicit $x0
```

When processing the same instruction with both `implicit-def $x0` and `implicit $x0` we should keep `implicit $x0`.
A reproducible demo is available at: [https://github.com/DianQK/reproduce_outlined_function_use_live_x0](https://github.com/DianQK/reproduce_outlined_function_use_live_x0).

Reviewed By: jinlin

Differential Revision: https://reviews.llvm.org/D112911
 2021-11-17 09:44:10 -08:00