Commit Graph

5086 Commits

Author SHA1 Message Date
Simon Moll 6dd0bfad0d [Clang][VE] Fix toolchain test when -DCLANG_DEFAULT_LINKER=lld in use
The CLANG_DEFAULT_LINKER flag overrides the default toolchain linker.
VE strictly requires 'nld' to be the default linker.  This causes a test
failure in test/Driver/ve-toolchain.cpp when configured with
CLANG_DEFAULT_LINKER!=ld

  Failure in clang-ppc64le-rhel
  (https://lab.llvm.org/buildbot/#/builders/57/builds/12628)

Until default linker selection with CLANG_DEFAULT_LINKER!=ld is fixed
proper, we manually specify '-fuse-ld=ld' (ie the toolchain default
linker) in the ve-toolchain tests.
2021-12-01 18:26:23 +01:00
Ties Stuij e3b2f0226b [clang][ARM] PACBTI-M frontend support
Handle branch protection option on the commandline as well as a function
attribute. One patch for both mechanisms, as they use the same underlying
parsing mechanism.

These are recorded in a set of LLVM IR module-level attributes like we do for
AArch64 PAC/BTI (see https://reviews.llvm.org/D85649):

- command-line options are "translated" to module-level LLVM IR
  attributes (metadata).

- functions have PAC/BTI specific attributes iff the
  __attribute__((target("branch-protection=...))) was used in the function
  declaration.

- command-line option -mbranch-protection to armclang targeting Arm,
following this grammar:

branch-protection ::= "-mbranch-protection=" <protection>
protection ::=  "none" | "standard" | "bti" [ "+" <pac-ret-clause> ]
                | <pac-ret-clause> [ "+" "bti"]
pac-ret-clause ::= "pac-ret" [ "+" <pac-ret-option> ]
pac-ret-option ::= "leaf" ["+" "b-key"] | "b-key" ["+" "leaf"]

b-key is simply a placeholder to make it consistent with AArch64's
version. In Arm, however, it triggers a warning informing that b-key is
unsupported and a-key will be selected instead.

- Handle _attribute_((target(("branch-protection=..."))) for AArch32 with the
same grammer as the commandline options.

This patch is part of a series that adds support for the PACBTI-M extension of
the Armv8.1-M architecture, as detailed here:

https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension

The PACBTI-M specification can be found in the Armv8-M Architecture Reference
Manual:

https://developer.arm.com/documentation/ddi0553/latest

The following people contributed to this patch:

- Momchil Velikov
- Victor Campos
- Ties Stuij

Reviewed By: vhscampos

Differential Revision: https://reviews.llvm.org/D112421
2021-12-01 10:37:16 +00:00
Sergey Dmitriev 4b553297ef [clang-offload-bundler] Reuse original file extension for device archive member
This patch changes clang-offload-bundler to use the original file extension for
the device archive member when unbundling archives instead of printing a warning
and defaulting to ".o".

Differential Revision: https://reviews.llvm.org/D114776
2021-11-30 20:38:59 -08:00
modimo 47f230ba2c Add toggling for -fnew-infallible/-fno-new-infallible
Allow toggling of -fnew-infallible so last instance takes precedence

Testing:
ninja check-all

Reviewed By: bruno

Differential Revision: https://reviews.llvm.org/D113523
2021-11-30 17:19:53 -08:00
Jeremy Morse 651122fc4a [DebugInfo][InstrRef] Pre-land on-by-default-for-x86 changes
Over in D114631 and [0] there's a plan for turning instruction referencing
on by default for x86. This patch adds / removes all the relevant bits of
code, with the aim that the final patch is extremely small, for an easy
revert. It should just be a condition in CommandFlags.cpp and removing the
XFail on instr-ref-flag.ll.

[0] https://lists.llvm.org/pipermail/llvm-dev/2021-November/153653.html
2021-11-30 12:40:59 +00:00
Ties Stuij 5cff77c23f [clang][ARM] PACBTI-M assembly support
Introduce assembly support for Armv8.1-M PACBTI extension. This is an optional
extension in v8.1-M.

There are 10 new system registers and 5 new instructions, all predicated on the
feature.

The attribute for llvm-mc is called "pacbti". For armclang, an architecture
extension also called "pacbti" was created.

This patch is part of a series that adds support for the PACBTI-M extension of
the Armv8.1-M architecture, as detailed here:

https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension

The PACBTI-M specification can be found in the Armv8-M Architecture Reference
Manual:

https://developer.arm.com/documentation/ddi0553/latest

The following people contributed to this patch:

- Victor Campos
- Ties Stuij

Reviewed By: labrinea

Differential Revision: https://reviews.llvm.org/D112420
2021-11-30 09:28:18 +00:00
Steven Wan 23dc886226 [NFC][AIX]Disable unsupported hip test on AIX
AIX doesn't support GPU. There is no point testing HIP on it.

Reviewed By: Jake-Egan

Differential Revision: https://reviews.llvm.org/D114484
2021-11-29 13:26:26 -05:00
Patrick Oppenlander b3163c1cdd [Driver] Support PowerPC SPE musl dynamic linker name ld-musl-powerpc-sf.so.1
Musl treats PowerPC SPE as a soft-float target (as the PowerPC SPE ABI
is soft-float compatible).

Reviewed By: jhibbits, MaskRay

Differential Revision: https://reviews.llvm.org/D105869
2021-11-28 15:39:55 -08:00
Dimitry Andric df08b2fe8b [AArch64] Avoid crashing on invalid -Wa,-march= values
As reported in https://bugs.freebsd.org/260078, the gnutls Makefiles
pass -Wa,-march=all to compile a number of assembly files. Clang does
not support this -march value, but because of a mistake in handling
the arguments, an unitialized Arg pointer is dereferenced, which can
cause a segfault.

Work around this by adding a check if the local WaMArch variable is
initialized, and if so, using its value in the diagnostic message.

Reviewed By: tschuett

Differential Revision: https://reviews.llvm.org/D114677
2021-11-28 22:23:42 +01:00
Jake Egan 0796869e4e [AIX] Disable unsupported offloading gpu tests
GPUs are not supported on AIX, so this patch sets these tests as unsupported.

Reviewed By: stevewan

Differential Revision: https://reviews.llvm.org/D114381
2021-11-25 15:10:51 -05:00
Timm Bäder 3e67cf21a1 [clang][driver] Add -fplugin-arg- to pass arguments to plugins
From GCC's manpage:
-fplugin-arg-name-key=value
   Define an argument called key with a value of value for the
   plugin called name.

Since we don't have a key-value pair similar to gcc's plugin_argument
struct, simply accept key=value here anyway and pass it along as-is to
plugins.

This translates to the already existing '-plugin-arg-pluginname arg'
that clang cc1 accepts.

There is an ambiguity here because in clang, both the plugin name
as well as the option name can contain dashes, so when e.g. passing

 -fplugin-arg-foo-bar-foo

it is not clear whether the plugin is foo-bar and the option is foo,
or the plugin is foo and the option is bar-foo. GCC solves this by
interpreting all dashes as part of the option name. So dashes can't be
part of the plugin name in this case.

Differential Revision: https://reviews.llvm.org/D113250
2021-11-25 10:47:55 +01:00
Zarko Todorovski c79345fb7b [NFC][Clang][test] Inclusive language: Remove and rephrase uses of sanity test/check in clang/test
Part of work to use more inclusive terms in clang/llvm.
2021-11-24 14:03:49 -05:00
Jan Beich 2dec2aa3ad [Driver] Default to libc++ on FreeBSD
All supported FreeBSD releases use libc++, so default to it if the
target's major version is not specified.

Reviewed by:	dim, emaste
Differential Revision:	https://reviews.llvm.org/D77776
2021-11-22 16:47:03 -05:00
Ed Maste a40dcd060e [Driver] correct typo in FreeBSD 14 test
The test specified amd64-unknown-freebsd40.0 rather than 14.0.  Since
40 is greater than 14 the test (for behaviour new in FreeBSD 14) worked
despite the typo.

Fixes:		699d47472c
Reviewed by:	dim (in D77776)
2021-11-22 14:37:27 -05:00
Bradley Smith 45e102a173 [Clang][SVE] Fix windows test breakage in 26f56438e3 2021-11-18 16:52:32 +00:00
Bradley Smith 26f56438e3 [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options
Co-authored-by: Graham Hunter <graham.hunter@arm.com>

Differential Revision: https://reviews.llvm.org/D113776
2021-11-18 15:52:28 +00:00
Mubashar Ahmad 8e47b83ec9 [AArch64][ARM] Enablement of Cortex-A710 Support
Phabricator review: https://reviews.llvm.org/D113256
2021-11-18 10:58:05 +00:00
Phoebe Wang 6113ea8124 [X86][Driver] Add X86 target option to avoid fail to other targets. NFC 2021-11-18 12:37:36 +08:00
Phoebe Wang a9fba2be35 [X86][ABI] Do not return float/double from x87 registers when x87 is disabled
This is aligned with GCC's behavior.
Also, alias `-mno-fp-ret-in-387` to `-mno-x87`, by which we can fix pr51498.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D112143
2021-11-18 12:31:08 +08:00
Phoebe Wang de34a940ae [X86] Add -mskip-rax-setup support to align with GCC
AMD64 ABI mandates caller to specify the number of used SSE registers
when passing variable arguments.
GCC also provides option -mskip-rax-setup to skip the setup of rax when
SSE is disabled. This helps to reduce the code size, see pr23258.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D112413
2021-11-18 11:20:32 +08:00
Fangrui Song 062ef8f6b4 [Driver][Android] Remove unneeded isNoExecStackDefault
ld.lld used by Android ignores .note.GNU-stack and defaults to noexecstack,
so the `-z noexecstack` linker option is unneeded.

The `--noexecstack` assembler option is unneeded because AsmPrinter.cpp
prints `.section .note.GNU-stack,"",@progbits` (when `llvm.init.trampoline` is unused),
so the assembler won't synthesize an executable .note.GNU-stack.

Reviewed By: danalbert

Differential Revision: https://reviews.llvm.org/D113840
2021-11-17 18:15:24 -08:00
Nico Weber ae98182cf7 [clang] Make -masm=intel affect inline asm style
With this,

  void f() {  __asm__("mov eax, ebx"); }

now compiles with clang with -masm=intel.

This matches gcc.

The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.

One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):

  __asm__("mov eax, ebx");
  __asm__(".att_syntax\nmovl %ebx, %eax");
  __asm__("mov eax, ebx");

This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:

    bt{l %[Offset],%[Base] | %[Base],%[Offset]}

This works in LLVM after D113932 and D113894, so use that.

(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)

It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.

Fixes PR21401 and PR20241.

Differential Revision: https://reviews.llvm.org/D113707
2021-11-17 13:41:59 -05:00
David Green d96161a179 [ARM/AArch64] Move REQUIRES after update_cc_test_checks line. NFC
c17d9b4b12 added REQUIRES lines to a lot of Arm and AArch64
test, but added them to the very beginning, before the existing
update_cc_test_checks lines. This just moves them later so as to not
mess up the existing ordering when the checks are regenerated.
2021-11-13 19:09:01 +00:00
Yaxun (Sam) Liu 0309e50f33 [Driver] Fix ToolChain::getSanitizerArgs
The driver uses class SanitizerArgs to store parsed sanitizer arguments. It keeps a cached
SanitizerArgs object in ToolChain and uses it for different jobs. This does not work if
the sanitizer options are different for different jobs, which could happen when an
offloading toolchain translates the options for different jobs.

To fix this, SanitizerArgs should be created by using the actual arguments passed
to jobs instead of the original arguments passed to the driver, since the toolchain
may change the original arguments. And the sanitizer arguments should be diagnose
once.

This patch also fixes HIP toolchain for handling -fgpu-sanitize: a warning is emitted
for GPU's not supporting sanitizer and skipped. This is for backward compatibility
with existing -fsanitize options. -fgpu-sanitize is also turned on by default.

Reviewed by: Artem Belevich, Evgenii Stepanov

Differential Revision: https://reviews.llvm.org/D111443
2021-11-11 17:17:08 -05:00
Zahira Ammarguellat f04e387055 Making the code compliant to the documentation about Floating Point
support default values for C/C++. FPP-MODEL=PRECISE enables
FFP-CONTRACT(FMA is enabled).

Fix for https://bugs.llvm.org/show_bug.cgi?id=50222
2021-11-11 07:40:35 -05:00
Fangrui Song a77d1f68a0 [Driver] Change Linux::isPIEDefault to true for all Android versions
Currently any API level>=16 uses default PIE.
If API level<16 is too old to be supported, we can clean up some code.

Reviewed By: danalbert

Differential Revision: https://reviews.llvm.org/D113370
2021-11-11 00:12:07 -08:00
Roland McGrath ff11f0aa5d [Clang] Pass -z rel to linker for Fuchsia
Fuchsia already supports the more compact relocation format.
Make it the default.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D113136
2021-11-10 13:31:22 -08:00
Kostya Serebryany b7f3a4f4fa [sancov] add tracing for loads and store
add tracing for loads and stores.

The primary goal is to have more options for data-flow-guided fuzzing,
i.e. use data flow insights to perform better mutations or more agressive corpus expansion.
But the feature is general puspose, could be used for other things too.

Pipe the flag though clang and clang driver, same as for the other SanitizerCoverage flags.
While at it, change some plain arrays into std::array.

Tests: clang flags test, LLVM IR test, compiler-rt executable test.

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D113447
2021-11-09 14:35:13 -08:00
Ard Biesheuvel 24772720c5 [ARM] reject -mtp=cp15 if target subarch does not support it
Currently, we permit -mtp=cp15 even for targets that don't implement the
TLS register. When building for ARMv6 or earlier, this means we emit
instructions that will UNDEF at runtime. For Thumb1, passing -mtp=cp15
will trigger an assert in the backend.

So let's add some diagnostics to ensure that -mtp=cp15 is only accepted
for ARMv6T2 or newer.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D113026
2021-11-09 18:29:30 +01:00
Ard Biesheuvel a19da876ab [ARM] implement support for TLS register based stack protector
Implement support for loading the stack canary from a memory location held in
the TLS register, with an optional offset applied. This is used by the Linux
kernel to implement per-task stack canaries, which is impossible on SMP systems
when using a global variable for the stack canary.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D112768
2021-11-09 18:19:47 +01:00
Aaron Ballman 190bde404c Revert "Making the code compliant to the documentation about Floating Point"
This reverts commit 438437cbb6.

There are still broken bots from this:

https://lab.llvm.org/buildbot/#/builders/188/builds/5495
https://lab.llvm.org/buildbot/#/builders/171/builds/5710
2021-11-08 11:43:49 -05:00
Zahira Ammarguellat 438437cbb6 Making the code compliant to the documentation about Floating Point
support default values for C/C++. FPP-MODEL=PRECISE enables FFP-CONTRACT
FMA is enabled.

Fix for https://bugs.llvm.org/show_bug.cgi?id=50222
2021-11-08 08:35:19 -05:00
Nico Weber 0425087b8b Revert "Making the code compliant to the documentation about Floating Point"
This reverts commit 17d9560294.
Breaks check-clang everywhere, see e.g.:
https://lab.llvm.org/buildbot/#/builders/105/builds/17229
https://lab.llvm.org/buildbot/#/builders/109/builds/25831
https://lab.llvm.org/buildbot/#/builders/188/builds/5493
https://lab.llvm.org/buildbot/#/builders/123/builds/7073
2021-11-08 08:32:42 -05:00
Zahira Ammarguellat 17d9560294 Making the code compliant to the documentation about Floating Point
support default values for C/C++. FPP-MODEL=PRECISE enables FFP-CONTRACT
FMA is enabled.

Fix for https://bugs.llvm.org/show_bug.cgi?id=50222
2021-11-08 07:51:29 -05:00
Shao-Ce SUN 5c3d7184b4 [RISCV] Support Zfhmin extension
According to RISC-V Unprivileged ISA 15.6.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D111866
2021-11-06 01:41:02 +08:00
Kazushi (Jam) Marukawa 3d32218d1a [VE] Change to omitting the frame pointer on leaf functions
Change to omitting the frame pointer on leaf functions by default for VE.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D113087
2021-11-03 17:45:18 +09:00
Yaxun (Sam) Liu 60a085beb0 Revert "[clang] deprecate frelaxed-template-template-args, make it on by default"
This reverts commit 2d7fba5f95.

The patch was reverted because it caused regression with rocThrust
due to ambiguity of template specialization.

For details please see https://reviews.llvm.org/D109496
2021-11-02 17:02:19 -04:00
Mubashar Ahmad 0b83a18a2b [AArch64] Enablement of Cortex-X2
Enables support for Cortex-X2 cores.

Differential Revision: https://reviews.llvm.org/D112459
2021-11-01 11:55:24 +00:00
Keith Smiley bd8a9507ef [clang][driver] Fix multiarch output name with -Wl arg
Previously if you passed a `-Wl,-foo` _before_ the source filename, the
first `InputInfos`, which is used for the base input name would be an
`InputArg` kind, which would never have a base input name. Now we use
that by default, but pick the first `InputInfo` that is of kind
`Filename` to get the name from if there is one.

Differential Revision: https://reviews.llvm.org/D112767
2021-10-29 10:09:38 -07:00
Martin Storsjö d758069f5e [clang] [MinGW] Guess the right ix86 arch name spelling as sysroot
For x86, most contempory mingw toolchains use i686 as 32 bit
x86 arch target.

As long as the target triple is set to the right form, this works
fine, either as the compiler's default target, or via e.g.
a triple prefix like i686-w64-mingw32-clang.

However, if the unprefixed toolchain targets x86_64, but the user
tries to switch it to target 32 bit by adding the -m32 option, the
computeTargetTriple function in Clang, together with
Triple::get32BitArchVariant, sets the arch to i386. This causes
the right sysroot to not be found.

When targeting an arch where there are potential spelling ambiguities
with respect to the sysroots (i386 and arm), check if the driver can
find a sysroot with the arch name - if not, try a couple other
candidates.

Differential Revision: https://reviews.llvm.org/D111952
2021-10-29 09:32:36 +03:00
Alex Lorenz 3d0d7d8c5b [clang][driver][darwin] support -target with Mac Catalyst triple without OS version
Some users might omit the version and assume the compiler will target the initial
Mac Catalyst version.
2021-10-28 18:46:10 -07:00
Caroline Concatto 2186b011e9 [Driver][AArch64]Add driver support for neoverse-512tvb target
The support for  neoverse-512tvb mirrors the same option available in GCC[1].
There is no functional effect for this option yet.
This patch ensures the driver accepts "-mcpu=neoverse-512tvb", and enough
plumbing is in place to allow the new option to be used in the future.

[1]https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html

Differential Revision: https://reviews.llvm.org/D112406
2021-10-28 09:08:40 +01:00
YunQiang Su 284c2ebc5e [clang][MIPS] Fix search path for Debian multilib O32
In the situation of multilib, the gcc objects are in a /32 directory. On
Debian, the libraries is under /libo32 to avoid confliction. This patch
enables clang find gcc in /32, and C lib in /libo32.

Differential Revision: https://reviews.llvm.org/D112158
2021-10-28 10:23:06 +03:00
Matheus Izvekov 2d7fba5f95
[clang] deprecate frelaxed-template-template-args, make it on by default
A resolution to the ambiguity issues created by P0522, which is a DR solving
CWG 150, did not come as expected, so we are just going to accept the change,
and watch how users digest it.

For now we deprecate the flag with a warning, and make it on by default.
We don't remove the flag completely in order to give users a chance to
work around any problems by disabling it.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D109496
2021-10-27 22:48:27 +02:00
Alexandros Lamprineas 8689f5e6e7 [AArch64] Add support for the 'R' architecture profile.
This change introduces subtarget features to predicate certain
instructions and system registers that are available only on
'A' profile targets. Those features are not present when
targeting a generic CPU, which is the default processor.

In other words the generic CPU now means the intersection of
'A' and 'R' profiles. To maintain backwards compatibility we
enable the features that correspond to -march=armv8-a when the
architecture is not explicitly specified on the command line.

References: https://developer.arm.com/documentation/ddi0600/latest

Differential Revision: https://reviews.llvm.org/D110065
2021-10-27 12:32:30 +01:00
Bradley Smith 0ce46a1d43 [AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale
This patch splits the existing SveVectorBits LangOpt into VScaleMin and
VScaleMax LangOpts such that we can represent such an option. The cc1
option has also been split into -mvscale-{min,max}=<n> options so that the
cc1 arguments better reflect the vscale_range IR attribute.

Differential Revision: https://reviews.llvm.org/D111790
2021-10-25 11:10:52 +00:00
Kristof Beyls 49e1753c5e Mark baremetal.cpp test as unsupported on Windows.
A new check was added in 3b93dc68, which seems to not be possible to get
working correctly on windows systems:

The test first "captures" the install directory of the clang toolchain
running the test as follows:
// CHECK-AARCH64-NO-HOST-INC: InstalledDir: [[INSTALLEDDIR:.+]]
Then, in a check line a bit later, it uses this to check if a particular
directory in the toolchain installation directory is included when
targeting aarch64-none-elf:
// CHECK-AARCH64-NO-HOST-INC-SAME: "-internal-isystem" "[[INSTALLEDDIR]]{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}aarch64-none-elf{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"

Even though the test aims to take into account forward vs backward slash
differences between Windows and Unix paths, it still fails on Windows.

It seems that on Windows (this is based on the output log from a Windows
bot), the INSTALLEDDIR variable has the following value:

note: with "INSTALLEDDIR" equal to "c:\\\\b\\\\slave\\\\clang-x64-windows-msvc\\\\build\\\\stage1\\\\bin"

However the actual "InstalledDir:" output produced by the clang
toolchain on that Windows bot was:

InstalledDir: c:\b\slave\clang-x64-windows-msvc\build\stage1\bin

It is unclear where the explosion of backslashes happens. Maybe this is
a bug in FileCheck somewhere?
Anyway, marking this test as not supported on Windows to make the bots
green again.
2021-10-22 11:46:50 +01:00
Kristof Beyls e5b87fb722 Fix baremetal.cpp test to handle windows paths. 2021-10-22 10:24:04 +01:00
Kristof Beyls 3b93dc6880 Add basic aarch64-none-elf bare metal driver.
Differential Revision: https://reviews.llvm.org/D111134
2021-10-22 08:06:17 +01:00
Brad Smith 34188f237f [Driver][OpenBSD] Some improvements to the external assembler handling
- Pass CPU variant for ARM
- Pass MIPS CPU in addition to the ABI
2021-10-20 21:05:14 -04:00