Jim Grosbach
2597722e07
Thumb parsing and encoding support for NOP.
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The irony is not lost that this is not a completely trivial patchset.
llvm-svn: 138143
2011-08-19 23:24:36 +00:00
Jim Grosbach
37aa348195
Thumb assembly parsing and encoding for NEG.
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llvm-svn: 138131
2011-08-19 22:51:03 +00:00
Jim Grosbach
459422d750
Be more lenient on tied operand matching for MUL.
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llvm-svn: 138124
2011-08-19 22:30:46 +00:00
Bruno Cardoso Lopes
d126347f32
Re-write part of VEX encoding logic, to be more easy to read! Also fix
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a bug and add a testcase!
llvm-svn: 138123
2011-08-19 22:27:29 +00:00
Jim Grosbach
fd4de3aeff
Thumb assembly parsing and encoding for MVN.
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llvm-svn: 138109
2011-08-19 22:09:23 +00:00
Jim Grosbach
8e048495c8
Thumb assembly parsing and encoding for MUL.
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llvm-svn: 138108
2011-08-19 22:07:46 +00:00
Jim Grosbach
d07e104844
Add FIXME.
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llvm-svn: 138077
2011-08-19 20:48:54 +00:00
Jim Grosbach
f86cd37bef
Thumb assembly parsing and encoding for MOV.
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llvm-svn: 138076
2011-08-19 20:46:54 +00:00
Jim Grosbach
1eb6eb0955
Thumb assembly parsing and encoding for LSR.
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llvm-svn: 138065
2011-08-19 19:34:22 +00:00
Jim Grosbach
3245520ade
Thumb assembly parsing and encoding for LSL(register).
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llvm-svn: 138064
2011-08-19 19:30:58 +00:00
Jim Grosbach
5503c3a4e8
Thumb assembly parsing and encoding for LSL(immediate).
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llvm-svn: 138063
2011-08-19 19:29:25 +00:00
Jim Grosbach
7c4739da3c
Thumb assembly parsing and encoding for LDRSB and LDRSH.
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llvm-svn: 138061
2011-08-19 19:17:58 +00:00
Jim Grosbach
26d3587bd8
Thumb assembly parsing and encoding for LDRH.
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llvm-svn: 138060
2011-08-19 18:55:51 +00:00
Jim Grosbach
a32c753ebf
Thumb assembly parsing and encoding for LDRB.
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llvm-svn: 138059
2011-08-19 18:49:59 +00:00
Jim Grosbach
106281f329
Thumb assembly parsing and encoding for LDR(register).
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llvm-svn: 138056
2011-08-19 18:35:06 +00:00
Jim Grosbach
181d2f92b5
Thumb assembly parsing and encoding for LDR(literal).
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llvm-svn: 138052
2011-08-19 18:20:48 +00:00
Jim Grosbach
23983d6bd9
Thumb assembly parsing and encoding for LDR(immediate) form T2.
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llvm-svn: 138050
2011-08-19 18:13:48 +00:00
Jim Grosbach
3fe94e3ef8
Thumb assembly parsing and encoding for LDR(immediate) form T1.
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llvm-svn: 138047
2011-08-19 17:55:24 +00:00
Craig Topper
ba6c2a52c7
Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler
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llvm-svn: 138034
2011-08-19 05:28:50 +00:00
Bruno Cardoso Lopes
22241acc29
Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the
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implementation!
llvm-svn: 138029
2011-08-19 02:23:56 +00:00
Owen Anderson
96b7ad2e17
STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
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Found by randomized testing.
llvm-svn: 138003
2011-08-18 22:47:44 +00:00
Owen Anderson
192a760b54
Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset.
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llvm-svn: 138000
2011-08-18 22:31:17 +00:00
Owen Anderson
67d6f11974
Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions.
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Fixes a large class of disassembler crashes found by randomized testing.
llvm-svn: 137995
2011-08-18 22:11:02 +00:00
Jim Grosbach
90103ccc05
Thumb assembly parsing and encoding for LDM instruction.
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Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.
llvm-svn: 137986
2011-08-18 21:50:53 +00:00
Owen Anderson
627021d7c0
More Thumb1 decoding tests.
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llvm-svn: 137974
2011-08-18 20:05:06 +00:00
Jim Grosbach
6cb336cb09
Thumb assembly parsing and encoding for EOR.
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llvm-svn: 137964
2011-08-18 18:10:38 +00:00
Jim Grosbach
4f240a1fd5
Thumb assembly parsing and encoding for CMP.
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llvm-svn: 137963
2011-08-18 18:08:29 +00:00
James Molloy
9f9371ccb3
Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed.
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llvm-svn: 137960
2011-08-18 18:03:02 +00:00
Jim Grosbach
47bf39d921
Thumb assembly parsing and encoding test for CMN.
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llvm-svn: 137957
2011-08-18 17:55:03 +00:00
Owen Anderson
ec3884c50a
Port over BL/BLX to disassembly tests.
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llvm-svn: 137954
2011-08-18 17:43:52 +00:00
Jim Grosbach
0081879ee7
ARM assembly parsing and encoding test for BX/BLX (register).
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llvm-svn: 137949
2011-08-18 17:02:28 +00:00
Jim Grosbach
8b7158e557
ARM assembly parsing and encoding test for BL/BLX (immediate).
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llvm-svn: 137948
2011-08-18 17:00:09 +00:00
Owen Anderson
a90896397b
Port new Thumb1 encoding tests over to decoding tests.
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llvm-svn: 137902
2011-08-17 23:37:33 +00:00
Jim Grosbach
1b43828958
ARM assembly parsing and encoding test for BKPT.
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llvm-svn: 137898
2011-08-17 23:11:13 +00:00
Jim Grosbach
e3bdcd0ea8
ARM assembly parsing and encoding test for BIC.
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llvm-svn: 137895
2011-08-17 23:00:53 +00:00
Jim Grosbach
cbd4ab104b
Thumb assembly parsing and encoding for B.
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llvm-svn: 137891
2011-08-17 22:57:40 +00:00
Jim Grosbach
d3e8e29124
Thumb assembly parsing and encoding for ASR.
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llvm-svn: 137889
2011-08-17 22:49:09 +00:00
Jim Grosbach
e2a0404a69
Thumb assembly parsing and encoding for ADR.
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llvm-svn: 137864
2011-08-17 20:37:40 +00:00
Jim Grosbach
e2d152016f
Add a couple of FIXMEs.
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llvm-svn: 137861
2011-08-17 20:35:57 +00:00
Owen Anderson
d40d838cc4
Start building a Thumb1 decoding test file based on the Thumb1 parsing/encoding test file.
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llvm-svn: 137840
2011-08-17 18:21:36 +00:00
Jim Grosbach
80636b48c0
Thumb assembly parsing and encoding for ADC(register) instruction.
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llvm-svn: 137833
2011-08-17 17:55:28 +00:00
Jim Grosbach
a806eebe13
Add missing '@' delimiter.
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llvm-svn: 137832
2011-08-17 17:46:01 +00:00
Owen Anderson
a4043c4b32
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
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Patch by James Molloy.
llvm-svn: 137830
2011-08-17 17:44:15 +00:00
Jim Grosbach
e9ab47a72a
Thumb ADD(immediate) parsing support.
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llvm-svn: 137788
2011-08-16 23:57:34 +00:00
Jim Grosbach
b7fa2c0a53
Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
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llvm-svn: 137779
2011-08-16 22:20:01 +00:00
Jim Grosbach
58ffdccab1
Thumb assembly parsing and encoding for ADD(register) instruction.
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llvm-svn: 137759
2011-08-16 21:34:08 +00:00
Jim Grosbach
2c21bf4b43
Add testcase for r137746.
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llvm-svn: 137754
2011-08-16 21:11:21 +00:00
Jim Grosbach
d3ad0aa413
Tidy up formatting.
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llvm-svn: 137747
2011-08-16 20:55:41 +00:00
Jim Grosbach
3e941aee69
ARM thumb assembly parsing for arithmetic flag setting instructions.
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Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
llvm-svn: 137746
2011-08-16 20:45:50 +00:00
Jim Grosbach
45e50d8a0b
ARM .align NOP padding uses different encoding pre-ARMv6.
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Patch by Kristof Beyls and James Malloy.
llvm-svn: 137723
2011-08-16 17:06:20 +00:00