Commit Graph

127719 Commits

Author SHA1 Message Date
Justin Lebar b5c7b1c00f [NVPTX] Test that MachineSink won't sink across llvm.cuda.syncthreads.
Summary:
The syncthreads MI is modeled as mayread/maywrite -- convergence doesn't
even come into play here.  Nonetheless this property is highly implicit
in the tablegen files, so a test seems appropriate.

Reviewers: jingyue

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D17319

llvm-svn: 261114
2016-02-17 17:46:52 +00:00
Justin Lebar d596ec93ce [NVPTX] Annotate call machine instructions as calls.
Summary:
Otherwise we'll try to do unsafe optimizations on these MIs, such as
sinking loads below calls.

(I suspect that this is not the only bug in the NVPTX instruction
tablegen files; I need to comb through them.)

Reviewers: jholewinski, tra

Subscribers: jingyue, jhen, llvm-commits

Differential Revision: http://reviews.llvm.org/D17315

llvm-svn: 261113
2016-02-17 17:46:50 +00:00
Justin Lebar d3bcdd58f7 [IR] Add {is,set,setNot}Convergent() functions to CallSite, CallInstr, and InvokeInstr.
Summary:
(CallSite already has isConvergent() and setConvergent().)

No functional changes.

Reviewers: reames

Subscribers: llvm-commits, jingyue, arsenm

Differential Revision: http://reviews.llvm.org/D17316

llvm-svn: 261112
2016-02-17 17:46:47 +00:00
Justin Lebar 58535b16f6 Update langref to indicate that calls may be convergent.
Summary:
As previously written, only functions could be convergent.  But calls
need to have a notion of convergence as well.

To see why this is important, consider an indirect call.  We may or may
not want to disable optimizations around it and behave as though we're
calling a convergent function -- it depends on the semantics of the
language we're compiling.  Thus the need for this attr on the call.

Reviewers: jingyue, joker.eph

Subscribers: llvm-commits, tra, jhen, arsenm, chandlerc, hfinkel, resistor

Differential Revision: http://reviews.llvm.org/D17314

llvm-svn: 261111
2016-02-17 17:46:41 +00:00
Justin Lebar b2e8020948 Fix typo in comment.
llvm-svn: 261110
2016-02-17 17:46:39 +00:00
Rafael Espindola e17c3f3ee7 Represent the dynamic table itself with a DynRegionInfo.
The dynamic table is also an array of a fixed structure, so it can be
represented with a DynReginoInfo.

No major functionality change. The extra error checking is covered by
existing tests with a broken dynamic program header.

Idea extracted from r260488. I did the extra cleanups.

llvm-svn: 261107
2016-02-17 16:48:00 +00:00
Mitch Bodart 3f42095776 Fix some erroneous lit test failures due to unlucky name of working directory.
Differential Revision:  http://reviews.llvm.org/D17044

llvm-svn: 261104
2016-02-17 16:35:18 +00:00
Rafael Espindola f04f184d9c Add a unwrapOrError utility and use it to simplify ELFDumper.cpp.
Utility extracted from r260488.

llvm-svn: 261103
2016-02-17 16:21:49 +00:00
Simon Pilgrim 07d72f4f49 [X86][SSE] Update pshufb mask tests.
We are getting better at combining constant pshufb masks - use a real input instead of undef.

Add test for decoding multi-use bitcasted masks as well (actual support will come soon).

llvm-svn: 261101
2016-02-17 15:52:39 +00:00
Rafael Espindola ce2fbddd19 Change how readobj stores info about dynamic symbols.
We used to keep both a section and a pointer to the first symbol.

The oddity of keeping a section for dynamic symbols is because there is
a DT_SYMTAB but no DT_SYMTABZ, so to print the table we have to find the
size via a section table.

The reason for still keeping a pointer to the first symbol is because we
want to be able to print relocation tables even if the section table is
missing (it is mandatory only for files used in linking).

With this patch we keep just a DynRegionInfo. This then requires
changing a few places that were asking for a Elf_Shdr but actually just
needed the first symbol.

The test change is to delete the program header pointer.
Now that we use the information of both DT_SYMTAB and .dynsym, we don't
depend on the sh_entsize of .dynsym if we see DT_SYMTAB.

Note: It is questionable if it is worth it putting the effort to report
broken sh_entsize given that in files with no section table we have to
assume it is sizeof(Elf_Sym), but that is for another change.

Extracted from r260488.

llvm-svn: 261099
2016-02-17 15:38:21 +00:00
Krzysztof Parzyszek de697d4d40 [Hexagon] Fold object construction into map::insert
llvm-svn: 261096
2016-02-17 15:02:07 +00:00
Simon Pilgrim 43bd887090 [X86][SSE] Update pshufb mask test to use a real input instead of undef
We are getting better at combining constant pshufb masks - this test would've failed once we decode bitcasted masks as well.

llvm-svn: 261095
2016-02-17 14:56:58 +00:00
Chad Rosier 185baf809b Typo.
llvm-svn: 261093
2016-02-17 14:45:36 +00:00
Igor Breger ac02f1bb62 AVX512: Fix LowerMSCATTER() return value.
Bug description:
  The bug was discovered when test was compiled with -O0.
  In case scatter result is DAG root , VectorLegalizer failed (assert) due to LowerMSCATTER() return kmask as result.
Change LowerMSCATTER() to return chain as original node do.

Differential Revision: http://reviews.llvm.org/D17331

llvm-svn: 261090
2016-02-17 14:04:33 +00:00
Scott Egerton 219fae9e36 [mips] Removed the SHF_ALLOC flag and the SHT_REL flag from the .pdr section.
This section is used for debug information and has no need to be
in memory at runtime. This patch also fixes an error when compiling
the Linux kernel. The error is that there are relocations within the
.pdr section in a VDSO. SHT_REL was removed as it is a section type
and not a section flag, therefore it does not make sense for it to
be there. With this patch, LLVM now emits the same flags as
the GNU assembler.

llvm-svn: 261083
2016-02-17 11:15:16 +00:00
Simon Pilgrim c5b5dcb985 [X86][AVX] Support bit-blend integer shuffles for 256-bit integer vectors
AVX1 doesn't support the shuffling of 256-bit integer vectors. For 32/64-bit elements we get around this by shuffling as float/double but for 8/16-bit elements (assuming they can't widen) we currently just split, shuffle as 128-bit vectors and concatenate the results back.

This patch adds the ability to lower using the bit-blend patterns before defaulting to the splitting behaviour.

Part 2 of 2

Differential Revision: http://reviews.llvm.org/D17292

llvm-svn: 261082
2016-02-17 10:50:06 +00:00
Simon Pilgrim a50e8d3627 [X86][AVX] Support bit-mask integer shuffles for 256-bit integer vectors
AVX1 doesn't support the shuffling of 256-bit integer vectors. For 32/64-bit elements we get around this by shuffling as float/double but for 8/16-bit elements (assuming they can't widen) we currently just split, shuffle as 128-bit vectors and concatenate the results back.

This patch adds the ability to lower using the bit-mask patterns before defaulting to the splitting behaviour. In some cases this ends up matching what AVX2 would do anyhow or what AVX1 does on the split vectors.

Part 1 of 2

Differential Revision: http://reviews.llvm.org/D17292

llvm-svn: 261081
2016-02-17 10:37:49 +00:00
Simon Pilgrim 9904924e6b [X86][SSE] Tidyup BUILD_VECTOR operand collection. NFCI.
Avoid reuse of operand variables, keep them local to a particular lowering - the operand collection is unique to each case anyhow.

Renamed from V to Ops to more closely match their purpose.

llvm-svn: 261078
2016-02-17 10:12:30 +00:00
Benjamin Kramer 98520ca73b [Hexagon] cast<> a reference instead of referencing + dereferencing.
llvm-svn: 261077
2016-02-17 09:28:45 +00:00
David Blaikie 8bce5a053d llvm-dwp: Support for type units when merging DWPs into larger DWPs
llvm-svn: 261072
2016-02-17 07:00:24 +00:00
David Blaikie 376b33a0d0 Fix the hash function.
llvm-svn: 261071
2016-02-17 07:00:22 +00:00
Cong Hou bbd4e3b400 Detecte vector reduction operations just before instruction selection.
This patch detects vector reductions before instruction selection. Vector
reductions are vectorized reduction operations, and for such operations we have
freedom to reorganize the elements of the result as long as the reduction of them
stay unchanged. This will enable some reduction pattern recognition during
instruction combine such as SAD/dot-product on X86. A flag is added to
SDNodeFlags to mark those vector reduction nodes to be checked during instruction
combine.

To detect those vector reductions, we search def-use chains starting from the
given instruction, and check if all uses fall into two categories:

1. Reduction with another vector.
2. Reduction on all elements.

in which 2 is detected by recognizing the pattern that the loop vectorizer
generates to reduce all elements in the vector outside of the loop, which
includes several ShuffleVector and one ExtractElement instructions.


Differential revision: http://reviews.llvm.org/D15250

llvm-svn: 261070
2016-02-17 06:37:04 +00:00
Hans Wennborg 84047896b9 Revert r260979 "[X86] Enable the LEA optimization pass by default."
Asserts are still firing in Chromium builds. PR26575.

llvm-svn: 261058
2016-02-17 02:49:59 +00:00
Xinliang David Li c902fed440 revert r261038: arm/aarch64 bot failure
llvm-svn: 261057
2016-02-17 02:39:34 +00:00
Mehdi Amini ac9d1467e2 Revert "Query the StringMap only once when creating MDString (NFC)"
This reverts commit r261030 and r261036.
(The revision was marked "approved" on phabricator, but some concerns
were raised on the mailing list. Thanks D. Blaikie for notifying me.)

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261055
2016-02-17 02:18:58 +00:00
Haicheng Wu 5cf99095bb [AliasSetTracker] Teach AliasSetTracker about MemSetInst
This change is to fix the problem discussed in
http://lists.llvm.org/pipermail/llvm-dev/2016-February/095446.html.

llvm-svn: 261052
2016-02-17 02:01:50 +00:00
JF Bastien a0d5347ee9 WebAssembly: update expected failures
r261050 seems to inadvertently fix the assertion failure.

llvm-svn: 261051
2016-02-17 01:59:23 +00:00
Dan Gohman 476ffcec04 [WebAssembly] Call memcpy for large byval copies.
This fixes very slow compilation on
test/CodeGen/Generic/2010-11-04-BigByval.ll . Note that MaxStoresPerMemcpy
and friends are not yet carefully tuned so the cutoff point is currently
somewhat arbitrary. However, it's important that there be a cutoff point
so that we don't emit unbounded quantities of loads and stores.

llvm-svn: 261050
2016-02-17 01:43:37 +00:00
JF Bastien 188ca894c2 WebAssembly: update expected test failures
r261032 adds frame address support.

llvm-svn: 261044
2016-02-17 00:34:15 +00:00
Chandler Carruth e5944d97d8 [LCG] Construct an actual call graph with call-edge SCCs nested inside
reference-edge SCCs.

This essentially builds a more normal call graph as a subgraph of the
"reference graph" that was the old model. This allows both to exist and
the different use cases to use the aspect which addresses their needs.
Specifically, the pass manager and other *ordering* constrained logic
can use the reference graph to achieve conservative order of visit,
while analyses reasoning about attributes and other properties derived
from reachability can reason about the direct call graph.

Note that this isn't necessarily complete: it doesn't model edges to
declarations or indirect calls. Those can be found by scanning the
instructions of the function if desirable, and in fact every user
currently does this in order to handle things like calls to instrinsics.
If useful, we could consider caching this information in the call graph
to save the instruction scans, but currently that doesn't seem to be
important.

An important realization for why the representation chosen here works is
that the call graph is a formal subset of the reference graph and thus
both can live within the same data structure. All SCCs of the call graph
are necessarily contained within an SCC of the reference graph, etc.

The design is to build 'RefSCC's to model SCCs of the reference graph,
and then within them more literal SCCs for the call graph.

The formation of actual call edge SCCs is not done lazily, unlike
reference edge 'RefSCC's. Instead, once a reference SCC is formed, it
directly builds the call SCCs within it and stores them in a post-order
sequence. This is used to provide a consistent platform for mutation and
update of the graph. The post-order also allows for very efficient
updates in common cases by bounding the number of nodes (and thus edges)
considered.

There is considerable common code that I'm still looking for the best
way to factor out between the various DFS implementations here. So far,
my attempts have made the code harder to read and understand despite
reducing the duplication, which seems a poor tradeoff. I've not given up
on figuring out the right way to do this, but I wanted to wait until
I at least had the system working and tested to continue attempting to
factor it differently.

This also requires introducing several new algorithms in order to handle
all of the incremental update scenarios for the more complex structure
involving two edge colorings. I've tried to comment the algorithms
sufficiently to make it clear how this is expected to work, but they may
still need more extensive documentation.

I know that there are some changes which are not strictly necessarily
coupled here. The process of developing this started out with a very
focused set of changes for the new structure of the graph and
algorithms, but subsequent changes to bring the APIs and code into
consistent and understandable patterns also ended up touching on other
aspects. There was no good way to separate these out without causing
*massive* merge conflicts. Ultimately, to a large degree this is
a rewrite of most of the core algorithms in the LCG class and so I don't
think it really matters much.

Many thanks to the careful review by Sanjoy Das!

Differential Revision: http://reviews.llvm.org/D16802

llvm-svn: 261040
2016-02-17 00:18:16 +00:00
Reid Kleckner 8de35fef3d [X86] Fix a shrink-wrapping miscompile around __chkstk
__chkstk clobbers EAX. If EAX is live across the prologue, then we have
to take extra steps to save it. We already had code to do this if EAX
was a register parameter. This change adapts it to work when shrink
wrapping is used.

llvm-svn: 261039
2016-02-17 00:17:33 +00:00
Xinliang David Li b83bedd8c2 New test case: make sure alloc bit is not set for covmap section on Linux
llvm-svn: 261038
2016-02-17 00:14:52 +00:00
Dan Gohman 1d547bf566 [WebAssembly] Use SDValue::getConstantOperandVal. NFC.
llvm-svn: 261037
2016-02-17 00:14:03 +00:00
Mehdi Amini 08ea2c7537 Fix MSVC bot: apparently visual studio does not like explicitly defaulted move ctor
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261036
2016-02-17 00:11:59 +00:00
Andrew Kaylor b68464eb78 Fix build LLVM with -D LLVM_USE_INTEL_JITEVENTS:BOOL=ON on Windows
Differential Revision: http://reviews.llvm.org/D16940

llvm-svn: 261033
2016-02-16 23:52:18 +00:00
Dan Gohman 94c6566055 [WebAssembly] Implement __builtin_frame_address.
Differential Revision: http://reviews.llvm.org/D17307

llvm-svn: 261032
2016-02-16 23:48:04 +00:00
Mehdi Amini 0520929231 Query the StringMap only once when creating MDString (NFC)
Summary: Loading IR with debug info improves MDString::get() from 19ms to 10ms.

Reviewers: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16597

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261030
2016-02-16 23:05:56 +00:00
Mehdi Amini 1db10ac6ce Define the ThinLTO Pipeline (experimental)
Summary:
On the contrary to Full LTO, ThinLTO can afford to shift compile time
from the frontend to the linker: both phases are parallel (even if
it is not totally "free": projects like clang are reusing product
from the "compile phase" for multiple link, think about
libLLVMSupport reused for opt, llc, etc.).

This pipeline is based on the proposal in D13443 for full LTO. We
didn't move forward on this proposal because the LTO link was far too
long after that. We believe that we can afford it with ThinLTO.

The ThinLTO pipeline integrates in the regular O2/O3 flow:

 - The compile phase perform the inliner with a somehow lighter
   function simplification. (TODO: tune the inliner thresholds here)
   This is intendend to simplify the IR and get rid of obvious things
   like linkonce_odr that will be inlined.
 - The link phase will run the pipeline from the start, extended with
   some specific passes that leverage the augmented knowledge we have
   during LTO. Especially after the inliner is done, a sequence of
   globalDCE/globalOpt is performed, followed by another run of the
   "function simplification" passes. It is not clear if this part
   of the pipeline will stay as is, as the split model of ThinLTO
   does not allow the same benefit as FullLTO without added tricks.

The measurements on the public test suite as well as on our internal
suite show an overall net improvement. The binary size for the clang
executable is reduced by 5%. We're still tuning it with the bringup
of ThinLTO and it will evolve, but this should provide a good starting
point.

Reviewers: tejohnson

Differential Revision: http://reviews.llvm.org/D17115

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261029
2016-02-16 23:02:29 +00:00
Mehdi Amini ec8bee1879 Refactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()" (NFC)
It is intended to contains the passes run over a function after the
inliner is done with a function and before it moves to its callers.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261028
2016-02-16 22:54:27 +00:00
Adam Nemet 7e326b1552 Fix test from r261013
llvm-svn: 261027
2016-02-16 22:50:19 +00:00
Simon Pilgrim cc8a282647 [X86][AVX] Regenerated vselect tests
llvm-svn: 261026
2016-02-16 22:33:27 +00:00
Ahmed Bougacha f3cccab1e0 [X86] Remove the now-unused X86ISD::PSIGN. NFC.
llvm-svn: 261025
2016-02-16 22:14:12 +00:00
Ahmed Bougacha af60a429c9 [X86] Generalize logic blend of (x, -x) combine to match (-x, x).
I suspect this is what let PR26110 lie dormant for so long.

llvm-svn: 261024
2016-02-16 22:14:07 +00:00
Ahmed Bougacha 132fbf5476 [X86] Don't turn (c?-v:v) into (c?-v:0) by blindly using PSIGN.
Currently, we sometimes miscompile this vector pattern:
    (c ? -v : v)
We lower it to (because "c" is <4 x i1>, lowered as a vector mask):
    (~c & v) | (c & -v)

When we have SSSE3, we incorrectly lower that to PSIGN, which does:
    (c < 0 ? -v : c > 0 ? v : 0)
in other words, when c is either all-ones or all-zero:
    (c ? -v : 0)
While this is an old bug, it rarely triggers because the PSIGN combine
is too sensitive to operand order. This will be improved separately.

Note that the PSIGN tests are also incorrect. Consider:
    %b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
    %sub = sub nsw <4 x i32> zeroinitializer, %a
    %0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
    %1 = and <4 x i32> %a, %0
    %2 = and <4 x i32> %b.lobit, %sub
    %cond = or <4 x i32> %1, %2
    ret <4 x i32> %cond
if %b is zero:
    %b.lobit = <4 x i32> zeroinitializer
    %sub = sub nsw <4 x i32> zeroinitializer, %a
    %0 = <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
    %1 = <4 x i32> %a
    %2 = <4 x i32> zeroinitializer
    %cond = or <4 x i32> %a, zeroinitializer
    ret <4 x i32> %a
whereas we currently generate:
    psignd %xmm1, %xmm0
    retq
which returns 0, as %xmm1 is 0.

Instead, use a pure logic sequence, as described in:
https://graphics.stanford.edu/~seander/bithacks.html#ConditionalNegate

Fixes PR26110.

Differential Revision: http://reviews.llvm.org/D17181

llvm-svn: 261023
2016-02-16 22:14:03 +00:00
Ahmed Bougacha a87c3480b5 [X86] Extract PSIGN/BLENDVP tests into vector-blend.ll. NFC.
We're going to stop generating PSIGN, so calling a test "psign"
isn't ideal. Instead, call these tests what they really are:
variable blends using logic.
Also add a test to exhibit a case we're currently missing in
the PSIGN combine.

llvm-svn: 261022
2016-02-16 22:13:59 +00:00
Ahmed Bougacha f211f685e4 [X86] Extract PSIGN/BLENDVP combine. NFC.
llvm-svn: 261021
2016-02-16 22:13:55 +00:00
Ahmed Bougacha 7502768c6d [X86] Extract ANDNP combine. NFC.
This makes it IMO more readable and reduces indentation.

llvm-svn: 261020
2016-02-16 22:13:49 +00:00
Mehdi Amini 83efea89e8 Bitcode writer: fix a typo, using getName() instead of getSourceFileName()
When emitting the source filename, the encoding of the string
was checked against the name instead of the filename.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 261019
2016-02-16 22:07:03 +00:00
Derek Schuff 25628d3362 [WebAssembly] Update torture test expectations
These were fixed with r260978

llvm-svn: 261017
2016-02-16 21:52:06 +00:00
Reid Kleckner 9a593ee7d2 [codeview] Bail on a DBG_VALUE register operand with no register
This apparently comes up when the register allocator decides that a
variable will become undef along a certain path.

Also improve the error message we emit when we can't map from LLVM
register number to CV register number.

llvm-svn: 261016
2016-02-16 21:49:26 +00:00
Derek Schuff f8f8f093aa [WebAssemly] Don't move calls or stores past intervening loads
The register stackifier currently checks for intervening stores (and
loads that may alias them) but doesn't account for the fact that the
instruction being moved may affect intervening loads.

Differential Revision: http://reviews.llvm.org/D17298

llvm-svn: 261014
2016-02-16 21:44:19 +00:00
Adam Nemet 106fedab6f [LTO] Support Statistics
Summary:
I thought -Xlinker -mllvm -Xlinker -stats worked at some point but maybe
it never did.

For clang, I believe that stats are printed from cc1_main.  This patch
also prints them for LTO, specifically right after codegen happens.

I only looked at the C API for LTO briefly to see if this is a good
place.  Probably there are still cases where this wouldn't be printed
but it seems to be working for the common case.  I also experimented
putting this in the LTOCodeGenerator destructor but that didn't trigger
for me because ld64 does not destroy the LTOCodeGenerator.

Reviewers: dexonsmith, joker.eph

Subscribers: rafael, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D17302

llvm-svn: 261013
2016-02-16 21:41:51 +00:00
Reid Kleckner 6e0d5f573c [codeview] Fix assertion on non-memory, non-register DBG_VALUE instructions
Eventually we should find a way to describe constant variables, but it
is not obvious how to do this at the moment.

llvm-svn: 261010
2016-02-16 21:14:51 +00:00
Colin LeMahieu ecef1d9cbc [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding.
The usual way to get a 32-bit relocation is to use a constant extender which doubles the size of the instruction, 4 bytes to 8 bytes.

Another way is to put a .word32 and mix code and data within a function.  The disadvantage is it's not a valid instruction encoding and jumping over it causes prefetch stalls inside the hardware.

This relocation packs a 23-bit value in to an "r0 = add(rX, #a)" instruction by overwriting the source register bits.  Since r0 is the return value register, if this instruction is placed after a function call which return void, r0 will be filled with an undefined value, the prefetch won't be confused, and the callee can access the constant value by way of the link register.

llvm-svn: 261006
2016-02-16 20:38:17 +00:00
Jun Bum Lim b389d9b9af [AArch64] Add pass to remove redundant copy after RA
Summary:
This change will add a pass to remove unnecessary zero copies in target blocks
of cbz/cbnz instructions. E.g., the copy instruction in the code below can be
removed because the cbz jumps to BB1 when x0 is zero :
  BB0:
    cbz x0, .BB1
  BB1:
    mov x0, xzr

Jun

Reviewers: gberry, jmolloy, HaoLiu, MatzeB, mcrosier

Subscribers: mcrosier, mssimpso, haicheng, bmakam, llvm-commits, aemerson, rengolin

Differential Revision: http://reviews.llvm.org/D16203

llvm-svn: 261004
2016-02-16 20:02:39 +00:00
Quentin Colombet ba2a01645b [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code.
Original message:
Get rid of the ifdefs in TargetLowering.
Introduce a new API used only by GlobalISel: CallLowering.
This API will contain target hooks dedicated to call lowering.

llvm-svn: 260998
2016-02-16 19:26:02 +00:00
Rafael Espindola 40358fb86f Pass a std::unique_ptr to IRMover::move.
It was already the one "destroying" the source module, now the API
reflects that.

llvm-svn: 260989
2016-02-16 18:50:12 +00:00
Derek Schuff aadc89c25d [WebAssembly] Insert COPY_LOCAL between CopyToReg and FrameIndex DAG nodes
CopyToReg nodes don't support FrameIndex operands. Other targets select
the FI to some LEA-like instruction, but since we don't have that, we
need to insert some kind of instruction that can take an FI operand and
produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy
copy_local between Op and its FI operand. This results in a redundant
copy which we should optimize away later (maybe in the post-FI-lowering
peephole pass).

Differential Revision: http://reviews.llvm.org/D17213

llvm-svn: 260987
2016-02-16 18:18:36 +00:00
Tom Stellard cc4c8718ed [AMDGPU] Rename $dst operand to $vdst for VOP instructions.
Summary: This change renames output operand for VOP instructions from dst to vdst. This is needed to enable decoding named operands for disassembler.

Reviewers: vpykhtin, tstellarAMD, arsenm

Subscribers: arsenm, llvm-commits, nhaustov

Projects: #llvm-amdgpu-spb

Differential Revision: http://reviews.llvm.org/D16920

llvm-svn: 260986
2016-02-16 18:14:56 +00:00
Philip Reames 845435c86a Revert 260705, it appears to be causing pr26628
The root issue appears to be a confusion around what makeNoWrapRegion actually does.   It seems likely we need two versions of this function with slightly different semantics.

llvm-svn: 260981
2016-02-16 17:14:30 +00:00
Andrey Turetskiy eab4e68650 [X86] Enable the LEA optimization pass by default.
Differential Revision: http://reviews.llvm.org/D16877

llvm-svn: 260979
2016-02-16 16:41:38 +00:00
Dan Gohman 442bfcec00 [WebAssembly] Switch from RPO sorting to topological sorting.
WebAssembly doesn't require full RPO; topological sorting is sufficient and
can preserve more of the MachineBlockPlacement ordering. Unfortunately, this
still depends a lot on heuristics, because while we use the
MachineBlockPlacement ordering as a guide, we can't use it in places where
it isn't topologically ordered. This area will require further attention.

llvm-svn: 260978
2016-02-16 16:22:41 +00:00
Aaron Ballman c6a2f2140b A signed bitfield's range is [-1,0], so assigning 1 is technically an overflow. However, the other bitfield requires a signed value (it supports negative offsets), so it is slightly better to retain a signed 1-bit bitfield and use -1 instead of 1. Silences an MSVC warning.
llvm-svn: 260973
2016-02-16 15:35:51 +00:00
Aaron Ballman fc64ef1a15 Reverting r260922-260923; they cause link failures with MSVC.
http://lab.llvm.org:8011/builders/lldb-x86-windows-msvc2015/builds/15436/steps/build/logs/stdio
http://bb.pgr.jp/builders/msbuild-llvmclang-x64-msc18-DA/builds/961/steps/build_llvm/logs/stdio

llvm-svn: 260972
2016-02-16 15:29:06 +00:00
Dan Gohman 8aa237c3ca [WebAssembly] Create new registers instead of reusing old ones in RegStackify.
This avoids some complications updating LiveIntervals to be aware of the new
register lifetimes, because we can just compute new intervals from scratch
rather than describe how the old ones have been changed.

llvm-svn: 260971
2016-02-16 15:17:21 +00:00
Rafael Espindola 944f655e05 Reapply r260489.
Original commit message:

[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations.

The bits of r260488 it depends on have been committed.

llvm-svn: 260970
2016-02-16 15:16:00 +00:00
Dan Gohman aa7429112e [WebAssembly] Implement support for custom NaN bit patterns.
llvm-svn: 260968
2016-02-16 15:14:23 +00:00
Rafael Espindola c70aedab0e Introduce a getAsRange helper.
This requires making an error message a bit more generic, but that seems
a reasonable tradeoff.

Extracted from r260488 but simplified a bit.

llvm-svn: 260967
2016-02-16 14:50:39 +00:00
Rafael Espindola 65a6fd8844 Move DynRegionInfo out of the ELFDumper.
This reduces indentation in preparation to adding a bit more code to it.

Extracted from r260488.

llvm-svn: 260963
2016-02-16 14:27:33 +00:00
Rafael Espindola 6009db696b This reverts commit r260488 and r260489.
Original messages:
    Revert "[readobj] Handle ELF files with no section table or with no program headers."
    Revert "[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations."

r260489 depends on r260488 and among other issues r260488 deleted error
handling code.

llvm-svn: 260962
2016-02-16 14:17:48 +00:00
Andrey Turetskiy 1052ac2311 [X86] PR26575: Fix LEA optimization pass.
Add a missing check for a type of address displacement operand of the load/store instruction being a candidate for LEA substitution.

Ref: https://llvm.org/bugs/show_bug.cgi?id=26575

Differential Revision: http://reviews.llvm.org/D17261

llvm-svn: 260959
2016-02-16 12:47:45 +00:00
Benjamin Kramer 986a49b036 [Hexagon] Hoist nonnull assert up.
Once a pointer is turned into a reference it cannot be nullptr, clang
rightfully warns about this assert being a tautology. Put the assert
before the reference is created.

llvm-svn: 260949
2016-02-16 09:53:47 +00:00
Amaury Sechet f447a6b5f4 Make sure the functions' range is empty before going through it in the LLVM C API test
llvm-svn: 260947
2016-02-16 08:37:01 +00:00
Craig Topper d55f4bc5e4 [X86] Fix typos. NFC
llvm-svn: 260943
2016-02-16 07:45:07 +00:00
Craig Topper 16d7eb26ea [X86] Use range-based for loop. NFC
llvm-svn: 260942
2016-02-16 07:45:04 +00:00
Amaury Sechet 6b16c2372c Do some refactoring in constant generation in the C API echo test. NFC
llvm-svn: 260941
2016-02-16 07:33:23 +00:00
Craig Topper 5a62f7e399 [X86] Fix typo in comment. NFC
llvm-svn: 260940
2016-02-16 07:28:03 +00:00
Amaury Sechet f64e834f63 Generate functions in 2 steps in the C API echo test. NFC
llvm-svn: 260939
2016-02-16 07:08:49 +00:00
Junmo Park 6ebdc14cf1 [SCEVExpander] Make findExistingExpansion smarter
Summary:
Extending findExistingExpansion can use existing value in ExprValueMap.
This patch gives 0.3~0.5% performance improvements on 
benchmarks(test-suite, spec2000, spec2006, commercial benchmark)
   
Reviewers: mzolotukhin, sanjoy, zzheng

Differential Revision: http://reviews.llvm.org/D15559

llvm-svn: 260938
2016-02-16 06:46:58 +00:00
Amaury Sechet 5590967610 Restore the capability to manipulate datalayout from the C API
Summary:
This consist in variosu addition to the C API:

  LLVMTargetDataRef LLVMGetModuleDataLayout(LLVMModuleRef M);
  void LLVMSetModuleDataLayout(LLVMModuleRef M, LLVMTargetDataRef DL);
  LLVMTargetDataRef LLVMCreateTargetMachineData(LLVMTargetMachineRef T);

Reviewers: joker.eph, Wallbraker, echristo

Subscribers: axw

Differential Revision: http://reviews.llvm.org/D17255

llvm-svn: 260936
2016-02-16 05:11:24 +00:00
Craig Topper 6615654f56 [TableGen] Fix inconsistent spacing. NFC
llvm-svn: 260935
2016-02-16 04:24:58 +00:00
Craig Topper 983be941bf [TableGen] Stop passing by reference an integer that doesn't get modified. NFC
llvm-svn: 260934
2016-02-16 04:24:56 +00:00
Craig Topper b89d189d37 [TableGen] Remove unused member variable. NFC
llvm-svn: 260933
2016-02-16 04:24:54 +00:00
Craig Topper c46d3297df Remove an unnecessary std::move to fix -Wpessimizing-move warning.
llvm-svn: 260931
2016-02-16 04:17:42 +00:00
Craig Topper 9cd0ff1470 [TableGen] Use range-based for loop. NFC
llvm-svn: 260928
2016-02-16 02:48:30 +00:00
Vedant Kumar 98372e327b Simplify users of StringRef::{l,r}trim (NFC)
r260925 introduced a version of the *trim methods which is preferable
when trimming a single kind of character. Update all users in llvm.

llvm-svn: 260926
2016-02-16 02:06:01 +00:00
Vedant Kumar f114b40c73 [ADT] Add StringRef::{l,r}trim(char) overloads (NFC)
Add support for trimming a single kind of character from a StringRef.
This makes the common case of trimming null bytes much neater. It's also
probably a bit speedier too, since it avoids creating a std::bitset in
find_{first,last}_not_of.

llvm-svn: 260925
2016-02-16 01:48:39 +00:00
Quentin Colombet 975ce8fab5 [GlobalISel][IRTranslator] Override getPassName.
llvm-svn: 260924
2016-02-16 01:38:09 +00:00
Quentin Colombet ff6b2f9e32 [GlobalISel] Add missing file in previous commit.
llvm-svn: 260923
2016-02-16 01:05:16 +00:00
Quentin Colombet 1ce38545fb [GlobalISel] Get rid of the ifdefs in TargetLowering.
Introduce a new API used only by GlobalISel: CallLowering.
This API will contain target hooks dedicated to call lowering.

llvm-svn: 260922
2016-02-16 00:57:44 +00:00
Amaury Sechet f3549c4a11 Deprecate LLVMGetDataLayout and replace it by LLVMGetDataLayoutStr
Summary: The name is confusing as it matche another method on the module.

Reviewers: joker.eph, Wallbraker, echristo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17283

llvm-svn: 260920
2016-02-16 00:23:52 +00:00
Amaury Sechet 2ffde01b56 Kill LLVMAddTargetData
Summary: It's red, it's dead.

Reviewers: joker.eph, Wallbraker, echristo

Subscribers: llvm-commits, axw

Differential Revision: http://reviews.llvm.org/D17282

llvm-svn: 260919
2016-02-16 00:22:02 +00:00
NAKAMURA Takumi 320aa53ec9 MITests: Update libdeps. llvm/Target/TargetOptions.h depends on MC.
llvm-svn: 260918
2016-02-16 00:17:56 +00:00
Zia Ansari 30a02384f7 Implemented stack symbol table ordering/packing optimization to improve data locality and code size from SP/FP offset encoding.
Differential Revision: http://reviews.llvm.org/D15393

llvm-svn: 260917
2016-02-15 23:44:13 +00:00
Amaury Sechet 6ada31c2a6 Rename LLVMSetDataLayout's argument to match what they stand for
llvm-svn: 260916
2016-02-15 23:40:06 +00:00
Matthias Braun 20ebada4f8 unittests/MI: Add Core library reference
llvm-svn: 260915
2016-02-15 22:09:38 +00:00
Matthias Braun acd531c953 SmallPtrSet: Avoid initializing Array in the small case.
This patch avoids the initial memset at the cost of making iterators
slightly more complex. This should be beneficial as most SmallPtrSets
hold no or only a few elements, while iterating over them is less
common.

Differential Revision: http://reviews.llvm.org/D16672

llvm-svn: 260913
2016-02-15 21:38:42 +00:00
Matthias Braun a6be4e8cdd APInt: Slightly simplify countLeadingZerosSlowCase()
We always clear the unused bits in the most signifant word so there is
no need to mask them out in countLeadingZerosSlowCase().

Differential Revision: http://reviews.llvm.org/D16621

llvm-svn: 260911
2016-02-15 20:06:22 +00:00
Matthias Braun 5117fcdec2 APInt: Further simplify APInt::EqualSlowCase as suggested by Duncan
llvm-svn: 260910
2016-02-15 20:06:19 +00:00
Ahmed Bougacha 71c992d853 [X86] Remove now-dead variable and redundant assert. NFC.
The variable was made dead in NDEBUG by r260901, but the assert
was redundant anyway: get rid of both.

llvm-svn: 260908
2016-02-15 19:32:54 +00:00
Matthias Braun e4e9bfeea4 Fix typo in LiveIntervalTest
llvm-svn: 260907
2016-02-15 19:30:11 +00:00
Matthias Braun 4a6c728cc0 LiveIntervalAnalysis: Support moving of subregister defs in handleMove
This is an updated version which fixes a bug that happened with
uses tied to an earlyclobber operand which end at an unusual slotindex.

If two definitions write to independent subregisters then they can be
put in any order. LiveIntervalAnalysis::handleMove() did not support
this previously because it looks like moving a definition of a vreg past
another one.

This is a modified version of a patch proposed (two years ago) by
Vincent Lejeune! This version does not touch the read-undef flags and is
extended for the case of moving a subregister def behind all uses - this
can happen for subregister defs that are completely unused.

Differential Revision: http://reviews.llvm.org/D9067

llvm-svn: 260906
2016-02-15 19:25:36 +00:00
Matthias Braun a448f197a9 Add unittest for LiveIntervalAnalysis::handleMove()
llvm-svn: 260905
2016-02-15 19:25:34 +00:00
Matthias Braun b3aefc3a69 MachineVerifier: Add parameter to choose if MachineFunction::verify() aborts
The abort on error behaviour is unpractical for debugger and unittest
usage.

llvm-svn: 260904
2016-02-15 19:25:31 +00:00
Colin LeMahieu c7b2124d49 [NFC] Fixing naming convention, lowercase start of function name.
llvm-svn: 260903
2016-02-15 18:47:55 +00:00
Colin LeMahieu 98c8e070b9 [Hexagon] Wrapping all MCExprs inside MCOperands within HexagonMCExpr to simplify handling and allow flags on the expression.
llvm-svn: 260902
2016-02-15 18:42:07 +00:00
Ahmed Bougacha 93cff7fb82 [CodeGen] Document and use getConstant's splat-building feature. NFC.
Differential Revision: http://reviews.llvm.org/D17229

llvm-svn: 260901
2016-02-15 18:07:29 +00:00
Simon Pilgrim 7c920e611c [X86][SSE2] Regenerated sse2 tests
llvm-svn: 260900
2016-02-15 17:57:40 +00:00
Jonas Paulsson 98963fec41 [ScheduleDAGInstrs] isUnsafeMemoryObject() removed
This function was basically useless, since volatile memacesses or MIs with
unmodelled sideffects become global memory objects, and the other little
checks are also done elsewhere.

Reviewed by Andy Trick
http://reviews.llvm.org/D16881

llvm-svn: 260899
2016-02-15 16:43:15 +00:00
Krzysztof Parzyszek 04bf43bd83 [Hexagon] Missed testcase update in r260895
llvm-svn: 260897
2016-02-15 16:15:02 +00:00
Scott Egerton d1aeb05654 [mips] Implemented the .hword directive.
Summary:
In order to pass the tests, this required marking R_MIPS_16 relocations
as needing to point to the symbol and not the section.

Reviewers: vkalintiris, dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D17200

llvm-svn: 260896
2016-02-15 16:11:51 +00:00
Krzysztof Parzyszek 73f1a40626 [Hexagon] Use zero-extending loads for anyext
llvm-svn: 260895
2016-02-15 16:01:01 +00:00
Silviu Baranga ec7063ac77 [LV] Add support for insertelt/extractelt processing during type truncation
Summary:
While shrinking types according to the required bits, we can
encounter insert/extract element instructions. This will cause us to
reach an llvm_unreachable statement.

This change adds support for truncating insert/extract element
operations, and adds a regression test.

Reviewers: jmolloy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D17078

llvm-svn: 260893
2016-02-15 15:38:17 +00:00
Roman Gareev 036c08874a Tweak the LICM code to reuse the first sub-loop instead of creating a new one
LICM starts with an *empty* AST, and then merges in each sub-loop. While the
add code is appropriate for sub-loop 2 and up, it's utterly unnecessary for
sub-loop 1. If the AST starts off empty, we can just clone/move the contents
of the subloop into the containing AST.

Reviewed-by: Philip Reames <listmail@philipreames.com>

Differential Revision: http://reviews.llvm.org/D16753

llvm-svn: 260892
2016-02-15 14:48:50 +00:00
Simon Pilgrim 766a659eb5 [X86] More thorough partial-register division checks
For when grep counts are just not enough...

llvm-svn: 260891
2016-02-15 14:09:35 +00:00
Simon Pilgrim a62170834d [X86] Regenerated 64/128 bit multiply tests
llvm-svn: 260890
2016-02-15 14:04:05 +00:00
Simon Pilgrim 9513b3c4c7 [X86][SSE] More thorough testing of all-ones vectors re-materialization
llvm-svn: 260889
2016-02-15 13:50:48 +00:00
Simon Pilgrim 02d3b6a82d [X86][SSE] Regenerated uint2fp special case tests
llvm-svn: 260888
2016-02-15 13:41:41 +00:00
NAKAMURA Takumi eda01dcd57 Make llvm/test/tools/llvm-symbolizer/pdb/pdb.test Py3-compatible.
llvm-svn: 260887
2016-02-15 13:19:13 +00:00
Simon Pilgrim 4e4989a64a [X86][SSE] Regenerated fast isel intrinsics tests
llvm-svn: 260885
2016-02-15 12:32:16 +00:00
Scott Egerton 2c2a2f5119 Reverted r260879 as it caused test failures in lld.
llvm-svn: 260880
2016-02-15 10:04:38 +00:00
Scott Egerton baec95a88c [mips] Removed the SHF_ALLOC flag from the .pdr section.
Summary:
This section is used for debug information and has no need to be
in memory at runtime. With this patch, LLVM now emits the same flags as 
the GNU assembler. This patch also fixes an error when compiling 
the Linux kernel, The error is that there are relocations within the 
.pdr section in a VDSO.

Reviewers: vkalintiris, dsanders

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D17199

llvm-svn: 260879
2016-02-15 09:34:15 +00:00
Igor Breger 4dc7d390db AVX512: Change store size of kmask. Store size of v8i1, v4i1 , v2i1 and i1 are changed to 16 bits.
If KMOVB not supported (require AVX512DQ) only KMOVW can be used so store size should be 2 bytes.

Differential Revision: http://reviews.llvm.org/D17138

llvm-svn: 260878
2016-02-15 08:25:28 +00:00
Junmo Park b2a215ef02 Minor code cleanups. NFC.
llvm-svn: 260875
2016-02-15 04:30:37 +00:00
Sylvestre Ledru 84666a1964 Fix some typos in the llvm doc
llvm-svn: 260855
2016-02-14 20:16:22 +00:00
Simon Pilgrim 834931554b [X86][AVX] Fixed copy+paste typo in shuffle test
llvm-svn: 260852
2016-02-14 18:11:52 +00:00
Amaury Sechet d01c8614dc Use report_fatal_error more consistently in the C API echo test
llvm-svn: 260849
2016-02-14 10:06:34 +00:00
Amaury Sechet c679dbd344 Get constant cloning out of CloneValue so it can be used when creating globals.
llvm-svn: 260848
2016-02-14 09:30:42 +00:00
Amaury Sechet ecda4ea384 Move clone_params around
llvm-svn: 260846
2016-02-14 09:14:30 +00:00
Amaury Sechet 83550104d8 Fix star alignment in Core.h
llvm-svn: 260845
2016-02-14 08:58:49 +00:00
Craig Topper 094bbcaf63 [TableGen] Remove constant string argument from a method that's only called once. We can just hardcode the string inside. There already other things that make the method not reusable. NFC
llvm-svn: 260840
2016-02-14 05:22:01 +00:00
Chandler Carruth bece8d517d [PM/AA] Wire BasicAA's new pass manager class up to the pass registry.
This ensures that all of the various pieces are working. The next patch
will wire up commandline-driven alias analysis chain building and allow
BasicAA to work with the AAManager.

llvm-svn: 260838
2016-02-13 23:46:24 +00:00
Chandler Carruth 6f5770b10f [PM/AA] Actually wire the AAManager I built for the new pass manager
into the new pass manager and fix the latent bugs there.

This lets everything live together nicely, but it isn't really useful
yet. I never finished wiring the AA layer up for the new pass manager,
and so subsequent patches will change this to do that wiring and get AA
stuff more fully integrated into the new pass manager. Turns out this is
necessary even to get functionattrs ported over. =]

llvm-svn: 260836
2016-02-13 23:32:00 +00:00
Duncan P. N. Exon Smith 3f7f883e06 Support: Fix incremental build when re-configuring targets
r180893 added an indirect include of llvm/Config/Targets.def to
llvm/Support/CodeGen.h, which in turn is included by things like
llvm/IR/Module.h.  After a full build of LLVM and Clang, ninja had to
rebuild 1274 files after reconfiguring.

This commit strips CodeGen.h back down to just a pile of enums and moves
the expensive includes over to CodeGenCWrappers.h (which is only
included in two places).  This gets ninja down to 88 files if you
reconfigure with, e.g., -DLLVM_TARGETS_TO_BUILD=X86.

llvm-svn: 260835
2016-02-13 22:58:43 +00:00
Simon Pilgrim 08ba012973 [X86][AVX] Lower shuffles as repeated lane shuffles then lane-crossing shuffles
This patch attempts to represent a shuffle as a repeating shuffle (recognisable by is128BitLaneRepeatedShuffleMask) with the source input(s) in their original lanes, followed by a single permutation of the 128-bit lanes to their final destinations.

On AVX2 we can additionally attempt to match using 64-bit sub-lane permutation. AVX2 can also now match a similar 'broadcasted' repeating shuffle.

This patch has several benefits:

 * Avoids prematurely matching with lowerVectorShuffleByMerging128BitLanes which can require both inputs to have their input lanes permuted before shuffling.
 * Can replace PERMPS/PERMD instructions - although these are useful for cross-lane unary shuffling, they require their shuffle mask to be pre-loaded (and increase register pressure).
 * Matching the repeating shuffle makes use of a lot of existing shuffle lowering.

There is an outstanding minor AVX1 regression (combine_unneeded_subvector1 in vector-shuffle-combining.ll) of a previously 128-bit shuffle + subvector splat being converted to a subvector splat + (2 instruction) 256-bit shuffle, I intend to fix this in a followup patch for review.

Differential Revision: http://reviews.llvm.org/D16537

llvm-svn: 260834
2016-02-13 21:54:04 +00:00
Craig Topper f730a6bedc Remove Proc feature flags for X86 processors that are used to inherit features from one processor to another. This exposed extra features to the -mattr command line that we shouldn't. Replace with just inherited listconcats.
llvm-svn: 260832
2016-02-13 21:35:37 +00:00
Craig Topper bcdb0f2ede [TableGen] Fix comment about 64-bit type I missed when I removed the underlying type in r260808.
llvm-svn: 260830
2016-02-13 17:58:14 +00:00
Kostya Serebryany 8a5bef0fcf [libFuzzer] remove std::vector operations from hot paths, NFC
llvm-svn: 260829
2016-02-13 17:56:51 +00:00
Sanjay Patel e9bf993cee [x86-64] allow mfence even with -mno-sse (PR23203)
As shown in:
https://llvm.org/bugs/show_bug.cgi?id=23203
...we currently die because lowering believes that mfence is allowed without SSE2 on x86-64,
but the instruction def doesn't know that.

I don't know if allowing mfence without SSE is right, but if not, at least now it's consistently wrong. :)

Differential Revision: http://reviews.llvm.org/D17219

llvm-svn: 260828
2016-02-13 17:26:29 +00:00
Benjamin Kramer 4b36616af3 [APInt] No need for a copy when taking min/max of an APInt.
llvm-svn: 260827
2016-02-13 17:23:27 +00:00
Benjamin Kramer 8f59adb217 [ConstantFolding] Reduce APInt and APFloat copying.
llvm-svn: 260826
2016-02-13 16:54:14 +00:00
Benjamin Kramer 7f75e9403d [AggressiveAntiDepBreaker] Skip some unnecessary BitVector copies.
llvm-svn: 260825
2016-02-13 16:39:39 +00:00
Benjamin Kramer 8a752e316d Use ArrayRef to hide SmallVector details, kill a useless vector copy along the way.
llvm-svn: 260824
2016-02-13 16:01:12 +00:00
Krzysztof Parzyszek 280a50ebb9 [Hexagon] Replace use of "std::map::emplace" with "insert"
Gcc 4.7.2-4 does not seem to have "emplace" in its implementation of map.
This should fix the build failure on polly-amd64-linux.

llvm-svn: 260816
2016-02-13 14:06:01 +00:00
Chandler Carruth 632d208c78 [attrs] Move the norecurse deduction to operate on the node set rather
than the SCC object, and have it scan the instruction stream directly
rather than relying on call records.

This makes the behavior of this routine consistent between libc routines
and LLVM intrinsics for libc routines. We can go and start teaching it
about those being norecurse, but we should behave the same for the
intrinsic and the libc routine rather than differently. I chatted with
James Molloy and the inconsistency doesn't seem intentional and likely
is due to intrinsic calls not being modelled in the call graph analyses.

This also fixes a bug where we would deduce norecurse on optnone
functions, when generally we try to handle optnone functions as-if they
were replaceable and thus unanalyzable.

llvm-svn: 260813
2016-02-13 08:47:51 +00:00
NAKAMURA Takumi c2cc8706dd HexagonFrameLowering.cpp: Appease msc18 to give an explicit constructor SlotInfo() instead of member initializers.
llvm-svn: 260812
2016-02-13 07:29:49 +00:00
Kostya Serebryany 1deb0498f5 [libFuzzer] don't require seed in fuzzer::Mutate, instead use the global Fuzzer object for fuzzer::Mutate. This makes custom mutators fast
llvm-svn: 260810
2016-02-13 06:24:18 +00:00
Craig Topper 29c55dcbde [TableGen] Use range-based for loops. NFC
llvm-svn: 260809
2016-02-13 06:03:32 +00:00
Craig Topper 2d45c1df3d No need to make the subtarget feature bit enum a uint64_t. This was a leftover from when the feature bit enum contained masks instead of bit indices.
llvm-svn: 260808
2016-02-13 06:03:29 +00:00
Matthias Braun bbb528f189 LiveIntervalAnalysis: Remove LiveVariables requirement
This requirement was a huge hack to keep LiveVariables alive because it
was optionally used by TwoAddressInstructionPass and PHIElimination.
However we have AnalysisUsage::addUsedIfAvailable() which we can use in
those passes.

llvm-svn: 260806
2016-02-13 04:35:31 +00:00