difference from generic x86 is the defines. The rest is non-trivial to
implement.
I'm not planning on adding any more targets myself; if there are any
targets anyone is currently using that are missing, feel free to add
them, or ask me to add them.
This concludes the work I'm planning for the TargetInfo
implementations at the moment; all the other issues with TargetInfo require
some API changes, and I haven't really thought it through. Some of the
remaining issues: allowing targets to define size_t and wchar_t properly,
adding some sort of __builtin_type_info intrinsic so we can finish clang's
limits.h and float.h and get rid of a massive number of macro
definitions, allowing target-specific command-line options, allowing
target-specific defaults for certain command-line options like
-fms-extensions, exposing vector alignment outside of the description
string, exposing endianness outside of the description string, allowing
targets to expose special bit-field layout requirements, exposing some
sort of custom hook for call generation in CodeGen, and adding CPU
selection to control defines like __SSE__.
llvm-svn: 55098
This approach allows adding OS-specific targets/defines/etc. without
completely breaking unknown subtargets. No new subtargets yet, although
I plan to add x86-Linux soon. Others can add targets that they use as
needed; adding a new subtarget takes very little code.
Also does some fixups for description strings; a lot of them were
unspecified. I think all the ones I added are correct, but
they're unverified; corrections are welcome.
llvm-svn: 55091
out of X86ISelDAGToDAG.cpp C++ code and into tablegen code.
Among other things, using tablegen for these things makes them
friendlier to FastISel.
Tablegen can handle the case of i8 subregs on x86-32, but currently
the C++ code for that case uses MVT::Flag in a tricky way, and it
happens to schedule better in some cases. So for now, leave the
C++ code in place to handle the i8 case on x86-32.
llvm-svn: 55078
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
llvm-svn: 55076
cleaned it up a bit, including fixing the definition of va_list; this
shouldn't break anything, but anyone using Sparc should watch for
regressions.
llvm-svn: 55041
- UsualUnaryConversions takes an Expr *& and may modify its argument,
this broke when it was refactored into Sema::CheckCastTypes. This
meant that we were missing implicit casts in some places.
- Seems pretty sad that this got through our tests.
llvm-svn: 55039
Daniel Dunbar