Anton Korobeynikov
6dbdfe2baa
Factor out GVRequiresExtraLoad() from .h to .cpp
...
llvm-svn: 32048
2006-11-30 22:42:55 +00:00
Evan Cheng
ae1cd75af7
- Use a different wrapper node for RIP-relative GV, etc.
...
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.
llvm-svn: 32046
2006-11-30 21:55:46 +00:00
Evan Cheng
aafeaef8c8
MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
...
llvm-svn: 32034
2006-11-30 07:12:03 +00:00
Evan Cheng
7a9238c84d
In PIC mode, GV not requiring an extra load can be used as address immediate.
...
llvm-svn: 32028
2006-11-29 23:48:14 +00:00
Evan Cheng
8c84c7cd0d
Clean up.
...
llvm-svn: 32027
2006-11-29 23:46:27 +00:00
Evan Cheng
0b1692216d
Fix for PR1018 - Better support for X86-64 Linux in small code model.
...
llvm-svn: 32026
2006-11-29 23:19:46 +00:00
Evan Cheng
28a9e9b230
Custom lower READCYCLECOUNTER for x86-64.
...
llvm-svn: 32017
2006-11-29 08:28:13 +00:00
Evan Cheng
8facb43593
16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman.
...
llvm-svn: 32004
2006-11-29 02:00:40 +00:00
Chris Lattner
38084725a2
Upgrade the ugly darwin 64-bit bswap idiom (bswap %eax / bswap %edx /
...
xchgl %eax, %edx) to llvm.bswap.i64. This compiles:
long long test2(long long A) {
return _OSSwapInt64(A);
}
to:
_test2:
movl 8(%esp), %eax
movl 4(%esp), %edx
bswapl %eax
bswapl %edx
ret
instead of:
_test2:
movl 8(%esp), %edx
movl 4(%esp), %eax
bswap %eax
bswap %edx
xchgl %eax, %edx
ret
GCC manages (with -fomit-frame-pointer) the uglier:
_test2:
subl $4, %esp
movl 8(%esp), %eax
movl 12(%esp), %edx
bswap %eax
bswap %edx
xchgl %eax, %edx
addl $4, %esp
ret
llvm-svn: 32001
2006-11-29 01:48:01 +00:00
Chris Lattner
0fc6ae0c3d
Trivially lower 'bswap $0' into llvm.bswap. This fixes hexxagon with the
...
JIT on darwin/x86, which has htonl implemented as inline asm.
llvm-svn: 31999
2006-11-29 01:14:06 +00:00
Andrew Lenharth
f52ae7ec72
Identities are default now
...
llvm-svn: 31980
2006-11-28 22:28:08 +00:00
Evan Cheng
69b1825488
New entries.
...
llvm-svn: 31976
2006-11-28 19:59:25 +00:00
Andrew Lenharth
2675e23a7e
X86 asm -> gcc asm translation table (incomplete)
...
llvm-svn: 31973
2006-11-28 19:52:49 +00:00
Evan Cheng
8ddbdc70b7
Fix JIT encoding bugs for shift / rotate by one ops.
...
llvm-svn: 31952
2006-11-28 01:28:00 +00:00
Evan Cheng
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Anton Korobeynikov
5b96cdebb0
Refactored *GVRequiresExtraLoad() to Subtarget method.
...
llvm-svn: 31887
2006-11-21 00:01:06 +00:00
Chris Lattner
3e96211bc8
Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit
...
features autodetected. This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.
llvm-svn: 31879
2006-11-20 18:16:05 +00:00
Anton Korobeynikov
37d080b11d
We should perform extra load for dllimported calls
...
llvm-svn: 31874
2006-11-20 10:46:14 +00:00
Evan Cheng
9e8093ae20
For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while
...
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.
llvm-svn: 31832
2006-11-17 22:10:14 +00:00
Jim Laskey
de5fa025ab
Hopefully a good crack at making debugging work on intel -disable-fp-elim.
...
llvm-svn: 31830
2006-11-17 21:19:15 +00:00
Bill Wendling
c8e81b8d48
Removed even more std::cerr and #include <iostream> things.
...
llvm-svn: 31813
2006-11-17 07:52:03 +00:00
Evan Cheng
572dc9cb4e
Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
...
llvm-svn: 31795
2006-11-16 23:33:25 +00:00
Evan Cheng
7ae482c52a
Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.
...
llvm-svn: 31794
2006-11-16 23:22:26 +00:00
Evan Cheng
c5e769710e
Align stubs on 4 byte boundary. This fixes 447.dealII.
...
llvm-svn: 31790
2006-11-16 20:13:34 +00:00
Evan Cheng
dc2c8748a7
Properly transfer kill / dead info.
...
llvm-svn: 31765
2006-11-15 20:58:11 +00:00
Evan Cheng
bbbcac39e6
Kill / dead info has been moved to MI's.
...
llvm-svn: 31764
2006-11-15 20:56:39 +00:00
Chris Lattner
60c2a0154a
Remove unneeded forward decls
...
llvm-svn: 31754
2006-11-15 17:53:13 +00:00
Evan Cheng
cf772f7eca
Revert. This wasn't meant to be checked in.
...
llvm-svn: 31737
2006-11-14 19:20:33 +00:00
Chris Lattner
4916acbd0f
it would be nice of ctlz were lowered to bsf etc.
...
llvm-svn: 31730
2006-11-14 08:08:46 +00:00
Evan Cheng
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Evan Cheng
db04c958a5
Add implicit use / def operands to created MI's.
...
llvm-svn: 31676
2006-11-11 10:21:44 +00:00
Evan Cheng
a36cdcfaf8
Add all implicit defs to FP_REG_KILL mi.
...
llvm-svn: 31674
2006-11-11 07:19:36 +00:00
Evan Cheng
915026cdc3
Add a note.
...
llvm-svn: 31650
2006-11-10 22:09:17 +00:00
Evan Cheng
5b725a71a9
These are done.
...
llvm-svn: 31649
2006-11-10 22:03:35 +00:00
Evan Cheng
49683ba236
Don't dag combine floating point select to max and min intrinsics. Those
...
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.
This fixes PR996.
llvm-svn: 31645
2006-11-10 21:43:37 +00:00
Evan Cheng
fb44822a98
Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a
...
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.
llvm-svn: 31641
2006-11-10 21:23:04 +00:00
Evan Cheng
286357480c
Fix a potential bug.
...
llvm-svn: 31634
2006-11-10 09:13:37 +00:00
Evan Cheng
8c9c6d71ed
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
Evan Cheng
14140059f0
Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
...
llvm-svn: 31616
2006-11-10 01:28:43 +00:00
Anton Korobeynikov
b9c91c265c
Fixing PR990: http://llvm.org/PR990 .
...
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).
llvm-svn: 31613
2006-11-10 00:48:11 +00:00
Evan Cheng
1698c2999c
Remove M_2_ADDR_FLAG.
...
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
Evan Cheng
3b3b786f03
Use movl+xchgl instead of pushl+popl.
...
llvm-svn: 31572
2006-11-08 20:35:37 +00:00
Evan Cheng
6cd0909da7
Match tblegen changes.
...
llvm-svn: 31571
2006-11-08 20:34:28 +00:00
Evan Cheng
922e191116
Fixed a bug which causes x86 be to incorrectly match
...
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.
Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>
llvm-svn: 31519
2006-11-07 22:14:24 +00:00
Jeff Cohen
7d6f3db3e2
Unbreak VC++ build.
...
llvm-svn: 31464
2006-11-05 19:31:28 +00:00
Chris Lattner
9ac6442db6
remove dead/redundant vars
...
llvm-svn: 31435
2006-11-03 23:48:56 +00:00
Evan Cheng
94b29e9e91
Dead code.
...
llvm-svn: 31405
2006-11-03 02:08:41 +00:00
Chris Lattner
de2f0906e4
silence warning
...
llvm-svn: 31393
2006-11-03 01:13:15 +00:00
Reid Spencer
de46e48420
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
llvm-svn: 31380
2006-11-02 20:25:50 +00:00
Evan Cheng
94e5bc9e83
Fix ldmxcsr JIT encoding.
...
llvm-svn: 31343
2006-11-01 06:53:52 +00:00