Commit Graph

287280 Commits

Author SHA1 Message Date
Craig Topper 298e1712d8 [X86] Add test case for llvm change r329734
This test ensures the popfd instruction in MS inline assembly can properly find a clobber name for the dirflag register. Previously the register was named 'DF', but it needs to be named 'dirflag' to match the name in the GCC register name list.

llvm-svn: 329738
2018-04-10 18:43:44 +00:00
Artem Belevich dde3dc27ee [CUDA] Added --[no-]cuda-include-ptx=sm_XX|all option.
Currently we always include PTX into the fatbin along
with the GPU code.It about doubles the size of the GPU binary
we need to carry in the executable. These options allow control
inclusion of PTX into GPU binary.

This patch does not change the defaults, though we may consider
making no-PTX the default in the future.

Differential Revision: https://reviews.llvm.org/D45495

llvm-svn: 329737
2018-04-10 18:38:22 +00:00
Sanjay Patel 5da361a0b0 [InstSimplify] fix formatting; NFC
llvm-svn: 329736
2018-04-10 18:38:19 +00:00
Volodymyr Sapsai 9f7b5cc073 [Parser] Fix assertion-on-invalid for unexpected typename.
In `ParseDeclarationSpecifiers` for the code

    class A typename A;

we were able to annotate token `kw_typename` because it refers to
existing type. But later during processing token `annot_typename` we
failed to `SetTypeSpecType` and exited switch statement leaving
annotation token unconsumed. The code after the switch statement failed
because it didn't expect a special token.

The fix is not to assume that switch statement consumes all special
tokens and consume any token, not just non-special.

rdar://problem/37099386

Reviewers: rsmith, arphaman

Reviewed By: rsmith

Subscribers: jkorous-apple, cfe-commits

Differential Revision: https://reviews.llvm.org/D44449

llvm-svn: 329735
2018-04-10 18:29:47 +00:00
Craig Topper 442428540a [X86] Change the name string for the newly add DF flag register to 'dirflag' to match the clobber name supported by clang for MS inline assembly.
This should fix the failure found by Chromium reported here https://bugs.chromium.org/p/chromium/issues/detail?id=831158

The test case will be added in clang.

llvm-svn: 329734
2018-04-10 18:21:04 +00:00
Aaron Smith 860f0a5dd8 [DebugInfoPDB] Add missing test for findSymbolByRVA and findSymbolByAddr
llvm-svn: 329733
2018-04-10 18:12:49 +00:00
Sanjay Patel 40ad9262bc [llvm-mca] reorder text
On 2nd reading, putting the C example after the bit about
multiple regions makes this flow better.

llvm-svn: 329732
2018-04-10 18:10:14 +00:00
Robert Widmann 58568254bc [LLVM-C] Add Missing 'break's in InlineAsm bindings
Summary: Noticed by Andrea Di Biagio while reviewing r329369

Reviewers: whitequark, harlanhaskins

Reviewed By: harlanhaskins

Subscribers: llvm-commits, abergmeier-dsfishlabs

Differential Revision: https://reviews.llvm.org/D45496

llvm-svn: 329731
2018-04-10 18:10:10 +00:00
Zinovy Nis e68c7fa1e5 [clang-tidy] [modernize-use-auto] Add a threshold for minimal type name length to be replaced with 'auto'
The threshold option is 'MinTypeNameLength' with default value '5'. 
With MinTypeNameLength == 5 'int'/'bool' and 'const int'/'const bool' 
will not be converted to 'auto', while 'unsigned' will be. 

Differential Revision: https://reviews.llvm.org/D45405

llvm-svn: 329730
2018-04-10 18:05:24 +00:00
Sanjay Patel e3a59e2e91 [llvm-mca] fix formatting
llvm-svn: 329729
2018-04-10 17:56:24 +00:00
Jessica Paquette c140bbddaf Revert 329716 "Add missing nullptr check before getSection() to AArch64MachObjectWriter::recordRelocation"
This broke a bunch of bots so I'm reverting while I figure it out.

llvm-svn: 329728
2018-04-10 17:53:41 +00:00
Jim Ingham 7a048da40c Fix a typo in the gtest build target for Debug configuration.
I usually run DebugClang...

llvm-svn: 329727
2018-04-10 17:49:56 +00:00
Sanjay Patel c86033a55a [llvm-mca] add example workflow for source code
This is copied from Andrea's text in PR36875:
https://bugs.llvm.org/show_bug.cgi?id=36875

As noted there, this is a hack...but it's a good one!
It's important to show potential workflows up-front
with examples, so customers can copy and experiment
with them.

llvm-svn: 329726
2018-04-10 17:49:45 +00:00
Marc-Andre Laperle 90a937e3e1 [clangd] Use operator<< to prevent printers issues in Gtest
Summary:
It is possible that there will be two different instantiations of
the printer template for a given type and some tests could end up calling the
wrong (default) one. For example, it was seen in CodeCompleteTests.cpp when
printing CompletionItems that it would use the wrong printer because the default
is also instantiated in ClangdTests.cpp.

With this change, objects that were previously printed with a custom Printer now
get printed through the operator<< which is declared alongside the class.
This rule of the thumb should make it less error-prone.

Reviewers: simark, ilya-biryukov, sammccall

Reviewed By: simark, ilya-biryukov, sammccall

Subscribers: bkramer, hokein, sammccall, klimek, ilya-biryukov, jkorous-apple, ioeric, MaskRay, cfe-commits

Differential Revision: https://reviews.llvm.org/D44764

llvm-svn: 329725
2018-04-10 17:34:46 +00:00
Aaron Smith 3dca0bedbb [DebugInfoPDB] Add DIA implementations of findSymbolByRVA and findSymbolByAddr
llvm-svn: 329724
2018-04-10 17:33:18 +00:00
Jessica Paquette cda4add21b Fix test failure in arm64-no-section.ll
There was a missing not line. Also, tail call before ret -> call before ret.

llvm-svn: 329723
2018-04-10 17:32:12 +00:00
Jim Ingham 8c7121b3a6 Fix the Xcode build for the addition of OptionArgsParser.
llvm-svn: 329722
2018-04-10 17:20:27 +00:00
Julie Hockett 8c1ee67c3f [clang-tidy] Adding alias for anon namespaces in header (fuchsia module)
Adding alias to google-build-namespaces to the Fuchsia module (checks
for anonymous namespaces in headers).

Differential Revision: https://reviews.llvm.org/D45447

llvm-svn: 329720
2018-04-10 16:53:51 +00:00
Krzysztof Parzyszek 71a4c0ca07 [CodeGen] Fix printing bundles in MIR output
Delay printing the newline until after the opening bracket was
printed, e.g.
  BUNDLE implicit-def $r1, implicit-def $r21, implicit $r1 {
    renamable $r1 = S2_asr_i_r renamable $r1, 1
    renamable $r21 = A2_tfrsi 0
  }
instead of
  BUNDLE implicit-def $r1, implicit-def $r21, implicit $r1
 {    renamable $r1 = S2_asr_i_r renamable $r1, 1
    renamable $r21 = A2_tfrsi 0
  }

llvm-svn: 329719
2018-04-10 16:46:13 +00:00
Peter Collingbourne a7d936f0c0 Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF."
Caused a build failure in check-tsan.

llvm-svn: 329718
2018-04-10 16:19:30 +00:00
Sam Clegg 80ba43872e [WebAssembly] Add support for custom sections
Copy user-defined custom sections into the output, concatenating
sections with the same name.

Differential Revision: https://reviews.llvm.org/D45340

llvm-svn: 329717
2018-04-10 16:12:49 +00:00
Jessica Paquette e4b90d82a0 Add missing nullptr check to AArch64MachObjectWriter::recordRelocation
There was missing nullptr check before a call to getSection() in
recordRelocation. This would result in a segfault in code like the attached
test.

This adds the missing check and a test which makes sure we get the expected 
error output.

llvm-svn: 329716
2018-04-10 15:53:28 +00:00
Nicolai Haehnle b1c3b22b4c AMDGPU/MC: Allow disassembling without symbol info
Summary:
We would like the UMR debugging tool[0] to be able to provide
disassembly for currently live waves based on plain memory
dumps, and we want to leverage the LLVM disassembler for this.

This mostly works, except that UMR clearly can't provide real
symbol info, so it wants to set DisInfo == nullptr.

[0] https://cgit.freedesktop.org/amd/umr/

Reviewers: arsenm, rampitec, artem.tamazov, dp

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45477

Change-Id: Ibb2c5af2e66f2e100b4702fd81308e1932bc4ee6
llvm-svn: 329715
2018-04-10 15:46:43 +00:00
Andrew V. Tischenko 38cd74b1c1 I removed the failed test.
llvm-svn: 329714
2018-04-10 15:45:43 +00:00
Guansong Zhang f679431f91 [OpenMP] Remove extra warning when we build
Summary:
This one line change is to remove this warning message

"warning: integer conversion resulted in a change of sign"

Reviewers: grokos

Reviewed By: grokos

Subscribers: openmp-commits

Tags: #openmp

Differential Revision: https://reviews.llvm.org/D45415

llvm-svn: 329713
2018-04-10 15:28:31 +00:00
Aaron Smith c0a5c01aeb [PDB] Remove dead code and run clang format; NFC
llvm-svn: 329712
2018-04-10 15:25:04 +00:00
Andrea Di Biagio b8800b025b [llvm-mca] Simplify code. NFC
llvm-svn: 329711
2018-04-10 15:14:15 +00:00
Gabor Buella 5966507c4e [X86] Disable SGX for Skylake Server - CPP test
Summary: Fix test case - corresponding to r329701

Reviewers: craig.topper, davezarzycki

Reviewed By: davezarzycki

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45488

llvm-svn: 329710
2018-04-10 15:03:03 +00:00
Chad Rosier af7519e9af Fix spelling. NFC.
llvm-svn: 329709
2018-04-10 14:57:13 +00:00
Andrea Di Biagio 821f650bba [llvm-mca] Move the logic that prints dispatch unit statistics from BackendStatistics to its own view.
This patch moves the logic that collects and analyzes dispatch events to the
DispatchStatistics view.

Added flag -dispatch-stats to print statistics related to the dispatch logic.

llvm-svn: 329708
2018-04-10 14:55:14 +00:00
Aaron Smith 13cb6be05a [pdbutil] Print the checksum hex string when using the '-lines' option
llvm-svn: 329707
2018-04-10 14:47:12 +00:00
Kostya Kortchinsky 141139e695 [sanitizer] Allow BackgroundThread to not depend on StackDepot v2
Summary:
This is a redo of D45296.
It looks like the random stack-protector issues I was getting were coming from
my Android emulator, and updating everything all around and relaunching stuff
ended up making it go away.
I guess I'll have to see how it behaves on the bots.
Only additional change from the previous CL is some `const` were appropriate.

Reviewers: alekseyshl

Reviewed By: alekseyshl

Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D45461

llvm-svn: 329706
2018-04-10 14:41:40 +00:00
Pavel Labath b7243ed2f4 [CodeGen/Dwarf] Rename the "sizetype" synthetic type and add it to the accelerator table
Summary:
This type is created on-demand and used as the base type for array
ranges. Since it is "special", its construction did not go through the
createTypeDIE function and so it was never inserted into the accelerator
table, although it clearly belongs there.

I add an explicit addAccelType call to insert it into the table.

During review, we also decided to rename the type to something more
unique to avoid confusion in case the user has own "sizetype" type. The
new name for the type size __ARRAY_SIZE_TYPE__.

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45445

llvm-svn: 329705
2018-04-10 14:23:41 +00:00
Simon Pilgrim 95f941117c Fix whitespace indentation. NFCI.
llvm-svn: 329704
2018-04-10 14:21:33 +00:00
Pavel Labath 397e150ddc [Testing/Support] Make Failed() matcher work with abstract error types
Failed<ErrorInfoBase>() did not compile, because it was attempting to
create a copy of the Error object when passing it to the nested matcher,
which was not possible because ErrorInfoBase is abstract.

This commit fixes the problem by making sure we pass the ErrorInfo
object by reference, which also improves the handling of non-abstract
objects, as we avoid potentially slicing an object during the copy.

llvm-svn: 329703
2018-04-10 14:11:53 +00:00
Nico Weber a3e7510a4c Attempt to fix Windows build after r329698.
llvm-svn: 329702
2018-04-10 14:08:25 +00:00
Gabor Buella e3330c1b61 [X86] Disable SGX for Skylake Server
Reviewers: craig.topper, zvi, echristo

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45058

llvm-svn: 329701
2018-04-10 14:04:21 +00:00
Gabor Buella 3eab22d896 [X86] Disable SGX for Skylake Server
Reviewers: craig.topper, zvi, echristo

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45057

llvm-svn: 329700
2018-04-10 13:58:57 +00:00
Nico Weber 148c8cb4bf Use llvm::sys::fs::real_path() in clang.
No expected behavior change.
https://reviews.llvm.org/D45165

llvm-svn: 329698
2018-04-10 13:36:38 +00:00
Nico Weber b1cb0b7957 s/LLVM_ON_WIN32/_WIN32/, lldb
LLVM_ON_WIN32 is set exactly with MSVC and MinGW (but not Cygwin) in            
HandleLLVMOptions.cmake, which is where _WIN32 defined too.  Just use the        
default macro instead of a reinvented one.                                      
                                                                                
See thread "Replacing LLVM_ON_WIN32 with just _WIN32" on llvm-dev and cfe-dev.  
No intended behavior change.

llvm-svn: 329697
2018-04-10 13:33:45 +00:00
Nico Weber fb64730005 s/LLVM_ON_WIN32/_WIN32/, lld
LLVM_ON_WIN32 is set exactly with MSVC and MinGW (but not Cygwin) in             
HandleLLVMOptions.cmake, which is where _WIN32 defined too.  Just use the        
default macro instead of a reinvented one.                                       
                                                                                 
See thread "Replacing LLVM_ON_WIN32 with just _WIN32" on llvm-dev and cfe-dev.   
No intended behavior change. 

llvm-svn: 329696
2018-04-10 13:15:21 +00:00
Nico Weber 0da2290958 s/LLVM_ON_WIN32/_WIN32/, clang-tools-extra
LLVM_ON_WIN32 is set exactly with MSVC and MinGW (but not Cygwin) in
HandleLLVMOptions.cmake, which is where _WIN32 defined too.  Just use the
default macro instead of a reinvented one.

See thread "Replacing LLVM_ON_WIN32 with just _WIN32" on llvm-dev and cfe-dev.
No intended behavior change.

llvm-svn: 329695
2018-04-10 13:14:03 +00:00
Andrea Di Biagio 074cef3dfb [llvm-mca] Increase the default number of iterations to 100.
llvm-svn: 329694
2018-04-10 12:50:03 +00:00
Andrew V. Tischenko 23b8bd1220 The test was fixed.
llvm-svn: 329693
2018-04-10 12:17:01 +00:00
David Green 5ef933b02c [DA] Improve alias checking in dependence analysis
Improve the alias analysis to account for cases where we
know that src/dst pairs cannot alias due to things like
TBAA. As we know they are noalias, we know no dependency
can occur. Also fixes issues around the size parameter
to AA being incorrect.

Differential Revision: https://reviews.llvm.org/D42381

llvm-svn: 329692
2018-04-10 11:37:21 +00:00
Francis Visoiu Mistrih f2c22050e8 [AArch64] Use FP to access the emergency spill slot
In the presence of variable-sized stack objects, we always picked the
base pointer when resolving frame indices if it was available.

This makes us hit an assert where we can't reach the emergency spill
slot if it's too far away from the base pointer. Since on AArch64 we
decide to place the emergency spill slot at the top of the frame, it
makes more sense to use FP to access it.

The changes here don't affect only emergency spill slots but all the
frame indices. The goal here is to try to choose between FP, BP and SP
so that we minimize the offset and avoid scavenging, or worse, asserting
when trying to access a slot allocated by the scavenger.

Previously discussed here: https://reviews.llvm.org/D40876.

Differential Revision: https://reviews.llvm.org/D45358

llvm-svn: 329691
2018-04-10 11:29:40 +00:00
Tim Renouf 7190a4692a [AMDGPU] For OS type AMDPAL, fixed scratch on compute shader
Summary:
For OS type AMDPAL, the scratch descriptor is loaded from offset 0 of
the GIT, whose 32 bit pointer is in s0 (s8 for gfx9 merged shaders).

This commit fixes that to use offset 0x10 instead of offset 0 for a
compute shader, per the PAL ABI spec.

V2: Ensure s0 (s8 for gfx9 merged shader) is marked live-in when loading
scratch descriptor from GIT.

Reviewers: kzhuravl, nhaehnle, timcorringham

Subscribers: kzhuravl, wdng, yaxunl, t-tye, llvm-commits, dstuttard, nhaehnle, arsenm

Differential Revision: https://reviews.llvm.org/D44468

Change-Id: I93dffa647758e37f613bb5e0dfca840d82e6d26f
llvm-svn: 329690
2018-04-10 11:25:15 +00:00
Gabor Buella 58fe46d99f CodeGen tests - typo fixes NFC
llvm-svn: 329689
2018-04-10 11:20:05 +00:00
Simon Dardis dfee530748 [compiler-rt][asan][mips] UnXFAIL some consistently passing tests
llvm-svn: 329688
2018-04-10 11:09:17 +00:00
Tim Northover 6a1c51bf6b AArch64: diagnose unpredictable store-exclusive instructions
Much like any written register in load/store instructions, the status register
is not allowed to overlap with any others. So diagnose it like we already do
with the other cases.

llvm-svn: 329687
2018-04-10 11:04:29 +00:00