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94 Commits

Author SHA1 Message Date
David Goodwin b9fe5d5d02 Allow target to specify regclass for which antideps will only be broken along the critical path. 
llvm-svn: 88682
 2009-11-13 19:52:48 +00:00
David Goodwin da83f7d58b Rename registers to break output dependencies in addition to anti-dependencies. 
llvm-svn: 87015
 2009-11-12 19:08:21 +00:00
David Goodwin 0d412c2528 Fixed to address code review. No functional changes. 
llvm-svn: 86634
 2009-11-10 00:48:55 +00:00
David Goodwin cf89db135e Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies. 
llvm-svn: 86628
 2009-11-10 00:15:47 +00:00
David Goodwin 7d8878add2 Break anti-dependencies using free registers in a round-robin manner to avoid introducing new anti-dependencies. 
llvm-svn: 86098
 2009-11-05 01:19:35 +00:00
David Goodwin 8501dbbe10 Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed. 
llvm-svn: 85939
 2009-11-03 20:57:50 +00:00
Dan Gohman 34341e69c4 Make -print-machineinstrs more readable. 
- Be consistent when referring to MachineBasicBlocks: BB#0.
 - Be consistent when referring to virtual registers: %reg1024.
 - Be consistent when referring to unknown physical registers: %physreg10.
 - Be consistent when referring to known physical registers: %RAX
 - Be consistent when referring to register 0: %reg0
 - Be consistent when printing alignments: align=16
 - Print jump table contents.
 - Don't print host addresses, in general.
 - and various other cleanups.

llvm-svn: 85682
 2009-10-31 20:19:03 +00:00
David Goodwin e30ed53c05 Make AntiDepReg.h internal. 
llvm-svn: 85412
 2009-10-28 18:29:54 +00:00
David Goodwin e056d1077e Allow the aggressive anti-dep breaker to process the same region multiple times. This is necessary because new anti-dependencies are exposed when "current" ones are broken. 
llvm-svn: 85166
 2009-10-26 22:31:16 +00:00
David Goodwin 661ea989e9 Define virtual destructor in *.cpp file. 
llvm-svn: 85146
 2009-10-26 19:41:00 +00:00
David Goodwin de11f36ab7 Add aggressive anti-dependence breaker. Currently it is not the default for any target. Enable with -break-anti-dependencies=all. 
llvm-svn: 85145
 2009-10-26 19:32:42 +00:00
David Goodwin 8370485db9 Break anti-dependence breaking out into its own class. 
llvm-svn: 85127
 2009-10-26 16:59:04 +00:00
Nick Lewycky 974e12b2d3 Remove includes of Support/Compiler.h that are no longer needed after the 
VISIBILITY_HIDDEN removal.

llvm-svn: 85043
 2009-10-25 06:57:41 +00:00
Nick Lewycky 02d5f77d26 Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. 
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.

llvm-svn: 85042
 2009-10-25 06:33:48 +00:00
David Goodwin 02ad4cb32e Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none. 
llvm-svn: 84911
 2009-10-22 23:19:17 +00:00
Dan Gohman 682a2d154a Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail. 
llvm-svn: 84727
 2009-10-21 01:44:44 +00:00
David Goodwin 4388beb884 Respect src register allocation requirements when breaking anti-dependencies. Remove some dead code. 
llvm-svn: 84691
 2009-10-20 22:50:43 +00:00
David Goodwin baf6dd26ea Checkpoint more aggressive anti-dependency breaking for post-ra scheduler. 
llvm-svn: 84658
 2009-10-20 19:54:44 +00:00
Evan Cheng 007ceb4603 Change createPostRAScheduler so it can be turned off at llc -O1. 
llvm-svn: 84273
 2009-10-16 21:06:15 +00:00
Evan Cheng 8b614768f8 If post-alloc scheduler is not enabled, it should return false, not true. 
llvm-svn: 84248
 2009-10-16 06:10:34 +00:00
David Goodwin 4c98efb917 Add debugging output. 
llvm-svn: 84011
 2009-10-13 19:16:03 +00:00
Dan Gohman 26e9b89b7c Fix a missing initialization of PostRAScheduler's AA member. 
llvm-svn: 83695
 2009-10-10 00:15:38 +00:00
Dan Gohman 87b02d5bbc Factor out LiveIntervalAnalysis' code to determine whether an instruction 
is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.

This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.

llvm-svn: 83687
 2009-10-09 23:27:56 +00:00
Benjamin Kramer 3b008a3a65 Fix a use-after-free in post-ra-scheduling. 
MI->addOperand invalidates references to it's operands, avoid touching
the operand after a new one was added.

llvm-svn: 83249
 2009-10-02 15:59:52 +00:00
David Goodwin d725159d9d All callee-saved registers are live-out of a return block. 
llvm-svn: 83223
 2009-10-01 23:28:47 +00:00
David Goodwin 1cc6dd97da Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default. 
llvm-svn: 83218
 2009-10-01 22:19:57 +00:00
David Goodwin 9a051a5922 Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. 
llvm-svn: 83215
 2009-10-01 21:46:35 +00:00
David Goodwin be3039e776 Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup. 
llvm-svn: 83208
 2009-10-01 19:45:32 +00:00
Evan Cheng 4fb2891396 Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change 
operands of instructions with these properties while breaking anti-dep.

llvm-svn: 83198
 2009-10-01 08:26:23 +00:00
Reid Kleckner 8ff5c19ebd Fix integer overflow in instruction scheduling. This can happen if we have 
basic blocks that are so long that their size overflows a short.

Also assert that overflow does not happen in the future, as requested by Evan.

This fixes PR4401.

llvm-svn: 83159
 2009-09-30 20:15:38 +00:00
David Goodwin 17199b56b0 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. 
llvm-svn: 83122
 2009-09-30 00:10:16 +00:00
Jakob Stoklund Olesen 0bb5af345a Use KILL instead of IMPLICIT_DEF in LowerSubregs pass. 
llvm-svn: 83007
 2009-09-28 20:32:46 +00:00
David Goodwin a4c98a3e34 Fix bug in kill flag updating for post-register-allocation scheduling. When the kill flag of a superreg needs to be cleared because there are one or more subregs live, we instead add implicit-defs of those subregs and leave the kill flag on the superreg. This allows us to end the live-range of the superreg without ending the live-ranges of the subregs. 
llvm-svn: 82629
 2009-09-23 16:35:25 +00:00
Evan Cheng 270d0f986f Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes. 
Not functionality change yet.

llvm-svn: 82273
 2009-09-18 21:02:19 +00:00
Benjamin Kramer e3c9d23bea It's a bool, so treat it like one. Fixes a MSVC warning. 
llvm-svn: 81112
 2009-09-06 12:10:17 +00:00
David Goodwin 6c08cfcfa0 Create our own block initializer for kill fixups as the scheduling one wasn't doing the right thing. 
llvm-svn: 80958
 2009-09-03 22:15:25 +00:00
David Goodwin 7f6516949b Add hidden flags to allow binary search of post-RA scheduling errors. 
llvm-svn: 80702
 2009-09-01 18:34:03 +00:00
David Goodwin c8985204d9 Don't mark a register live at an undef use. 
llvm-svn: 80621
 2009-08-31 20:47:02 +00:00
David Goodwin 7cb103dc8b Another stab at fixing up register kill flags after post-RA scheduling. 
llvm-svn: 80410
 2009-08-29 00:11:13 +00:00
David Goodwin ae6bc8214a Fixup register kills after scheduling. 
llvm-svn: 80002
 2009-08-25 17:03:05 +00:00
Chris Lattner 4883d90396 convert LoopInfo.h and GraphWriter.h to use raw_ostream 
llvm-svn: 79836
 2009-08-23 07:19:13 +00:00
David Goodwin 1f8c7a76f7 Fix counting of Post-RA scheduling stalls. Improve debug output. 
llvm-svn: 78843
 2009-08-12 21:47:46 +00:00
Dan Gohman 2a767c0d26 This logic was accidentally inverted in r78767. 
llvm-svn: 78773
 2009-08-12 01:44:20 +00:00
Dan Gohman f7912edba5 Factor out the code for finding an available register for use 
in breaking an anti-dependence into a separate function.

llvm-svn: 78767
 2009-08-12 01:33:27 +00:00
David Goodwin 92492f2f8e Use DEBUG macro for debug output. 
llvm-svn: 78694
 2009-08-11 17:56:42 +00:00
David Goodwin ebd694bb0a Add some debug output. 
llvm-svn: 78687
 2009-08-11 17:35:23 +00:00
David Goodwin f20236ac83 Replace DOUT. 
llvm-svn: 78634
 2009-08-11 01:44:26 +00:00
David Goodwin 6021b4dccc Post RA scheduler changes. Introduce a hazard recognizer that uses the target schedule information to accurately model the pipeline. Update the scheduler to correctly handle multi-issue targets. 
llvm-svn: 78563
 2009-08-10 15:55:25 +00:00
Dan Gohman 0402315d41 Use setPreservesAll and setPreservesCFG in CodeGen passes. 
llvm-svn: 77754
 2009-07-31 23:37:33 +00:00
Chris Lattner 7667332899 inline the global 'getInstrOperandRegClass' function into its callers 
now that TargetOperandInfo does the heavy lifting.

llvm-svn: 77508
 2009-07-29 21:36:49 +00:00