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301 Commits

Author SHA1 Message Date
Evan Cheng ac8be4338c Remove a duplicate pattern. 
llvm-svn: 29414
 2006-07-31 18:43:10 +00:00
Evan Cheng b572401bea Remove InFlightSet hack. No longer needed. 
llvm-svn: 29373
 2006-07-28 00:47:19 +00:00
Evan Cheng f300896420 Remove NodeDepth 
llvm-svn: 29338
 2006-07-27 06:40:15 +00:00
Jim Laskey f7300b2706 It was pointed out that DEBUG() is only available with -debug. 
llvm-svn: 29106
 2006-07-11 18:25:13 +00:00
Jim Laskey c3d341ea98 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.

llvm-svn: 29105
 2006-07-11 17:58:07 +00:00
Chris Lattner f3b5b92e58 Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Evan Cheng a3add0fea8 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Evan Cheng 4af59dac0b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00
Evan Cheng 1a8e74d113 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.

llvm-svn: 28454
 2006-05-24 20:46:25 +00:00
Owen Anderson 88812b5c0a Make all of the TargetMachine subclasses use the new string TargetData methods. 
This is part of the on-going work on PR 761.

llvm-svn: 28414
 2006-05-20 00:24:56 +00:00
Evan Cheng 305c49579c getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng dcec882286 Remove PointerType from class Target 
llvm-svn: 28368
 2006-05-17 21:20:27 +00:00
Andrew Lenharth 1dc9ec5874 Move this code to a common place 
llvm-svn: 28329
 2006-05-16 17:42:15 +00:00
Chris Lattner 768bc20b74 Fix build breakage :( 
llvm-svn: 28267
 2006-05-12 23:26:11 +00:00
Chris Lattner d63ec521c5 Actually override the right method. :) 
Bug identified by coverity.

llvm-svn: 28259
 2006-05-12 18:19:25 +00:00
Owen Anderson 8c2c1e90c4 Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
 2006-05-12 06:33:49 +00:00
Chris Lattner 8488ba2e41 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
llvm-svn: 28184
 2006-05-09 04:59:56 +00:00
Chris Lattner 10b71c0d08 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
llvm-svn: 28104
 2006-05-04 18:05:43 +00:00
Chris Lattner 10d6341618 Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner fef7a2d0f5 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Chris Lattner 940cc978ef Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Chris Lattner 9f6639b64d Remove some more unused stuff from MachineInstr that was leftover from V9. 
llvm-svn: 28091
 2006-05-04 00:44:25 +00:00
Owen Anderson 20a631fde7 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.

llvm-svn: 28074
 2006-05-03 01:29:57 +00:00
Nate Begeman b9d4f8324d Extend printBasicBlockLabel a bit so that it can be used to print all 
basic block labels, consolidating the code to do so in one place for each
target.

llvm-svn: 28050
 2006-05-02 05:37:32 +00:00
Nate Begeman 4ca2ea5b43 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947
 2006-04-22 18:53:45 +00:00
Nate Begeman 3f9c17906f Disable switch lowering for targets based on the selection dag isel, 
letting the code generator handle them directly.

llvm-svn: 27539
 2006-04-08 19:46:55 +00:00
Jim Laskey 2d7298c362 Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Jim Laskey d1aa1638c6 Expose base register for DwarfWriter. Refactor code accordingly. 
llvm-svn: 27225
 2006-03-28 13:48:33 +00:00
Jim Laskey fa53b276d0 Translate llvm target registers to dwarf register numbers properly. 
llvm-svn: 27180
 2006-03-27 20:18:45 +00:00
Chris Lattner 5d70a7c4a5 #include Intrinsics.h into all dag isels 
llvm-svn: 27109
 2006-03-25 06:47:10 +00:00
Jim Laskey f0729b4067 Add dwarf register numbering to register data. 
llvm-svn: 27081
 2006-03-24 21:15:58 +00:00
Jim Laskey 3c43609f1f Add support to locate local variables in frames (early version.) 
llvm-svn: 26994
 2006-03-23 18:12:57 +00:00
Chris Lattner 6f95ab7abb Eliminate IntrinsicLowering from TargetMachine. 
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
 2006-03-23 05:43:16 +00:00
Nate Begeman bb01d4f272 Remove BRTWOWAY* 
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
 2006-03-17 01:40:33 +00:00
Evan Cheng 2dd2c652b2 Added getTargetLowering() to TargetMachine. Refactored targets to support this. 
llvm-svn: 26742
 2006-03-13 23:20:37 +00:00
Chris Lattner e363fdf318 Add support for 'special' llvm globals like debug info and static ctors/dtors. 
llvm-svn: 26628
 2006-03-09 06:14:35 +00:00
Duraid Madina 5005b01c20 doo de doo 
llvm-svn: 26614
 2006-03-08 06:18:46 +00:00
Chris Lattner 9c7f50376a Copysign needs to be expanded everywhere. Note that Alpha and IA64 should 
implement copysign as a native op if they have it.

llvm-svn: 26541
 2006-03-05 05:08:37 +00:00
Duraid Madina 36a2ee299e distinguish between objects and register names, now we can have stuff 
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
 2006-02-16 13:12:57 +00:00
Chris Lattner 62c3484e43 Switch targets over to using SelectionDAG::getCALLSEQ_START to create 
CALLSEQ_START nodes.

llvm-svn: 26143
 2006-02-13 09:00:43 +00:00
Duraid Madina 4698e4f5fe fix storing booleans (grawp missed this one) 
llvm-svn: 26120
 2006-02-11 07:33:17 +00:00
Duraid Madina 0010a92375 now short immediates will get matched (previously constants were all 
triggering movl 64bit imm fat instructions)

llvm-svn: 26119
 2006-02-11 07:32:15 +00:00
Evan Cheng d1b82d8db0 Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
llvm-svn: 26085
 2006-02-09 07:17:49 +00:00
Evan Cheng 6dc90ca172 Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
 2006-02-09 00:37:58 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel. 
llvm-svn: 25997
 2006-02-05 06:46:41 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Chris Lattner 61c9a8e942 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
 2006-01-29 06:26:08 +00:00
Nate Begeman 595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Chris Lattner b292de6703 Remove some dead code 
llvm-svn: 25719
 2006-01-28 00:02:51 +00:00
Nate Begeman 8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Chris Lattner 1240574609 PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Duraid Madina 0ebb0b1c5c fix stack corruption! Previously, 16-byte whole-FP-register stores were 
being treated as needing only 8 bytes (though they were 16 byte aligned.)

This should fix a bunch of tests - anyone have any comments, though?

  - in Target.td , SpillSize and SpillAlignment seem dead - is this what
    Size and Alignment do now?
  - in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
    DeclaredSpillAlignment seem dead.
  - there are a bunch of comments here and there that don't clearly
    distinguish between 'size' and 'spillsize' etc. hmm.

llvm-svn: 25644
 2006-01-26 09:45:03 +00:00
Duraid Madina c090ac13bd some hoovering 
llvm-svn: 25643
 2006-01-26 09:08:31 +00:00
Evan Cheng 030e002fb9 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng 1092a02619 Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Duraid Madina 5ea06a9f13 add bundling! well not really, for now it's just stop-insertion. 
llvm-svn: 25593
 2006-01-25 02:23:38 +00:00
Duraid Madina 37c8ad14f4 die, die!! r15, you are not callee-saved 
llvm-svn: 25527
 2006-01-23 06:11:45 +00:00
Duraid Madina cc87402925 fix register corruption! (my god.) r15 is a scratch reg, using that as 
a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!

llvm-svn: 25526
 2006-01-23 06:08:46 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Duraid Madina 4204e02fc6 insignificant, but next up is proper stack frame layout! 
llvm-svn: 25497
 2006-01-21 14:27:19 +00:00
Duraid Madina f54c9395e7 remove RET hack, add proper support for rets (watching out for ret voids) 
llvm-svn: 25486
 2006-01-20 20:24:31 +00:00
Duraid Madina 4026e12e85 fix sext breakage: now we correctly deal with functions that return 
int vs uint

llvm-svn: 25478
 2006-01-20 16:10:05 +00:00
Duraid Madina 9a8fb20689 fix storing bools! eek! 
llvm-svn: 25476
 2006-01-20 03:40:25 +00:00
Duraid Madina 550d8ec1ad fix boolean XOR (which fixes up comparisons..) 
llvm-svn: 25462
 2006-01-19 15:18:56 +00:00
Duraid Madina 4d69a01254 BOOM! 
llvm-svn: 25460
 2006-01-19 14:14:11 +00:00
Duraid Madina bcbcfac6ea click click 
llvm-svn: 25459
 2006-01-19 14:13:11 +00:00
Duraid Madina 29b9d7cdff fix calls that return f32 
llvm-svn: 25455
 2006-01-19 08:31:51 +00:00
Duraid Madina e08a95d3c1 oops, this shouldn't have gotten in 
llvm-svn: 25388
 2006-01-17 03:09:48 +00:00
Duraid Madina 266ff6056a use proper (82-bit) spills/fills when spilling FP regs, so that 
divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)

llvm-svn: 25385
 2006-01-17 02:04:52 +00:00
Duraid Madina c261469ad9 fixing divides 
llvm-svn: 25383
 2006-01-17 01:19:49 +00:00
Duraid Madina e995910e64 fixing divides: FP should now be 100%, and integers are fine too 
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.

llvm-svn: 25358
 2006-01-16 14:33:04 +00:00
Duraid Madina ba187774fe fix division! again!! pattern isel, prepare to die. 
llvm-svn: 25353
 2006-01-16 06:33:38 +00:00
Duraid Madina c8817d2857 explain that r12 is the stack pointer reg 
llvm-svn: 25336
 2006-01-15 09:45:23 +00:00
Chris Lattner c17b41c3ba Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are. 
llvm-svn: 25324
 2006-01-14 22:27:21 +00:00
Nate Begeman 2fba8a3aaa bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Duraid Madina 0b94324c5e don't be a doofus - this fixes storing bools 
llvm-svn: 25274
 2006-01-13 10:28:25 +00:00
Chris Lattner fdc6d1ea69 new nodes 
llvm-svn: 25271
 2006-01-13 02:40:58 +00:00
Duraid Madina 84be729a56 sabre's (correct) fix means these guys need to be flagged as well (else 
the scheduler will complain)

llvm-svn: 25241
 2006-01-12 03:28:40 +00:00
Chris Lattner 9d5e4e8f3c Fix an itanium call lowering bug for duraid 
llvm-svn: 25235
 2006-01-12 01:33:08 +00:00
Nate Begeman 6b9e00dedc Missed a spot. 
llvm-svn: 25233
 2006-01-11 23:20:28 +00:00
Nate Begeman 1b8121b227 Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner eaf94a8d2e tblgen does this now 
llvm-svn: 25220
 2006-01-11 19:53:22 +00:00
Duraid Madina 0302e62296 cleanup GETFD 
llvm-svn: 25198
 2006-01-11 03:50:40 +00:00
Duraid Madina c712fd6b4e this just might work 
llvm-svn: 25195
 2006-01-11 01:38:07 +00:00
Duraid Madina 0d5d08b26e add support for selecting bools 
FIXME: this is commented out because it makes tblgen go a bit fruity
llvm-svn: 25193
 2006-01-11 01:21:12 +00:00
Chris Lattner 0fb2ae7d17 silence a bogus warning 
llvm-svn: 25185
 2006-01-10 19:45:18 +00:00
Duraid Madina 014e8ee806 heh, 'sif it'd be a legalizer bug. 
llvm-svn: 25172
 2006-01-10 05:26:01 +00:00
Duraid Madina e977a93bd5 support functions that return bool (this "should" work but doesn't, 
*maybe* due to a legalizer bug.)

llvm-svn: 25171
 2006-01-10 05:08:25 +00:00
Chris Lattner efbb8da3f5 silence a bogus gcc warning 
llvm-svn: 25129
 2006-01-06 17:56:38 +00:00
Jim Laskey deeafa0f00 Had expand logic backward. 
llvm-svn: 25105
 2006-01-05 01:47:43 +00:00
Jim Laskey 762e9ec06c Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Duraid Madina 69ac08c683 nasty paste-o, calls passing more than 8 arguments along were having 
args >8 put into the wrong place

llvm-svn: 25027
 2005-12-27 10:17:03 +00:00
Evan Cheng 14c53b45f5 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Duraid Madina 6b240e55d1 unbreak calls, a few more tests should run. Tomorrow: bugpoint! 
llvm-svn: 25010
 2005-12-25 14:09:08 +00:00
Duraid Madina 06dcc199f0 we don't feed our call instructions extra operands 
llvm-svn: 25009
 2005-12-25 14:07:01 +00:00
Chris Lattner 177d7af5d5 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Duraid Madina 644e7db818 this is a hack, which may or may not hang around. In short: 
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
 2005-12-22 13:29:14 +00:00
Duraid Madina 3692fa14b8 we can't do this directly in lowering, so we need this case 
llvm-svn: 24951
 2005-12-22 07:14:45 +00:00