Commit Graph

387844 Commits

Author SHA1 Message Date
Roman Lebedev ab794852ed
[NFC][X86][MCA] AMD Zen3: add GPR zero-idiom dependency breaking tests 2021-05-10 00:03:20 +03:00
David Green 76786037c6 [ARM] Fix postinc of vst1xN
These nodes are not handled correctly by CombineBaseUpdate. For the
moment, similar to 5f1cad4d29 mark them as unsupported.
2021-05-09 21:57:55 +01:00
Nikita Popov d26ca78c18 [SCEV] Handle and/or in applyLoopGuards()
applyLoopGuards() already combines conditions from multiple nested
guards. However, it cannot use multiple conditions on the same guard,
combined using and/or. Add support for this by recursing into either
`and` or `or`, depending on the direction of the branch.

Differential Revision: https://reviews.llvm.org/D101692
2021-05-09 21:34:28 +02:00
Nikita Popov 2a08d7409b [SCEV] Add additional loop guard and/or tests (NFC)
Add tests for and/and, and/or, or/or, or/and combinations.
2021-05-09 21:34:28 +02:00
Roman Lebedev 675daef58b
[NFC][X86] Znver3: drop obsolete fixme 2021-05-09 20:37:57 +03:00
Roman Lebedev a21df76db6
[X86] AMD Zen 3: XCHG is a zero-cycle instruction
As measured by exegesis and confirmed by reference docs.
2021-05-09 20:37:57 +03:00
LemonBoy ad5f3f5258 [SelectionDAG] Regenerate test checks (NFC) 2021-05-09 18:51:05 +02:00
Nikita Popov 7549399d0e [SROA] Regenerate test checks (NFC) 2021-05-09 18:20:52 +02:00
Mark de Wever 6ae15756a5 [libc++][doc] Update the Format library status.
- Move LWG-3218 to the chrono section.
- Mark the several parts 'In progress'.
2021-05-09 17:55:50 +02:00
Greg McGary 4b89629403 [lld-macho][NFC] Purge stale test-output trees prior to split-file
Enforce standard practice

Differential Revision: https://reviews.llvm.org/D102112
2021-05-08 17:36:30 -07:00
Roman Lebedev 4aec8f4ce0
[NFC][LoopIdiom] Add some tests for 'lshr until zero' ('count active bits') "on steroids" idiom 2021-05-09 01:07:07 +03:00
Roman Lebedev f858929208
[NFCI][X86] Mark Znver3 scheduling model as complete
To the best of my knowledge, all instructions are modelled,
and have reasonable values to them; flipping the switch
doesn't cause any diff for MCA tests, so either we're good,
or we have test coverage gaps.

I'm not really sure why no other X86 sched model is marked as complete.
2021-05-09 01:07:07 +03:00
Roman Lebedev d5494931f2
[NFCI][X86] Mark a few lately-added system instructions as such for Scheduling purposes 2021-05-09 01:07:07 +03:00
Fangrui Song 492173d42b [test] Fix tools/gold/X86/new-pm.ll after D101797 2021-05-08 13:41:36 -07:00
Krzysztof Parzyszek 561026936b [Hexagon] Propagate metadata in Hexagon Vector Combine 2021-05-08 14:35:55 -05:00
Andrea Di Biagio de1843e51a [llvm-mca][View] Update the Register File statistics.
Correctly track the number of move eliminated in the
Register File statistics.
2021-05-08 19:43:16 +01:00
Greg McGary 5be8502271 [lld-macho] Explicitly undefine literal exported symbols
Symbols explicitly exported via command-line options `--exported_symbol SYM` and `--exported_symbols_list FILE` must be defined. Before this fix, lazy symbols defined in archives would be left to languish. We now force them to be included in the linked output.

Differential Revision: https://reviews.llvm.org/D102100
2021-05-08 11:37:00 -07:00
Andrea Di Biagio 9ceea66602 [MCA][RegisterFile] Refactor the move elimination logic to address PR50258.
This patch lifts the restriction on the number of read/write registers for a
move elimination candidate.  With this patch, move elimination candidates with
exactly two reads and two writes are treated like register swap operations for
the purpose of move elimination.

This patch currently doesn't affect any upstream model. However, it should help
unblock the progress on PR50258.
2021-05-08 18:10:35 +01:00
Nico Weber 7b6dd265ce [lld/mac] Copy some of the commit message of d5a70db193 into a comment 2021-05-08 13:03:17 -04:00
Louis Dionne 2054474640 [libc++] NFC: Refactor Lit annotations
Annotations for c++03 mode are useless, since we only run these tests
in C++11 and C++14.
2021-05-08 12:16:41 -04:00
Florian Hahn 2bf34c0a93
[VPlan] Add test for sink scalars and merging using VPlan.
Add a couple of tests with scalars that can be sunk to their predicated
users.

This pre-commits tests for D100258.
2021-05-08 16:47:48 +01:00
Simon Pilgrim ab5ee342b9 [GlobalISel] Ensure MachineIRBuilder::getDebugLoc() returns a const reference. NFCI.
Avoids a lot of unnecessary tracking increments/decrements of the underlying TrackingMDNodeRef.
2021-05-08 16:23:28 +01:00
Simon Pilgrim 4524d8b755 [X86] combineHorizOpWithShuffle - generalize HOP(SHUFFLE(X),SHUFFLE(Y)) -> SHUFFLE(HOP(X,Y)) fold.
For 128-bit types, generalize the fold to recognise duplicate operands in either shuffle.
2021-05-08 16:23:27 +01:00
Louis Dionne 74d096e558 [libc++] Move handling of the target triple to the DSL
This fixes a long standing issue where the triple is not always set
consistently in all configurations. This change also moves the
back-deployment Lit features to using the proper target triple
instead of using something ad-hoc.

This will be necessary for using from scratch Lit configuration files
in both normal testing and back-deployment testing.

Differential Revision: https://reviews.llvm.org/D102012
2021-05-08 11:10:53 -04:00
Vinayaka Bandishti 9610a2d753 [MLIR] Add memref dialect dependency for affine fusion pass
For `AffineLoopFusion` pass, add `memref` dialect as a dependent
dialect. Since the fusion pass can create `memref::AllocOp`s, the
dialect must be registered in its dependent dialects.

The missing dependency was not discovered until now because the above
said op creation happes only when the input already has
`memref::AllocOp`s in it, and all dialects in the input are
automatically added to the context.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D102104
2021-05-08 20:12:33 +05:30
Uday Bondhugula 73df48158b [MLIR][NFC] Remove unused MLIRContext declaration
Remove unused MLIRContext declaration. NFC.

Differential Revision: https://reviews.llvm.org/D102103
2021-05-08 19:07:24 +05:30
Roman Lebedev 1acd9a1a29
Revert "[LICM] Hoist loads with invariant.group metadata"
This appears to miscompile google benchmark's GetCacheSizesFromKVFS()
when compiling with -fstrict-vtable-pointers.
Runnable reproducer: https://godbolt.org/z/f9ovKqTzb
The "f.fail()" crashes with BUS error, it is compiled into testb,
and the adress it is testing is non-sensical.

This reverts commit 4c89bcadf6.
2021-05-08 15:44:49 +03:00
Saurabh Jha 4e192edb2d Test commit to check commit access 2021-05-08 13:24:05 +01:00
Roman Lebedev b1c38207e9
[X86] Improve costmodel for scalar byte swaps
Currently we model i16 bswap as very high cost (`10`),
which doesn't seem right, with all other being at `1`.

Regardless of `MOVBE`, i16 reg-reg bswap is lowered into
(an extending move plus) rot-by-8:
https://godbolt.org/z/8jrq7fMTj
I think it should at worst have throughput of `1`:

Since i32/i64 already have cost of `1`,
`MOVBE` doesn't improve their costs any further.

BUT, `MOVBE` must have at least a single memory operand,
with other being a register. Which means, if we have
a bswap of load, iff load has a single use,
we'll fold bswap into load.

Likewise, if we have store of a bswap, iff bswap
has a single use, we'll fold bswap into store.

So i think we should treat such a bswap as free,
unless of course we know that for the particular CPU
they are performing badly.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D101924
2021-05-08 15:17:35 +03:00
Louis Dionne c42007e266 [libc++] Use Xcode's CMake if it's present
This resolves issues when the CMake in use on the host is too old to
configure libc++ properly, but Xcode has a sufficiently recent version.
It is technically possible for the reverse issue to happen, where the
Xcode version would be too old and the user-installed version would be
better, however in the context of our build bots, we use AppleClang on
Apple platforms, and the CMake shipped with Xcode should work with the
AppleClang shipped alongside that Xcode.

Differential Revision: https://reviews.llvm.org/D102083
2021-05-08 07:40:35 -04:00
Qiu Chaofan 2db4979c0f [VectorCombine] Simplify to scalar store if only one element updated
This patch simplifies load-insertelt-store pattern into
getelementptr-store.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D98240
2021-05-08 18:14:51 +08:00
Butygin e2a7764481 [mlir] Debug print pattern before and after matchAndRewrite call
Motivation: we have passes with lot of rewrites and when one one them segfaults or asserts, it is very hard to find waht exactly pattern failed without debug info.

Differential Revision: https://reviews.llvm.org/D101443
2021-05-08 12:00:36 +03:00
Xiang1 Zhang d4bdeca576 [X86] Support AMX fast register allocation
Differential Revision: https://reviews.llvm.org/D100026
2021-05-08 14:21:11 +08:00
Arthur Eubanks 72bd0116e3 Fix build after 34a8a437b 2021-05-07 23:18:44 -07:00
Xiang1 Zhang bebafe01a7 Revert "[X86] Support AMX fast register allocation"
This reverts commit 77e2e5e07d.
2021-05-08 13:43:32 +08:00
Xiang1 Zhang 77e2e5e07d [X86] Support AMX fast register allocation 2021-05-08 13:27:21 +08:00
Michael Liao 631da3b152 Replace a remaining CRLF with LF. NFC. 2021-05-08 01:09:15 -04:00
Arthur Eubanks 34a8a437bf [NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose
Printing pass manager invocations is fairly verbose and not super
useful.

This allows us to remove DebugLogging from pass managers and PassBuilder
since all logging (aside from analysis managers) goes through
instrumentation now.

This has the downside of never being able to print the top level pass
manager via instrumentation, but that seems like a minor downside.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D101797
2021-05-07 21:51:47 -07:00
RamNalamothu 223852d76f [DebugInfo] UnwindTable::create() should not add empty rows to CFI unwind table
UnwindTable::parseRows() may return successfully if the CFIProgram has either
no CFI instructions or only DW_CFA_nop instructions and the UnwindRow return
argument will be empty. But currently, the callers are not checking for this case
which is leading to incorrect dumps in the unwind tables in such cases i.e.

  CFA=unspecified

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D101892
2021-05-08 10:19:02 +05:30
River Riddle 53b946aa63 [mlir] Refactor the representation of function-like argument/result attributes.
The current design uses a unique entry for each argument/result attribute, with the name of the entry being something like "arg0". This provides for a somewhat sparse design, but ends up being much more expensive (from a runtime perspective) in-practice. The design requires building a string every time we lookup the dictionary for a specific arg/result, and also requires N attribute lookups when collecting all of the arg/result attribute dictionaries.

This revision restructures the design to instead have an ArrayAttr that contains all of the attribute dictionaries for arguments and another for results. This design reduces the number of attribute name lookups to 1, and allows for O(1) lookup for individual element dictionaries. The major downside is that we can end up with larger memory usage, as the ArrayAttr contains an entry for each element even if that element has no attributes. If the memory usage becomes too problematic, we can experiment with a more sparse structure that still provides a lot of the wins in this revision.

This dropped the compilation time of a somewhat large TensorFlow model from ~650 seconds to ~400 seconds.

Differential Revision: https://reviews.llvm.org/D102035
2021-05-07 19:32:31 -07:00
Arthur Eubanks 44d14d5de6 [lit] Bump up the Windows process cap from 32 to 60
At 61 or over, I see messages like

  File "...\Python\Python39\lib\multiprocessing\connection.py", line 816, in _exhaustive_wait
    res = _winapi.WaitForMultipleObjects(L, False, timeout)

  ValueError: need at most 63 handles, got a sequence of length 64

60 seems to work for me.

If this causes issues for anybody else, feel free to revert.
2021-05-07 18:13:38 -07:00
River Riddle 5c84195b8c [mlir] Add hover support to mlir-lsp-server
This provides information when the user hovers over a part of the source .mlir file. This revision adds the following hover behavior:
* Operation:
  - Shows the generic form.
* Operation Result:
  - Shows the parent operation name, result number(s), and type(s).
* Block:
  - Shows the parent operation name, block number, predecessors, and successors.
* Block Argument:
  - Shows the parent operation name, parent block, argument number, and type.

Differential Revision: https://reviews.llvm.org/D101113
2021-05-07 18:09:01 -07:00
Arthur Eubanks ddff81f692 Revert "lit: revert 134b103fc0f3a995d76398bf4b029d72bebe8162"
This reverts commit d319005a37.

Causing messages like:

  File "...\Python\Python39\lib\multiprocessing\connection.py", line 816, in _exhaustive_wait
    res = _winapi.WaitForMultipleObjects(L, False, timeout)
ValueError: need at most 63 handles, got a sequence of length 74
2021-05-07 18:00:11 -07:00
Arthur Eubanks d82bc9e81d [gn build] Manually port 5b158093e 2021-05-07 17:54:32 -07:00
thomasraoux 6aaf06f929 [mlir][vector] Fix warning
Previous change caused another warning in some build configuration:
"default label in switch which covers all enumeration values"
2021-05-07 17:12:47 -07:00
Amara Emerson 5b158093e2 [AArch64][GlobalISel] Create a new minimal combiner pass just for -O0.
We never bothered to have a separate set of combines for -O0 in the prelegalizer
before. This results in some minor performance hits for a mode where performance
isn't a concern (although not regressing code size significantly is still preferable).

This also removes the CSE option since we don't need it for -O0.

Through experiments, I've arrived at a set of combines that gets the most code
size improvement at -O0, while reducing the amount of time spent in the combiner
by around 35% give or take.

Differential Revision: https://reviews.llvm.org/D102038
2021-05-07 17:01:27 -07:00
Amara Emerson 808bc11d9e [GlobalISel] Don't form zero/sign extending loads for atomics.
For importing patterns, we only support matching G_LOAD, not G_ZEXTLOAD or
G_SEXTLOAD.

Differential Revision: https://reviews.llvm.org/D101932
2021-05-07 16:41:48 -07:00
Weston Carvalho 1f65f42dd3 Make `hasTypeLoc` matcher support more node types.
Differential Revision: https://reviews.llvm.org/D101572
2021-05-08 00:35:22 +01:00
Weston Carvalho 0ad494838b NFC: Move TypeList implementation up the file
This will make it possible for more code to use it.
2021-05-08 00:35:13 +01:00
Arthur Eubanks 6f7131002b [NewPM] Move analysis invalidation/clearing logging to instrumentation
We're trying to move DebugLogging into instrumentation, rather than
being part of PassManagers/AnalysisManagers.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D102093
2021-05-07 15:25:31 -07:00