2 Commits

Author	SHA1	Message	Date
Evan Cheng	961339bbdb	Handle a few more cases of folding load i64 into xmm and zero top bits. ... Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch. llvm-svn: 50918	2008-05-09 21:53:03 +00:00
Evan Cheng	78af38c392	Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. ... llvm-svn: 50838	2008-05-08 00:57:18 +00:00