llvm-project

Commit Graph

Author	SHA1	Message	Date
Mircea Trofin	cdfd4c5c1a	[NFC] Removed unused prefixes in test/CodeGen/AMDGPU More patches to follow. This covers the pertinent tests starting with e, f, and g. Differential Revision: https://reviews.llvm.org/D94124	2021-01-05 19:18:30 -08:00
Pushpinder Singh	e2303a448e	[FastRA] Fix handling of bundled MIs Fast register allocator skips bundled MIs, as the main assignment loop uses MachineBasicBlock::iterator (= MachineInstrBundleIterator) This was causing SIInsertWaitcnts to crash which expects all instructions to have registers assigned. This patch makes sure to set everything inside bundle to the same assignments done on BUNDLE header. Reviewed By: qcolombet Differential Revision: https://reviews.llvm.org/D90369	2020-12-21 02:10:55 -05:00

Author

SHA1

Message

Date

Mircea Trofin

cdfd4c5c1a

[NFC] Removed unused prefixes in test/CodeGen/AMDGPU

More patches to follow. This covers the pertinent tests starting with e,
f, and g.

Differential Revision: https://reviews.llvm.org/D94124

2021-01-05 19:18:30 -08:00

Pushpinder Singh

e2303a448e

[FastRA] Fix handling of bundled MIs

Fast register allocator skips bundled MIs, as the main assignment
loop uses MachineBasicBlock::iterator (= MachineInstrBundleIterator)
This was causing SIInsertWaitcnts to crash which expects all
instructions to have registers assigned.

This patch makes sure to set everything inside bundle to the same
assignments done on BUNDLE header.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D90369

2020-12-21 02:10:55 -05:00

2 Commits