Commit Graph

292932 Commits

Author SHA1 Message Date
Vlad Tsyrklevich ee59c5e922 Fix test broken by r335644
llvm-svn: 335657
2018-06-26 20:21:33 +00:00
Tatyana Krasnukha b76dcd17d1 Amend "Change AddressClass type from 'enum' to 'enum class'".
r335599 changes usages of AddressClass, but doesn't change the type itself.

llvm-svn: 335656
2018-06-26 20:08:05 +00:00
Brian Gesiak 12d5a51d66 [AST] Fix typo in LazyOffsetPtr::get docs (NFC)
llvm-svn: 335655
2018-06-26 20:05:18 +00:00
Stanislav Mekhanoshin dacda79ee6 [AMDGPU] Add llvm.amdgcn.fmad.ftz intrinsic
This intrinsic selects v_mad_f32 regardless of fp32 denorm support.

Differential Revision: https://reviews.llvm.org/D48573

llvm-svn: 335654
2018-06-26 20:04:19 +00:00
John Baldwin 2a2945a3c5 [mips] Use more conservative default CPUs for MIPS on FreeBSD.
FreeBSD defaults to mips3 for all MIPS ABIs with GCC as that is the
minimum MIPS architecture FreeBSD supports.  Use mips3 for MIPS64 and
mips2 for MIPS32 to match.

Reviewed By: atanasyan

Differential Revision: https://reviews.llvm.org/D48499

llvm-svn: 335653
2018-06-26 19:48:05 +00:00
Sanjay Patel fb9c440ba5 [DAGCombiner] use isBitwiseNot to simplify code; NFC
llvm-svn: 335652
2018-06-26 19:46:56 +00:00
Sean Fertile f60cb34c91 [PPC64] Thread-local storage general-dynamic to initial-exec relaxation.
Patch adds support for relaxing the general-dynamic tls sequence to
initial-exec.

the relaxation performs the following transformation:
addis r3, r2, x@got@tlsgd@ha --> addis r3, r2, x@got@tprel@ha
addi r3, r3, x@got@tlsgd@l   --> ld r3, x@got@tprel@l(r3)
bl __tls_get_addr(x@tlsgd)   --> nop
nop                          --> add r3, r3, r13

and instead of emitting a DTPMOD64/DTPREL64 pair for x, we emit a single
R_PPC64_TPREL64.

Differential Revision: https://reviews.llvm.org/D48090

llvm-svn: 335651
2018-06-26 19:38:18 +00:00
Matt Arsenault 8c4a35237a AMDGPU: Add pass to lower kernel arguments to loads
This replaces most argument uses with loads, but for
now not all.

The code in SelectionDAG for calling convention lowering
is actively harmful for amdgpu_kernel. It attempts to
split the argument types into register legal types, which
results in low quality code for arbitary types. Since
all kernel arguments are passed in memory, we just want the
raw types.

I've tried a couple of methods of mitigating this in SelectionDAG,
but it's easier to just bypass this problem alltogether. It's
possible to hack around the problem in the initial lowering,
but the real problem is the DAG then expects to be able to use
CopyToReg/CopyFromReg for uses of the arguments outside the block.

Exposing the argument loads in the IR also has the advantage
that the LoadStoreVectorizer can merge them.

I'm not sure the best approach to dealing with the IR
argument list is. The patch as-is just leaves the IR arguments
in place, so all the existing code will still compute the same
kernarg size and pointlessly lowers the arguments.

Arguably the frontend should emit kernels with an empty argument
list in the first place. Alternatively a dummy array could be
inserted as a single argument just to reserve space.

This does have some disadvantages. Local pointer kernel arguments can
no longer have AssertZext placed  on them as the equivalent !range
metadata is not valid on pointer  typed loads. This is mostly bad
for SI which needs to know about the known bits in order to use the
DS instruction offset, so in this case this is not done.

More importantly, this skips noalias arguments since this pass
does not yet convert this to the equivalent !alias.scope and !noalias
metadata. Producing this metadata correctly seems to be tricky,
although this logically is the same as inlining into a function which
doesn't exist. Additionally, exposing these loads to the vectorizer
may result in degraded aliasing information if a pointer load is
merged with another argument load.

I'm also not entirely sure this is preserving the current clover
ABI, although I would greatly prefer if it would stop widening
arguments and match the HSA ABI. As-is I think it is extending
< 4-byte arguments to 4-bytes but doesn't align them to 4-bytes.

llvm-svn: 335650
2018-06-26 19:10:00 +00:00
Matt Arsenault 7e991d30c0 ConstantFold: Don't fold global address vs. null for addrspace != 0
Not sure why this logic seems to be repeated in 2 different places,
one called by the other.

On AMDGPU addrspace(3) globals start allocating at 0, so these
checks will be incorrect (not that real code actually tries
to compare these addresses)

llvm-svn: 335649
2018-06-26 18:55:43 +00:00
Vedant Kumar 78ff0f1b83 Use a variable to appease a no-asserts bot, NFC
Failure URL:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/22836

llvm-svn: 335648
2018-06-26 18:55:26 +00:00
Vedant Kumar 2e6c5f96dc [Debugify] Don't treat missing dbg.values as an error (PR37942)
When checking the debug info in a module, don't treat a missing
dbg.value as an error. The dbg.value may simply have been DCE'd, in
which case the debugger has enough information to display the variable
as <optimized out>.

llvm-svn: 335647
2018-06-26 18:54:10 +00:00
Tim Shen b32823cbe9 [ConstantRange] Add support of mul in makeGuaranteedNoWrapRegion.
Summary: This is trying to add support for r334428.

Reviewers: sanjoy

Subscribers: jlebar, hiraditya, bixia, llvm-commits

Differential Revision: https://reviews.llvm.org/D48399

llvm-svn: 335646
2018-06-26 18:54:10 +00:00
Matt Arsenault 2c1a570aab LoopUnroll: Allow analyzing intrinsic call costs
I'm not sure why the code here is skipping calls since
TTI does try to do something for general calls, but it
at least should allow intrinsics.

Skip intrinsics that should not be omitted as calls, which
is by far the most common case on AMDGPU.

llvm-svn: 335645
2018-06-26 18:51:17 +00:00
Vlad Tsyrklevich e745cf9bf3 CFI: Print DSO names for failed cross-DSO icalls
Reviewers: pcc

Reviewed By: pcc

Subscribers: kubamracek, delcypher, llvm-commits, kcc, #sanitizers

Differential Revision: https://reviews.llvm.org/D48583

llvm-svn: 335644
2018-06-26 18:51:04 +00:00
Vedant Kumar c85ca4cdab [Local] Add a convenient insertReplacementDbgValues overload, NFC
Add an overload for the common case where the replacement dbg.values
have the same DIExpressions as the originals.

llvm-svn: 335643
2018-06-26 18:44:53 +00:00
Vedant Kumar de46f65bbd [Local] Sink salvageDI's early exit into helper functions, NFC
salvageDebugInfo() performs a check that allows it to exit early without
doing a DenseMap lookup. It's a bit neater and marginally more useful to
sink this early exit into the findDbg{Addr,Users,Values} helpers.

llvm-svn: 335642
2018-06-26 18:44:52 +00:00
Brendon Cahoon b7169c435a [Hexagon] Add a "generic" cpu
Add the generic processor for Hexagon so that it can be used
with 3rd party programs that create a back-end with the
"generic" CPU. This patch also enables the JIT for Hexagon.

Differential Revision: https://reviews.llvm.org/D48571

llvm-svn: 335641
2018-06-26 18:44:05 +00:00
Matt Morehouse 0948bc2086 [libFuzzer] Do not turn unittest warnings into errors.
Some warnings originating from googletest were causing bots to fail
while bulding unit tests.  The sanitizers address this issue by not
using -Werror.  We adopt this approach for libFuzzer.

llvm-svn: 335640
2018-06-26 18:37:37 +00:00
Matt Morehouse 0ab788e271 [libFuzzer] Mark several tests UNSUPPORTED for aarch64.
Now that check-fuzzer runs as part of check-all, some aarch64 bots had
tests failing.

llvm-svn: 335639
2018-06-26 18:37:09 +00:00
Volodymyr Sapsai 3bbf789003 [Sema] Fix infinite typo correction loop.
NumTypos guard value ~0U doesn't prevent from creating new delayed typos. When
you create new delayed typos during typo correction, value ~0U wraps around to
0. When NumTypos is 0 we can miss some typos and treat an expression as it can
be typo-corrected. But if the expression is still invalid after correction, we
can get stuck in infinite loop trying to correct it.

Fix by not using value ~0U so that NumTypos correctly reflects the number of
typos.

rdar://problem/38642201

Reviewers: arphaman, majnemer, rsmith

Reviewed By: rsmith

Subscribers: rsmith, nicholas, cfe-commits

Differential Revision: https://reviews.llvm.org/D47341

llvm-svn: 335638
2018-06-26 17:56:48 +00:00
Simon Pilgrim 7f55af37f4 [DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 vector expansion (PR37119)
Temporary fix until I've managed to get D45806 updated - both +1 and -1 special cases need to be properly supported.

llvm-svn: 335637
2018-06-26 17:46:51 +00:00
Peter Collingbourne 7a17a8ba1e Compile CodeGenModule.cpp with /bigobj.
Apparently we're now hitting an object file section limit on this
file with expensive checks enabled.

llvm-svn: 335636
2018-06-26 17:45:26 +00:00
Fangrui Song ee15d3dcdb Move `REQUIRES:` line to the top
llvm-svn: 335635
2018-06-26 17:44:23 +00:00
Aaron Enye Shi 5c200be258 [HIP] Remove hip/hc.amdgcn.bc from HIP Toolchains
Summary:
The hc.amdgcn.bc and hip.amdgcn.bc are removed in VDI build and no longer needed.

Reviewers: yaxunl

Reviewed By: yaxunl

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D48455

llvm-svn: 335634
2018-06-26 17:40:36 +00:00
Sanjay Patel ad0bfb844d [InstSimplify] fold shifts by sext bool
https://rise4fun.com/Alive/c3Y

llvm-svn: 335633
2018-06-26 17:31:38 +00:00
Alexey Bataev 91433f6877 [OPENMP, NVPTX] Reduce the number of the globalized variables.
Patch tries to make better analysis of the variables that should be
globalized. From now, instead of all parallel directives it will check
only distribute parallel .. directives and check only for
firstprivte/lastprivate variables if they must be globalized.

llvm-svn: 335632
2018-06-26 17:24:03 +00:00
Sanjay Patel 3d1e4d6fa6 [InstSimplify] add tests for shifts by sext bool; NFC
llvm-svn: 335631
2018-06-26 17:15:07 +00:00
Aaron Enye Shi 4928d51791 [Test] Initial test commit access
llvm-svn: 335630
2018-06-26 17:12:29 +00:00
Simon Pilgrim 1576df53a9 [X86][SSE] Add another sdiv by (nonuniform) minus one test (PR37119)
Include a test that divides by -1 but not by 1 (another special case)

llvm-svn: 335629
2018-06-26 17:06:05 +00:00
Francis Visoiu Mistrih 081568fb2d Revert "[CMake][Darwin] Match cxx-headers -> cxx_headers libcxx target rename."
This reverts commit r334550. Try to fix the stage2 build failing on
Green Dragon for a while.

http://green.lab.llvm.org/green/job/clang-stage2-Rthinlto/11124/console

llvm-svn: 335628
2018-06-26 17:05:01 +00:00
Fangrui Song 68fa4e8c34 [ELF] Assign RF_EXEC rank even if --no-rosegment or SECTIONS command is used
Summary:
Currently when --no-rosegment is specified or a linker script with SECTIONS command is used,
.rodata (A) .text (AX) are assigned the same rank and .rodata may be placed after .text .
This increases the gap between .text and .bss and can cause pc-relative relocation overflow (e.g. gcc crtbegin.o crtbegin.S have R_X86_64_PC32 relocation from .text to .bss).

This patch makes SingleRoRx affect only segment layout, not section layout. As a consequence, .rodata will be placed before .text regardless of SingleRoRx.

Reviewers: espindola, ruiu, grimar, echristo, javed.absar

Subscribers: emaste, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D48405

llvm-svn: 335627
2018-06-26 17:04:47 +00:00
Simon Pilgrim cbd8c76b98 Fix -Wdocumentation warning. NFCI.
llvm-svn: 335626
2018-06-26 17:00:43 +00:00
Fangrui Song eb75b8f8f7 [ELF] Move `# REQUIRES:` line to the top
llvm-svn: 335625
2018-06-26 16:58:19 +00:00
Marc-Andre Laperle 9e8a24df5b [clangd] Simplify matches in FindSymbols tests
Summary:
Instead of checking symbol name and container (scope) separately, check the
qualified name instead. This is much shorter and similar to how it is done
in the SymbolCollector tests.

Signed-off-by: Marc-Andre Laperle <marc-andre.laperle@ericsson.com>

Reviewers: simark

Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D47847

llvm-svn: 335624
2018-06-26 16:57:44 +00:00
Sanjay Patel 9adea01c9f [InstCombine] simplify code for urem fold; NFCI
llvm-svn: 335623
2018-06-26 16:39:29 +00:00
Sanjay Patel 3575f0c0b3 [InstCombine] fold urem with sext bool divisor
Similar to other patches in this series:
https://reviews.llvm.org/rL335512
https://reviews.llvm.org/rL335527
https://reviews.llvm.org/rL335597
https://reviews.llvm.org/rL335616

...this is filling a gap in analysis that is exposed by an unrelated select-of-constants transform.
I didn't see a way to unify the sext cases because each div/rem opcode results in a different fold.

Note that in this case, the backend might want to convert the select into math:
Name: sext urem
%e = sext i1 %x to i32
%r = urem i32 %y, %e
=>
%c = icmp eq i32 %y, -1
%z = zext i1 %c to i32
%r = add i32 %z, %y

llvm-svn: 335622
2018-06-26 16:30:00 +00:00
Simon Pilgrim bbfc18b5b5 [SLPVectorizer] Recognise non uniform power of 2 constants
Since D46637 we are better at handling uniform/non-uniform constant Pow2 detection; this patch tweaks the SLP argument handling to support them.

As SLP works with arrays of values I don't think we can easily use the pattern match helpers here.

Differential Revision: https://reviews.llvm.org/D48214

llvm-svn: 335621
2018-06-26 16:20:16 +00:00
Kostya Kortchinsky 1969c9a13e [Driver] Do not add -lpthread & -lrt with -static-libsan on Android
Summary:
I am not sure anyone has tried to compile an application with sanitizers on
Android with `-static-libsan`, and a recent NDK, but it fails with:
```
.../i686-linux-android/bin/ld.gold: error: cannot find -lpthread
.../i686-linux-android/bin/ld.gold: error: cannot find -lrt
```
My understanding is that both are included in Bionic and as such are not needed,
and actually error out.

So remove the addition of those two in `linkSanitizerRuntimeDeps` when dealing
with Android, and update the tests.

I am unfamiliar with the evolution of the NDK and I am not sure if this has
always been the case or if this is somewhat of a recent evolution. I'll let
Android people chime in.

Reviewers: eugenis, pirama, srhines

Reviewed By: eugenis, srhines

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D48570

llvm-svn: 335620
2018-06-26 16:14:35 +00:00
Sanjay Patel 0f44759b0d [InstCombine] add tests for urem with sext bool divisor; NFC
llvm-svn: 335619
2018-06-26 16:01:24 +00:00
Teresa Johnson 25becb35e9 [ThinLTO] Add testing of summary index parsing to a couple CFI tests
Summary:
Changes to some clang side tests to go with the summary parsing patch.

Depends on D47905.

Reviewers: pcc, dexonsmith, mehdi_amini

Subscribers: inglorion, eraman, cfe-commits, steven_wu

Differential Revision: https://reviews.llvm.org/D47906

llvm-svn: 335618
2018-06-26 15:50:34 +00:00
Simon Pilgrim 133b1cdf08 [DAGCombiner] Pull out VT bitwidth in visitSDIV. NFCI.
llvm-svn: 335617
2018-06-26 15:39:16 +00:00
Sanjay Patel 2b7e31095d [InstSimplify] fold srem with sext bool divisor
llvm-svn: 335616
2018-06-26 15:32:54 +00:00
James Henderson c307b00348 Fix doc title underlining.
llvm-svn: 335615
2018-06-26 15:29:09 +00:00
Simon Pilgrim 9e2450409e Avoid spurious 'comma operator within array index expression' MSVC warning. NFCI.
Split the braces list initialization from the [] map operator to keep MSVC happy.

llvm-svn: 335614
2018-06-26 15:20:20 +00:00
James Henderson 5507f6688d [FileCheck] Add CHECK-EMPTY directive for checking for blank lines
Prior to this change, there was no clean way of getting FileCheck to
check that a line is completely empty. The expected way of using
"CHECK: {{^$}}" does not work because the '^' matches the end of the
previous match (this behaviour may be desirable in certain instances).
For the same reason, "CHECK-NEXT: {{^$}}" will fail when the previous
match was at the end of the line, as the pattern will match there.
Using the recommended [[:space:]] to match an explicit new line could
also match a space, and thus is not always desired. Literal '\n'
matches also do not work. A workaround was suggested in the review, but
it is a little clunky.

This change adds a new directive that behaves the same as CHECK-NEXT,
except that it only matches against empty lines (nothing, not even
whitespace, is allowed). As with CHECK-NEXT, it will fail if more than
one newline occurs before the next blank line. Example usage:
; test.txt
foo

bar
; CHECK: foo
; CHECK-EMPTY:
; CHECK-NEXT: bar

Differential Revision: https://reviews.llvm.org/D28896

Reviewed by: probinson

llvm-svn: 335613
2018-06-26 15:15:45 +00:00
Pavel Labath 2f93fd1f50 Represent invalid UUIDs as UUIDs with length zero
Summary:
During the previous attempt to generalize the UUID class, it was
suggested that we represent invalid UUIDs as length zero (previously, we
used an all-zero UUID for that). This meant that some valid build-ids
could not be represented (it's possible however unlikely that a checksum of
some file would be zero) and complicated adding support for variable
length build-ids (should a 16-byte empty UUID compare equal to a 20-byte
empty UUID?).

This patch resolves these issues by introducing a canonical
representation for an invalid UUID. The slight complication here is that
some clients (MachO) actually use the all-zero notation to mean "no UUID
has been set". To keep this use case working (while making it very
explicit about which construction semantices are wanted), replaced the
UUID constructors and the SetBytes functions with named factory methods.
- "fromData" creates a UUID from the given data, and it treats all bytes
  equally.
- "fromOptionalData" first checks the data contents - if all bytes are
  zero, it treats this as an invalid/empty UUID.

Reviewers: clayborg, sas, lemo, davide, espindola

Subscribers: emaste, lldb-commits, arichardson

Differential Revision: https://reviews.llvm.org/D48479

llvm-svn: 335612
2018-06-26 15:12:20 +00:00
Krzysztof Parzyszek 9f199ebec0 Silence "unused variable" warning in LiveIntervals.cpp after r335607
llvm-svn: 335610
2018-06-26 14:55:04 +00:00
Sanjay Patel 0e0dbebeed [InstSimplify] add tests for srem with sext bool divisor; NFC
llvm-svn: 335609
2018-06-26 14:47:31 +00:00
Nico Weber a7f9e66cfd Fix LLVM_ENABLE_THREADS=0 builds after r335440.
llvm-svn: 335608
2018-06-26 14:42:48 +00:00
Krzysztof Parzyszek 70f027022c Account for undef values from predecessors in extendSegmentsToUses
It is legal for a PHI node not to have a live value in a predecessor
as long as the end of the predecessor is jointly dominated by an undef
value.

llvm-svn: 335607
2018-06-26 14:37:16 +00:00