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11 Commits

Author SHA1 Message Date
Matt Arsenault d9af712da4 AMDGPU/GlobalISel: Make 16-bit constants legal 
This is mostly for the benefit of patterns which use 16-bit constants.

llvm-svn: 370921
 2019-09-04 16:19:45 +00:00
Volkan Keles 277631e3b8 [GlobalISel] Legalizer: Retry combining illegal artifacts as long as there new artifacts 
Summary:
Currently, Legalizer aborts if it’s unable to legalize artifacts. However, it’s
possible to combine them after processing the rest of the instruction because
the legalization is likely to generate more artifacts that allow ArtifactCombiner
to combine away them.

Instead, move illegal artifacts to another list called RetryList and wait until all of the
instruction in InstList are legalized. After that, check if there is any new artifacts and
try to combine them again if that’s the case. If not, abort. The idea is similar to D59339,
but the approach is a bit different.

This patch fixes the issue described above, but the legalizer still may be unable to handle
some cases depending on when to legalize artifacts. So, in the long run, we probably need
a different legalization strategy that handles this dependency in a better way.

Reviewers: dsanders, aditya_nandakumar, qcolombet, arsenm, aemerson, paquette

Reviewed By: dsanders

Subscribers: jvesely, wdng, nhaehnle, rovka, javed.absar, hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65894

llvm-svn: 369805
 2019-08-23 20:30:35 +00:00
Matt Arsenault fba82858f2 GlobalISel: Don't create G_UADDE with constant false carry in 
The x86 tests are now broken (in paticular add-scalar.ll now hits the
DAG fallback) due to not handling G_UADDO. The DAG x86 backend has a
custom lowering for this, so that will need to be implemented.

llvm-svn: 369673
 2019-08-22 17:29:17 +00:00
Matt Arsenault 954a012b4c GlobalISel: Implement moreElementsVector for G_UNMERGE_VALUES sources 
This is necessary for handling <3 x s16> on AMDGPU, assuming this
should be handled as 2 separate legalization actions. The alternative
would be for fewerElementsVector to handle 3->2.

llvm-svn: 369547
 2019-08-21 16:59:10 +00:00
Matt Arsenault 28215caa60 GlobalISel: Partially implement fewerElementsVector G_UNMERGE_VALUES 
Odd sized vectors aren't handled yet.

llvm-svn: 368713
 2019-08-13 16:26:28 +00:00
Matt Arsenault d9d30a408e GlobalISel: Lower scalarizing unmerge of a vector to shifts 
AMDGPU sometimes has legal s16 and <2 x s16> operations, but all
registers are really 32-bit. An unmerge destination really should ben
widened to a 32-bit register. If widening a scalarizing vector with a
target size that matches the vector size, bitcast to integer and
extract the relevant bits with shifts.

I'm not sure if this is the right place for this. This could arguably
be part of widenScalar for the result. I also have a growing feeling
that we're missing a bitcast legalize action.

llvm-svn: 367604
 2019-08-01 19:10:05 +00:00
Matt Arsenault 51d795d941 GlobalISel: Fold out unmerge to scalars from concat_vector 
Removes illegal intermediate vectors if an operation was lowering to
concat_vectors, and the next operation is scalarized.

llvm-svn: 367081
 2019-07-26 02:22:23 +00:00
Matt Arsenault 3f1a34546c AMDGPU/GlobalISel: Fix legality for G_BUILD_VECTOR 
llvm-svn: 365575
 2019-07-09 22:48:04 +00:00
Matt Arsenault d3093c2f1f GlobalISel: Implement fewerElementsVector for phi 
llvm-svn: 355048
 2019-02-28 00:16:32 +00:00
Matt Arsenault 72bcf15dbf GlobalISel: Implement moreElementsVector for phi 
llvm-svn: 355047
 2019-02-28 00:01:05 +00:00
Matt Arsenault 2e0ee47712 AMDGPU/GlobalISel: Make phis legal 
llvm-svn: 354592
 2019-02-21 15:48:13 +00:00