Craig Topper
258f874bb9
[AVX512] Make the permd intrinsics take a 32-bit immediate to match the software spec.
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llvm-svn: 269579
2016-05-14 21:13:20 +00:00
Elena Demikhovsky
e79b716daf
Fixed lowering of _comi_ intrinsics from all sets - SSE/SSE2/AVX/AVX-512
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Differential revision http://reviews.llvm.org/D19261
llvm-svn: 269569
2016-05-14 15:06:09 +00:00
Craig Topper
d8a9c0d120
[AVX512] Fix types for pshufd intrinsics. The immediate is the second argument and the mask is the 4th argument. Also move the 128/256 tests to the right test file.
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Prior to this the immediate was a strange 16-bits and the 512-bit intrinsic couldn't receive the full 16 mask bits it needs.
llvm-svn: 269526
2016-05-14 00:47:18 +00:00
Simon Pilgrim
cd0dfc93eb
[X86][SSE] Support for MOVMSK signbit extraction instructions
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Add support for lowering with the MOVMSK instruction to extract vector element signbits to a GPR.
This is an early step towards more optimal handling of vector comparison results.
Differential Revision: http://reviews.llvm.org/D18741
llvm-svn: 265266
2016-04-03 18:22:03 +00:00
Simon Pilgrim
572ca71573
[X86][XOP] Support for VPPERM byte shuffle instruction
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This patch begins adding support for lowering to the XOP VPPERM instruction - adding the X86ISD::VPPERM opcode.
Differential Revision: http://reviews.llvm.org/D18189
llvm-svn: 264260
2016-03-24 11:52:43 +00:00
Simon Pilgrim
abcee45b7a
[X86][AVX] Better support for the variable mask form of VPERMILPD/VPERMILPS
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The variable mask form of VPERMILPD/VPERMILPS were only partially implemented, with much of it still performed as an intrinsic.
This patch properly defines the instructions in terms of X86ISD::VPERMILPV, permitting the opcode to be easily combined as a target shuffle.
Differential Revision: http://reviews.llvm.org/D17681
llvm-svn: 262635
2016-03-03 18:13:53 +00:00
Michael Zuckerman
c4d054fa4a
[LLVM][AVX512] PSRLWI Chnage imm8 to int
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Differential Revision: http://reviews.llvm.org/D17753
llvm-svn: 262592
2016-03-03 08:54:05 +00:00
Michael Zuckerman
927fdaee88
[LLVM][AVX512]PSRAWI Change imm8 to int.
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Differential Revision: http://reviews.llvm.org/D17705
llvm-svn: 262480
2016-03-02 12:05:07 +00:00
Michael Zuckerman
433b241570
[LLVM][AVX512] PSRL{DI|QI} Change imm8 to int
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Differential Revision: http://reviews.llvm.org/D17713
llvm-svn: 262353
2016-03-01 17:46:32 +00:00
Michael Zuckerman
7878888690
[AVX512][PSRAQ][PSRAD] Change imm8 to int.
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Differential Revision: http://reviews.llvm.org/D17692
llvm-svn: 262320
2016-03-01 11:36:23 +00:00
Michael Zuckerman
96836fc81c
[AVX512][PSLLW ][PSLLV] Change imm8 to int
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Differential Revision: http://reviews.llvm.org/D17684
llvm-svn: 262176
2016-02-28 07:32:10 +00:00
Simon Pilgrim
3b42ca0760
Strip trailing whitespace. NFCI.
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llvm-svn: 262131
2016-02-27 11:49:16 +00:00
Michael Zuckerman
a1f2d27da2
[LLVM][AVX512][PSHUFHW ][PSHUFLW ] Change imm8 to int
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Differential Revision: http://reviews.llvm.org/D17538
llvm-svn: 261725
2016-02-24 08:39:05 +00:00
Michael Zuckerman
724dc3b20c
[AVX512][PRORQ][PRORD] Change imm8 to int
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Differential Revision: http://reviews.llvm.org/D17024
llvm-svn: 261198
2016-02-18 09:52:12 +00:00
Ahmed Bougacha
f3cccab1e0
[X86] Remove the now-unused X86ISD::PSIGN. NFC.
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llvm-svn: 261025
2016-02-16 22:14:12 +00:00
Michael Zuckerman
529c27f408
[AVX512][PROLQ][PROLD] Change imm8 to int
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Differential Revision: http://reviews.llvm.org/D16983
llvm-svn: 260101
2016-02-08 15:13:32 +00:00
Asaf Badouh
ad5c3fc47d
[X86][AVX512] add intrinsics of Scalar FP to integer conversion with rounding mode
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Differential Revision: http://reviews.llvm.org/D16629
llvm-svn: 260033
2016-02-07 14:59:13 +00:00
Igor Breger
0aeda37464
AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation.
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Differential Revision: http://reviews.llvm.org/D16813
llvm-svn: 260024
2016-02-07 08:30:50 +00:00
Michael Zuckerman
7d73360479
[AVX512] add vfmadd132ss and vfmadd132sd Intrinsic
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Differential Revision: http://reviews.llvm.org/D16589
llvm-svn: 259789
2016-02-04 14:41:08 +00:00
Asaf Badouh
5a3a0231f4
[X86][AVX512VBMI] add encoding and intrinsics for Multishift
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Differential Revision: http://reviews.llvm.org/D16399
llvm-svn: 259363
2016-02-01 15:48:21 +00:00
Asaf Badouh
42852d99e7
[X86][AVX512] small fix in ptestm intrinsics
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move ptestm{q|d} intrinsics from patterns form (in td file) to the intrinsics table
Differential Revision: http://reviews.llvm.org/D16633
llvm-svn: 259029
2016-01-28 08:33:22 +00:00
Benjamin Kramer
391be792f2
One more batch of self-containing headers.
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llvm-svn: 258974
2016-01-27 19:29:56 +00:00
Reid Kleckner
86ff2689a5
Sort intrinsics by LLVM intrinsic name, rather than tablegen def name
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Step one towards using a simple binary search to lookup intrinsic IDs
instead of our crazy table generated switch+memcmp+startswith code that
makes Function.cpp take about a minute to compile. See PR24785 and
PR11951 for why we should do this.
The X86 backend contains tables that need to be sorted on intrinsic ID,
so reorder those.
llvm-svn: 258757
2016-01-26 00:55:00 +00:00
Michael Zuckerman
1bd7f993fc
[AVX512] Adding PTESTNMB/D/W/Q instruction
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Differential Revision: http://reviews.llvm.org/D16520
llvm-svn: 258688
2016-01-25 14:43:23 +00:00
Michael Zuckerman
19670d479a
[AVX512] Adding PTESTMB/W/D/Q instruction
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Differential Revision: http://reviews.llvm.org/D16519
llvm-svn: 258686
2016-01-25 13:27:32 +00:00
Asaf Badouh
655822ab7e
[X86][IFMA] adding intrinsics and encoding for multiply and add of unsigned 52bit integer
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VPMADD52LUQ - Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators
VPMADD52HUQ - Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators
Differential Revision: http://reviews.llvm.org/D16407
llvm-svn: 258680
2016-01-25 11:14:24 +00:00
Igor Breger
1e5bafbc82
AVX512: VMOVDQU8/16/32/64 (load) intrinsic implementation.
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Differential Revision: http://reviews.llvm.org/D16137
llvm-svn: 258657
2016-01-24 08:04:33 +00:00
Igor Breger
7a000f5bb2
AVX512: Masked move intrinsic implementation.
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Implemented intrinsic for the follow instructions (reg move) : VMOVDQU8/16, VMOVDQA32/64, VMOVAPS/PD.
Differential Revision: http://reviews.llvm.org/D16316
llvm-svn: 258398
2016-01-21 14:18:11 +00:00
Michael Zuckerman
21a30a42a9
[AVX512] Adding VPERMT2B and VPERMI2B Intrinsics
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Differential Revision: http://reviews.llvm.org/D16398
llvm-svn: 258397
2016-01-21 13:36:01 +00:00
Michael Zuckerman
65c40afb03
[AVX512] Adding VPERMB Intrinsics
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Differential Revision: http://reviews.llvm.org/D16296
llvm-svn: 258316
2016-01-20 15:24:56 +00:00
Igor Breger
d3341f5021
AVX512: Store (MOVNTPD, MOVNTPS, MOVNTDQ) using non-temporal hint intrinsic implementation.
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Differential Revision: http://reviews.llvm.org/D16350
llvm-svn: 258309
2016-01-20 13:11:47 +00:00
Asaf Badouh
d4a0d9a78c
[X86][AVX512]fix dag & add intrinsics for fixupimm
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cover all width and types (pd/ps/sd/ss) of fixupimm instruction and inrtinsics
Differential Revision: http://reviews.llvm.org/D16313
llvm-svn: 258124
2016-01-19 14:21:39 +00:00
Igor Breger
239fda676c
AVX512: Masked store intrinsic implementation.
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Implemented intrinsic for the follow instructions (store) : VMOVDQU8/16/32/64, VMOVDQA32/64, VMOVAPS/PD, VMOVUPS/PD.
Differential Revision: http://reviews.llvm.org/D16271
llvm-svn: 258047
2016-01-18 13:52:57 +00:00
Michael Zuckerman
ac1b238b0a
[AVX512] Adding VPERMW/D/Q VPERMPS/D Intrinsics
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Differential Revision: http://reviews.llvm.org/D16189
llvm-svn: 258008
2016-01-17 11:33:29 +00:00
Michael Zuckerman
ede597c753
[AVX512] Adding VPERMQ VPERMPD Intrinsics
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Differential Revision: http://reviews.llvm.org/D16194
llvm-svn: 258006
2016-01-17 08:32:14 +00:00
Igor Breger
fc96331d88
AVX512: VMOVDQA32/64 (load) intrinsic implementation.
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Differential Revision: http://reviews.llvm.org/D16142
llvm-svn: 257749
2016-01-14 07:56:04 +00:00
Michael Zuckerman
0e31b22487
[AVX512] Adding PMOVSXBD/W/Q , PMOVZSDQ and PMOVZSWD/Q Intrinsics .
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Differential Revision: http://reviews.llvm.org/D16111
llvm-svn: 257604
2016-01-13 14:59:19 +00:00
Michael Zuckerman
43cea85db9
[AVX512] Adding PMOVZXBD/W/Q , PMOVZXDQ and PMOVZXWD/Q Intrinsics
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Differential Revision:http://reviews.llvm.org/D16071
llvm-svn: 257601
2016-01-13 14:25:21 +00:00
Michael Zuckerman
298a680c80
[AVX512] adding PRORQ , PRORD , PRORLVQ and PRORLVD Intrinsics
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Differential Revision: http://reviews.llvm.org/D16052
llvm-svn: 257594
2016-01-13 12:39:33 +00:00
Michael Zuckerman
2ddcbcf464
[AVX512] adding PROLQ and PROLD Intrinsics
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Differential Revision: http://reviews.llvm.org/D16048
llvm-svn: 257523
2016-01-12 21:19:17 +00:00
Igor Breger
ea8e8e9f97
AVX512: VPMOVAPS/PD and VPMOVUPS/PD (load) intrinsic implementation.
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Differential Revision: http://reviews.llvm.org/D16042
llvm-svn: 257463
2016-01-12 10:02:32 +00:00
Michael Zuckerman
885f61c534
[AVX512] add PRORVQ and PRORVD Intrinsic
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Differential Revision:http://reviews.llvm.org/D15955
llvm-svn: 257283
2016-01-10 09:16:41 +00:00
Michael Zuckerman
3aca221b31
[AVX512] add PSLLW and PSLLV Intrinsic
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Differential Revision: http://reviews.llvm.org/D15889
llvm-svn: 257070
2016-01-07 16:02:51 +00:00
Michael Zuckerman
354152d590
[AVX512] add PSRAV Intrinsic
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Differential Revision: http://reviews.llvm.org/D15856
llvm-svn: 257063
2016-01-07 14:42:20 +00:00
Michael Zuckerman
a6df006b50
[AVX512] add PSHUFHW and PSHUFLW Intrinsic
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Differential Revision: http://reviews.llvm.org/D15925
llvm-svn: 257056
2016-01-07 12:35:43 +00:00
Michael Zuckerman
4a1566827d
[AVX512] add PSHUFD Intrinsic
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Differential Revision: http://reviews.llvm.org/D15934
llvm-svn: 257044
2016-01-07 09:24:12 +00:00
Michael Zuckerman
5cbae95916
[AVX512] add PSLLD and PSLLQ Intrinsic
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Differential Revision: http://reviews.llvm.org/D15885
llvm-svn: 256840
2016-01-05 15:17:39 +00:00
Michael Zuckerman
cf0b6db9ef
[AVX512] add PSRAD and PSRAQ Intrinsic
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Differential Revision: http://reviews.llvm.org/D15851
llvm-svn: 256754
2016-01-04 13:45:45 +00:00
Michael Zuckerman
000fca44a8
[AVX512] add PSRAW Intrinsic
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Differential Revision: http://reviews.llvm.org/D15850
llvm-svn: 256751
2016-01-04 12:50:36 +00:00
Michael Zuckerman
068bc2f219
[AVX512] add PSRLV Intrinsic
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Differential Revision: http://reviews.llvm.org/D15838
llvm-svn: 256747
2016-01-04 11:39:06 +00:00