Commit Graph

338678 Commits

Author SHA1 Message Date
Fangrui Song aa708763d3 [MC] Add parameter `Address` to MCInstPrinter::printInst
printInst prints a branch/call instruction as `b offset` (there are many
variants on various targets) instead of `b address`.

It is a convention to use address instead of offset in most external
symbolizers/disassemblers. This difference makes `llvm-objdump -d`
output unsatisfactory.

Add `uint64_t Address` to printInst(), so that it can pass the argument to
printInstruction(). `raw_ostream &OS` is moved to the last to be
consistent with other print* methods.

The next step is to pass `Address` to printInstruction() (generated by
tablegen from the instruction set description). We can gradually migrate
targets to print addresses instead of offsets.

In any case, downstream projects which don't know `Address` can pass 0 as
the argument.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D72172
2020-01-06 20:42:22 -08:00
Matt Arsenault dc7b84c66c AMDGPU/GlobalISel: Fix unused variable warning in release 2020-01-06 22:31:33 -05:00
Nicolas Vasilache e3750cafdb [mlir][Linalg] Add a linalg.reshape op
Summary:
This diff adds a new operation to linalg to allow reshaping of an
existing view into a new view in the same buffer at the same offset.

More specifically:
The `linalg.reshape` op produces a new view whose sizes are a reassociation
of the original `view`. Depending on whether or not the reassociated
MemRefType is contiguous, the resulting memref may require explicit alloc
and copies.

A reassociation is defined as a continous grouping of dimensions and is
represented with a affine map array attribute. In the future, non-continous
groupings may be allowed (i.e. permutations, reindexings etc).

For now, it is assumed that either:
  1. a reassociation produces and consumes contiguous MemRefType or,
  2. the reshape op will be folded into its consumers (by changing the shape
     of the computations).
All other cases are undefined behavior and a reshape op may not lower to
LLVM if it cannot be proven statically that it does not require alloc+copy.

A reshape may either collapse or expand dimensions, depending on the
relationship between source and target memref ranks. The verification rule
is that the reassociation maps are applied to the memref with the larger
rank to obtain the memref with the smaller rank. In the case of a dimension
expansion, the reassociation maps can be interpreted as inverse maps.

Examples:

```mlir
   // Dimension collapse (i, j) -> i' and k -> k'
   %1 = linalg.reshape %0 [(i, j, k) -> (i, j),
                           (i, j, k) -> (k)] :
     memref<?x?x?xf32, stride_spec> into memref<?x?xf32, stride_spec_2>
```

```mlir
   // Dimension expansion i -> (i', j') and (k) -> (k')
   %1 = linalg.reshape %0 [(i, j, k) -> (i, j),
                           (i, j, k) -> (k)] :
     memref<?x?xf32, stride_spec> into memref<?x?x?xf32, stride_spec_2>
```

The relevant invalid and roundtripping tests are added.

Reviewers: AlexEichenberger, ftynse, rriddle, asaadaldien, yangjunpro

Subscribers: kiszk, merge_guards_bot, mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72168
2020-01-06 22:21:19 -05:00
QingShan Zhang d877229b5b [NFC][Test] Add a test to verify the DAGCombine of fma 2020-01-07 03:13:39 +00:00
Matt Arsenault e8d9d202bc AMDGPU: Add run line to int_to_fp tests
This wasn't catching a regression on targets with legal i16 triggered
in a future commit.
2020-01-06 21:38:50 -05:00
Matt Arsenault 452f6243c9 AMDGPU: Select llvm.amdgcn.interp.p2.f16 directly
This will enable automatic GlobalISel support in a future commit.
2020-01-06 20:34:21 -05:00
Richard Smith 907cefe721 Always deduce the lengths of contained parameter packs when deducing a
pack expansion.

Previously, if all parameter / argument pairs for a pack expansion
deduction were non-deduced contexts, we would not deduce the arity of
the pack, and could end up deducing a different arity (leading to
failures during substitution) or defaulting to an arity of 0 (leading to
bad diagnostics about passing the wrong number of arguments to a
variadic function). Instead, we now always deduce the arity for all
involved packs any time we deduce a pack expansion.

This will result in less substitution happening in some cases, which
could avoid non-SFINAEable errors, and should generally improve the
quality of diagnostics when passing initializer lists to variadic
functions.
2020-01-06 17:24:29 -08:00
Matt Arsenault e93b1ffc84 AMDGPU: Use default operands for clamp/omod
We have a lot of complex pattern variants that just set the source
modifiers that are really handled, and then set the output modifiers
to 0. We're unlikely to ever match output modifiers from the use
instruction side, and we already match clamp/omod in a separate pass.
2020-01-06 20:22:13 -05:00
Heejin Ahn 21f7b36209 [WebAssembly] Fix landingpad-only case in Emscripten EH
Summary:
Previously we didn't set `Changed` to true when there are only landing
pads but not invokes. This fixes it and we set `Changed` to true
whenever we have landing pads. (There can't be invokes without landing
pads, so that case is covered too)

The test case for this has to be a separate file because this pass is a
`ModulePass` and `Changed` is computed based on the whole module.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72308
2020-01-06 17:02:32 -08:00
Matt Arsenault 52afc93c38 AMDGPU/GlobalISel: Legalize G_READCYCLECOUNTER 2020-01-06 19:16:32 -05:00
Akira Hatanaka 20f005d25f [CodeGen][ObjC] Push the properties of a protocol before pushing the
properties of the protocol it inherits

This fixes a bug where the type string for a @dynamic property of an
@implementation didn't have 'D' in it when the protocol it conforms to
redeclares the property declared in the base protocol.

rdar://problem/45503561
2020-01-06 16:16:02 -08:00
Evgenii Stepanov 7ba4595c86 [msan] Fix underflow in qsort interceptor. 2020-01-06 16:12:52 -08:00
Mark de Wever 5e0e0e3ff0 [NFC] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.
2020-01-07 00:51:41 +01:00
Fangrui Song 6904cd9486 Add Triple::isX86()
Reviewed By: craig.topper, skan

Differential Revision: https://reviews.llvm.org/D72247
2020-01-06 15:51:02 -08:00
Akira Hatanaka c6fd16af2b Use FileCheck instead of grep 2020-01-06 15:50:23 -08:00
Matt Arsenault d4c9e13324 AMDGPU/GlobalISel: Select G_UADDE/G_USUBE 2020-01-06 18:27:52 -05:00
Matt Arsenault 4e85ca9562 AMDGPU/GlobalISel: Replace handling of boolean values
This solves selection failures with generated selection patterns,
which would fail due to inferring the SGPR reg bank for virtual
registers with a set register class instead of VCC bank. Use
instruction selection would constrain the virtual register to a
specific class, so when the def was selected later the bank no longer
was set to VCC.

Remove the SCC reg bank. SCC isn't directly addressable, so it
requires copying from SCC to an allocatable 32-bit register during
selection, so these might as well be treated as 32-bit SGPR values.

Now any scalar boolean value that will produce an outupt in SCC should
be widened during RegBankSelect to s32. Any s1 value should be a
vector boolean during selection. This makes the vcc register bank
unambiguous with a normal SGPR during selection.

Summary of how this should now work:

- G_TRUNC is always a no-op, and never should use a vcc bank result.

- SALU boolean operations should be promoted to s32 in RegBankSelect
  apply mapping

- An s1 value means vcc bank at selection. The exception is for
  legalization artifacts that use s1, which are never VCC. All other
  contexts should infer the VCC register classes for s1 typed
  registers. The LLT for the register is now needed to infer the
  correct register class. Extensions with vcc sources should be
  legalized to a select of constants during RegBankSelect.

- Copy from non-vcc to vcc ensures high bits of the input value are
  cleared during selection.

- SALU boolean inputs should ensure the inputs are 0/1. This includes
  select, conditional branches, and carry-ins.

There are a few somewhat dirty details. One is that G_TRUNC/G_*EXT
selection ignores the usual register-bank from register class
functions, and can't handle truncates with VCC result banks. I think
this is OK, since the artifacts are specially treated anyway. This
does require some care to avoid producing cases with vcc. There will
also be no 100% reliable way to verify this rule is followed in
selection in case of register classes, and violations manifests
themselves as invalid copy instructions much later.

Standard phi handling also only considers the bank of the result
register, and doesn't insert copies to make the source banks
match. This doesn't work for vcc, so we have to manually correct phi
inputs in this case. We should add a verifier check to make sure there
are no phis with mixed vcc and non-vcc register bank inputs.

There's also some duplication with the LegalizerHelper, and some code
which should live in the helper. I don't see a good way to share
special knowledge about what types to use for intermediate operations
depending on the bank for example. Using the helper to replace
extensions with selects also seems somewhat awkward to me.

Another issue is there are some contexts calling
getRegBankFromRegClass that apparently don't have the LLT type for the
register, but I haven't yet run into a real issue from this.

This also introduces new unnecessary instructions in most cases, since
we don't yet try to optimize out the zext when the source is known to
come from a compare.
2020-01-06 18:26:42 -05:00
Matt Arsenault 26f714ff43 TableGen/GlobalISel: Handle default operands that are used
Copy the logic from the existing handling in the DAG matcher emittter.

This will enable some AMDGPU pattern cleanups without breaking
GlobalISel tests, and eventually handle importing more patterns.

The test is a bit annoying since the sections seem to randomly sort
themselves if anything else is added in the future.
2020-01-06 18:26:42 -05:00
Matt Arsenault f3de8ab5cc GlobalISel: Implement lower for G_INTRINSIC_ROUND
Mostly copied from AMDGPU lowering implementation, except used
G_SITOFP instead of directly creating a select on -1.0, 0.0.
2020-01-06 18:26:42 -05:00
Jason Molenda 450073c639 Change the patterns to include the prefix '= ' so we don't pass errantly.
Looking at a sometimes-passing test case on a platform
where random values were being returned - sometimes
the expected digit ('1' or '2') would be included in the
random returned value.  Add a prefix to reduce the likelihood of
this a bit.
2020-01-06 15:20:13 -08:00
Philip Reames 08d17cb065 [X86] Move an enum definition into a header to simplify future patches [NFC] 2020-01-06 15:14:42 -08:00
Evgenii Stepanov b5e7f95cfb [msan] Check qsort input.
Summary:
Qsort interceptor suppresses all checks by unpoisoning the data in the
wrapper of a comparator function, and then unpoisoning the output array
as well.

This change adds an explicit run of the comparator on all elements of
the input array to catch any sanitizer bugs.

Reviewers: vitalybuka

Subscribers: #sanitizers, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D71780
2020-01-06 15:07:02 -08:00
Davide Italiano 59fadc14ee [NSArray] Remove a very old and deprecated formatter.
Checked with the Foundation folks.
2020-01-06 14:58:37 -08:00
Petr Hosek 71a2a62163 [CMake] Pass symlink dependency to add_llvm_install_targets explicitly
The install-${name}-stripped targets don't strip when ${name} is being
symlinked, e.g. llvm-ar or llvm-objcopy. The problem is that
llvm_install_symlink passes install-${dest} as a dependency of
install-${name}, e.g. install-llvm-ar becomes a dependency of both
install-llvm-ranlib and install-llvm-ranlib-stripped. What this means is
that when installing a distribution that contains both llvm-ar and
llvm-ranlib is that first the stripped version of llvm-ar is installed
(by the install-llvm-ar-stripped target) and then it's overwritten by an
unstripped version of llvm-ar bnecause install-llvm-ranlib-stripped has
install-llvm-ranlib as a dependency as mentioned earlier. To avoid this
issue, rather than passing the install-${dest} as dependency, we
introduce a new argument to add_llvm_install_targets for symlink target
which expands it into an appropriate dependency, i.e. install-${dest}
for install-${name} target and install-${dest}-stripped for
install-${name}-stripped.

Differential Revision: https://reviews.llvm.org/D71951
2020-01-06 14:51:32 -08:00
Bill Wendling 83d690a149 Don't rely on 'l'(ell) modifiers to indicate a label reference
Summary:
It's not necessary to use an 'l'(ell) modifier when referencing a label.
Treat block addresses and MBB references as if the modifier is used
anyway. This prevents us from generating references to ficticious
labels.

Reviewers: jyknight, nickdesaulniers, hfinkel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71849
2020-01-06 14:44:03 -08:00
Thomas Preud'homme d8fd92eaaa [FileCheck] Remove FileCheck prefix in API
Summary:
When FileCheck was made a library, types in the public API were renamed
to add a FileCheck prefix, such as Pattern to FileCheckPattern. Many
types were moved into a private interface and thus don't need this
prefix anymore. This commit removes those unneeded prefixes.

Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk

Reviewed By: jhenderson

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72186
2020-01-06 22:28:23 +00:00
Jinsong Ji 24ee4edee8 [PowerPC][NFC] Rename record instructions to use _rec suffix instead of o
We use o suffix to indicate record form instuctions,
(as it is similar to dot '.' in mne?)

This was fine before, as we did not support XO-form.
However, with https://reviews.llvm.org/D66902,
we now have XO-form support.

It becomes confusing now to still use 'o' for record form,
and it is weird to have something like 'Oo' .

This patch rename all 'o' instructions to use '_rec' instead.
Also rename `isDot` to `isRecordForm`.

Reviewed By: #powerpc, hfinkel, nemanjai, steven.zhang, lkail

Differential Revision: https://reviews.llvm.org/D70758
2020-01-06 22:27:07 +00:00
Tyker f5329bfc76 [Diagnostic] make Wmisleading-indendation not warn about labels
Reviewers: aaron.ballman, xbolva00

Reviewed By: aaron.ballman

Subscribers: nickdesaulniers, nathanchance

Differential Revision: https://reviews.llvm.org/D72202
2020-01-06 23:22:27 +01:00
Matt Arsenault ee6b8722ff GlobalISel: Fix unsupported legalize action
This would complain about invalid legalizer rules otherwise.

Mark some operations as unsupported for AMDGPU. This currently seems
to produce the same legalize error as when no rules are defined, but
eventually this should produce a proper user facing error.
2020-01-06 17:21:51 -05:00
Matt Arsenault 1060b9e23b GlobalISel: Correct result type for G_FCMP in lowerFPTOUI
Using the final result type doesn't make any sense. Use the natural
default boolean type for the select condition.
2020-01-06 17:21:51 -05:00
Matt Arsenault 0b093f0212 GlobalISel: Start adding computeNumSignBits to GISelKnownBits 2020-01-06 17:21:51 -05:00
Matt Arsenault 7f2db2917d AMDGPU: Fix legalizing f16 fpow
The existing test only covered one case for r600. The use of
mul_legacy also looks suspicious to me, but leave it for now. The
patterns are also not making use of source modifiers.
2020-01-06 17:21:51 -05:00
Matt Arsenault a506efff18 AMDGPU: Use ImmLeaf
This solves one GlobalISel importer error, but the pattern still fails
for another reason.
2020-01-06 17:21:51 -05:00
Matt Arsenault 14d25052a2 AMDGPU: Use ImmLeaf for inline immediate predicates 2020-01-06 17:21:51 -05:00
Matt Arsenault 5518a02a83 llc/MIR: Fix setFunctionAttributes for MIR functions
A random set of attributes are implemented by llc/opt forcing the
string attributes on the IR functions before processing anything. This
would not happen for MIR functions, which have not yet been created at
this point.

Use a callback in the MIR parser, purely to avoid dealing with the
ugliness that the command line flags are in a .inc file, and would
require allowing access to these flags from multiple places (either
from the MIR parser directly, or a new utility pass to implement these
flags). It would probably be better to cleanup the flag handling into
a separate library.

This is in preparation for treating more command line flags with a
corresponding function attribute in a more uniform way. The fast math
flags in particular have a messy system where the command line flag
sets the behavior from a function attribute if present, and otherwise
the command line flag. This means if any other pass tries to inspect
the function attributes directly, it will be inconsistent with the
intended behavior. This is also inconsistent with the current behavior
of -mcpu and -mattr, which overwrites any pre-existing function
attributes. I would like to move this to consistenly have the command
line flags not overwrite any pre-existing attributes, and to always
ensure the command line flags are consistent with the function
attributes.
2020-01-06 17:21:51 -05:00
Craig Topper 6a0564adcf [X86] Improve v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets.
Use zext+or+fsub to do the conversion. Similar to D71971.

Differential Revision: https://reviews.llvm.org/D71971
2020-01-06 14:07:35 -08:00
Jonas Devlieghere 317cbdad4d [lldb/Docs] Describe optional dependencies on build page.
List the different CMake flags controlling the optional dependencies as
per the discussion on the mailing list:

http://lists.llvm.org/pipermail/lldb-dev/2020-January/015867.html
2020-01-06 13:59:24 -08:00
Craig Topper 62f3403bfc [LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCS
This patch adds widening which really just scalarizes because we don't have a strategy for the extra elements we would need to pad with.

Differential Revision: https://reviews.llvm.org/D72193
2020-01-06 13:45:55 -08:00
Craig Topper ca868002d3 [X86] Rename vec-strict-*-cmp.ll to vec-strict-cmp-*.ll to match other strict files wich have the size at the end. NFC 2020-01-06 13:45:55 -08:00
Alexey Bataev 7b518dcb29 [OPENMP50]Support lastprivate conditional updates in inc/dec unary ops.
Added support for checking of updates of variables used in unary
pre(pos) inc/dec expressions.
2020-01-06 16:37:01 -05:00
stevewan 02f694b69a [NFC] Test commit, revert whitespace change
As per the Developer Policy, upon obtaining commit access.
2020-01-06 16:28:13 -05:00
stevewan b73fea6a7c [NFC] Test commit, whitespace change
As per the Developer Policy, upon obtaining commit access.
2020-01-06 16:24:27 -05:00
Sanjay Patel 22cec48dac [x86] add tests for concat self + shuffle; NFC 2020-01-06 15:28:33 -05:00
Kelvin Li 19433b199d [OpenMP] Fix incorrect property of __has_attribute() macro
__has_attribute(fallthough) -> __has_attribute(fallthrough)

Submitted by: kiszk (Kazuaki Ishizaki <ishizaki@jp.ibm.com>)

Differential Revision: https://reviews.llvm.org/D72287
2020-01-06 15:00:10 -05:00
Evgenii Stepanov 40a80a0a19 Lower TAGPstack with negative offset to SUBG.
Summary:
This never really occurs in the current codegen, so only a MIR test is
possible.

Reviewers: ostannard, pcc

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72123
2020-01-06 11:48:35 -08:00
Amara Emerson df3f4e0d77 [X86] Fix an 8 bit testb being selected when folding a volatile i32 load pattern.
Differential Revision: https://reviews.llvm.org/D71581
2020-01-06 11:46:42 -08:00
Jinsong Ji e29a2e6be4 [PowerPC][LoopVectorize] Extend getRegisterClassForType to consider double and other floating point type
In https://reviews.llvm.org/D67148, we use isFloatTy to test floating
point type, otherwise we return GPRRC.
So 'double' will be classified as GPRRC, which is not accurate.

This patch covers other floating point types.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D71946
2020-01-06 18:44:59 +00:00
Kazuaki Ishizaki 7ae3d33546 [lld] Fix trivial typos in comments
Reviewed By: ruiu, MaskRay

Differential Revision: https://reviews.llvm.org/D72196
2020-01-06 10:25:48 -08:00
Siva Chandra Reddy 5b24c08817 [libc] Move all tests to a top level `test` directory.
A toplevel target, `check-libc` has also been added.

Reviewers: abrachet, phosek

Tags: #libc-project

Differential Revision: https://reviews.llvm.org/D72177
2020-01-06 10:14:43 -08:00
Jonas Devlieghere 0239526ccc [lldb/Docs] Fix capitalization typo.
This has been bothering me for way too long.
2020-01-06 10:08:05 -08:00