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20046 Commits

Author SHA1 Message Date
Chris Lattner aa6cbd90c5 Remove some dead vectors 
llvm-svn: 23329
 2005-09-13 18:47:49 +00:00
Chris Lattner 2a8932960d Add a simple xform to simplify array accesses with casts in the way. 
This is useful for 178.galgel where resolution of dope vectors (by the
optimizer) causes the scales to become apparent.

llvm-svn: 23328
 2005-09-13 18:36:04 +00:00
Chris Lattner fd018c8dfe Fix an issue where LSR would miss rewriting a use of an IV expression by a PHI node that is not the original PHI. 
This fixes up a dot-product loop in galgel, speeding it up from 18.47s to
16.13s.

llvm-svn: 23327
 2005-09-13 02:09:55 +00:00
Duraid Madina a78635c1f0 fails since linux-itanium headers are Different 
llvm-svn: 23326
 2005-09-13 01:03:53 +00:00
Chris Lattner 567b81f0d2 Add a helper function, allowing us to simplify some code a bit, changing 
indentation, no functionality change

llvm-svn: 23325
 2005-09-13 00:40:14 +00:00
Chris Lattner 219175c84d Implement a simple xform to turn code like this: 
if () { store A -> P; } else { store B -> P; }

into a PHI node with one store, in the most trival case.  This implements
load.ll:test10.

llvm-svn: 23324
 2005-09-12 23:23:25 +00:00
Chris Lattner 42a6cefa49 new testcase 
llvm-svn: 23323
 2005-09-12 23:22:17 +00:00
Chris Lattner e0bfdf1485 Another load-peephole optimization: do gcse when two loads are next to 
each other.  This implements InstCombine/load.ll:test9

llvm-svn: 23322
 2005-09-12 22:21:03 +00:00
Chris Lattner 20c1cc0741 new testcase 
llvm-svn: 23321
 2005-09-12 22:19:46 +00:00
Chris Lattner b990f7d8ed Implement a trivial form of store->load forwarding where the store and the 
load are exactly consequtive.  This is picked up by other passes, but this
triggers thousands of times in fortran programs that use static locals
(and is thus a compile-time speedup).

llvm-svn: 23320
 2005-09-12 22:00:15 +00:00
Chris Lattner 4cd474ebbd new testcase 
llvm-svn: 23319
 2005-09-12 21:59:22 +00:00
Chris Lattner 8048b85e8f Fix a regression from last night, which caused this pass to create invalid 
code for IV uses outside of loops that are not dominated by the latch block.
We should only convert these uses to use the post-inc value if they ARE
dominated by the latch block.

Also use a new LoopInfo method to simplify some code.

This fixes Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll

llvm-svn: 23318
 2005-09-12 17:11:27 +00:00
Chris Lattner 2ee807c70f relax pattern match on name 
llvm-svn: 23317
 2005-09-12 17:09:40 +00:00
Chris Lattner 7efb86dc11 new testcase 
llvm-svn: 23316
 2005-09-12 17:08:15 +00:00
Chris Lattner b35df5f5bc Add a new getLoopLatch() method. 
llvm-svn: 23315
 2005-09-12 17:03:55 +00:00
Chris Lattner 589e605f42 new method 
llvm-svn: 23314
 2005-09-12 17:03:16 +00:00
Chris Lattner a67648396a _test: 
li r2, 0
LBB_test_1:     ; no_exit.2
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmpwi cr0, r2, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r2, 1
        stw r2, 0(r4)
        blr
[zion ~/llvm]$ cat > ~/xx
Uses of IV's outside of the loop should use hte post-incremented version
of the IV, not the preincremented version.  This helps many loops (e.g. in sixtrack)
which used to generate code like this (this is the code from the
dont-hoist-simple-loop-constants.ll testcase):

_test:
        li r2, 0                 **** IV starts at 0
LBB_test_1:     ; no_exit.2
        or r5, r2, r2            **** Copy for loop exit
        li r2, 0
        stw r2, 0(r3)
        addi r3, r3, 4
        addi r2, r5, 1
        addi r6, r5, 2           **** IV+2
        cmpwi cr0, r6, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r5, 2       ****  IV+2
        stw r2, 0(r4)
        blr

And now generated code like this:

_test:
        li r2, 1               *** IV starts at 1
LBB_test_1:     ; no_exit.2
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmpwi cr0, r2, 701     *** IV.postinc + 0
        blt cr0, LBB_test_1
LBB_test_2:     ; loopexit.2.loopexit
        stw r2, 0(r4)          *** IV.postinc + 0
        blr

llvm-svn: 23313
 2005-09-12 06:04:47 +00:00
Chris Lattner 2bb00dda5a new testcase 
llvm-svn: 23312
 2005-09-12 05:50:15 +00:00
Chris Lattner d0c7a5eeb7 Regenerate 
llvm-svn: 23311
 2005-09-12 05:30:06 +00:00
Chris Lattner 564d240799 Rearrange two rules, which apparently makes some versions of bison happier. 
llvm-svn: 23310
 2005-09-12 05:29:43 +00:00
Chris Lattner ecd98d5d77 Make sure to disable 64-bit extensions for this test 
llvm-svn: 23309
 2005-09-11 03:50:38 +00:00
Jeff Cohen e19ca3ab0c Fix more Visual Studio build problems. 
llvm-svn: 23308
 2005-09-10 02:33:17 +00:00
Jeff Cohen 0dce12dd90 Fix miscellaneous Visual Studio build problems. 
llvm-svn: 23307
 2005-09-10 02:00:02 +00:00
Chris Lattner 530fe6ab30 implement Transforms/LoopStrengthReduce/dont-hoist-simple-loop-constants.ll. 
We used to emit this code for it:

_test:
        li r2, 1     ;; Value tying up a register for the whole loop
        li r5, 0
LBB_test_1:     ; no_exit.2
        or r6, r5, r5
        li r5, 0
        stw r5, 0(r3)
        addi r5, r6, 1
        addi r3, r3, 4
        add r7, r2, r5  ;; should be addi r7, r5, 1
        cmpwi cr0, r7, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r6, 2
        stw r2, 0(r4)
        blr

now we emit this:

_test:
        li r2, 0
LBB_test_1:     ; no_exit.2
        or r5, r2, r2
        li r2, 0
        stw r2, 0(r3)
        addi r3, r3, 4
        addi r2, r5, 1
        addi r6, r5, 2   ;; whoa, fold those adds!
        cmpwi cr0, r6, 701
        blt cr0, LBB_test_1     ; no_exit.2
LBB_test_2:     ; loopexit.2.loopexit
        addi r2, r5, 2
        stw r2, 0(r4)
        blr

more improvement coming.

llvm-svn: 23306
 2005-09-10 01:18:45 +00:00
Chris Lattner 0c7728e4d6 new testcase 
llvm-svn: 23305
 2005-09-10 01:14:37 +00:00
Chris Lattner 4309c3a785 PowerPC cannot truncstore i1 natively 
llvm-svn: 23304
 2005-09-10 00:21:06 +00:00
Chris Lattner 2d454bf5be Allow targets to say they don't support truncstore i1 (which includes a mask 
when storing to an 8-bit memory location), as most don't.

llvm-svn: 23303
 2005-09-10 00:20:18 +00:00
Chris Lattner bd39c1a4c6 Add a missing #include, patch courtesy of Baptiste Lepilleur. 
llvm-svn: 23302
 2005-09-09 23:53:39 +00:00
Chris Lattner 331b311f7b Fix a problem duraid encountered on itanium where this folding: 
select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32.  Add the zero extend as needed.

llvm-svn: 23301
 2005-09-09 23:00:07 +00:00
Chris Lattner 16e5cb87ba Fix a crash viewing dags that have target nodes in them 
llvm-svn: 23300
 2005-09-09 22:35:03 +00:00
Chris Lattner 0f2146bb5d I forgot that we always spill fp values as 64-bits. Implement spill folding 
for FP as well.  This triggers a couple dozen times on 177.mesa (for example).

llvm-svn: 23299
 2005-09-09 21:59:44 +00:00
Chris Lattner 712e78ee28 Fix a problem that Nate noticed, where spill code was not getting coallesced 
with copies, leading to code like this:

       lwz r4, 380(r1)
       or r10, r4, r4    ;; Last use of r4

By teaching the PPC backend how to fold spills into copies, we now get this
code:

       lwz r10, 380(r1)

wow. :)

This reduces a testcase nate sent me from 1505 instructions to 1484.

Note that this could handle FP values but doesn't currently, for reasons
mentioned in the patch

llvm-svn: 23298
 2005-09-09 21:46:49 +00:00
Chris Lattner f540c1a2e8 code cleanup 
llvm-svn: 23297
 2005-09-09 20:51:08 +00:00
Chris Lattner 1410003751 Use continue in the use-processing loop to make it clear what the early exits 
are, simplify logic, and cause things to not be nested as deeply.  This also
uses MRI->areAliases instead of an explicit loop.

No functionality change, just code cleanup.

llvm-svn: 23296
 2005-09-09 20:29:51 +00:00
Nate Begeman 049b748c76 Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such 
as setcc and select next.

llvm-svn: 23295
 2005-09-09 19:49:52 +00:00
Chris Lattner ce3662f2a2 remove debugging code *slaps head* 
llvm-svn: 23294
 2005-09-09 19:19:20 +00:00
Chris Lattner c9053083eb When spilling a live range that is used multiple times by one instruction, 
only add a reload live range once for the instruction.  This is one step
towards fixing a regalloc pessimization that Nate notice, but is later undone
by the spiller (so no code is changed).

llvm-svn: 23293
 2005-09-09 19:17:47 +00:00
Chris Lattner c37a2f13c4 Teach the code generator that rlwimi is commutable if the rotate amount 
is zero.  This lets the register allocator elide some copies in some cases.

This implements CodeGen/PowerPC/rlwimi-commute.ll

llvm-svn: 23292
 2005-09-09 18:17:41 +00:00
Jim Laskey 48356a50f3 Added targets to speed up build of llc. 
llvm-svn: 23291
 2005-09-09 17:50:20 +00:00
Chris Lattner db9f4b9db4 New testcase, neither should require a register-register copy 
llvm-svn: 23290
 2005-09-09 17:48:57 +00:00
Chris Lattner ce2173d098 add an accessor to provide more checking 
llvm-svn: 23289
 2005-09-09 01:15:01 +00:00
Chris Lattner 7a82c06f34 use new accessors to simplify code. Add checking to make sure top-level instr 
definitions are void

llvm-svn: 23288
 2005-09-09 01:11:44 +00:00
Chris Lattner 91d8672be1 add some accessors 
llvm-svn: 23287
 2005-09-09 01:11:17 +00:00
Chris Lattner 39b4d83f6a Introduce two new concepts: 
1. Add support for defining Pattern's, which can match expressions when there
   is no instruction that directly implements something.  Instructions usually
   implicitly define patterns.
2. Add support for defining SDNodeXForm's, which are node transformations.
   This seperates the concept of a node xform out from the existing predicate
   support.

Using this new stuff, we add a few instruction patterns, one for testing, and
two for OR/XOR by an arbitrary immediate.

llvm-svn: 23286
 2005-09-09 00:39:56 +00:00
Chris Lattner debd6e95ab Fix incorrect comment 
llvm-svn: 23285
 2005-09-08 23:26:30 +00:00
Chris Lattner d7d31f3b06 Implement a complete type inference system for dag patterns, based on the 
constraints defined in the DAG node definitions in the .td files.  This
allows us to infer (and check!) the types for all nodes in the current
ppc .td file.  For example, instead of:

Inst pattern EQV:       (set GPRC:i32:$rT, (xor (xor GPRC:i32:$rA, GPRC:i32:$rB), (imm)<<Predicate_immAllOnes>>))

we now fully infer:

Inst pattern EQV:       (set:void GPRC:i32:$rT, (xor:i32 (xor:i32 GPRC:i32:$rA, GPRC:i32:$rB), (imm:i32)<<Predicate_immAllOnes>>))

from:  (set GPRC:$rT, (not (xor GPRC:$rA, GPRC:$rB)))
llvm-svn: 23284
 2005-09-08 23:22:48 +00:00
Chris Lattner 4b09f3c6f5 whitespace/comment changes, no functionality diffs 
llvm-svn: 23283
 2005-09-08 23:17:26 +00:00
Chris Lattner cee994b464 Compute the value types that are natively supported by a target. 
llvm-svn: 23282
 2005-09-08 21:43:21 +00:00
Chris Lattner 1c33104010 Parse information about type constraints on SDNodes 
llvm-svn: 23281
 2005-09-08 21:27:15 +00:00
Chris Lattner a3b89dfcef use node info in the one place we currently use it 
llvm-svn: 23280
 2005-09-08 21:04:46 +00:00