Commit Graph

3153 Commits

Author SHA1 Message Date
Mandeep Singh Grang ac24bb53bb [RISCV] Enable __int128_t and __uint128_t through clang flag
Summary:
If the flag -fforce-enable-int128 is passed, it will enable support for __int128_t and __uint128_t types.
This flag can then be used to build compiler-rt for RISCV32.

Reviewers: asb, kito-cheng, apazos, efriedma

Reviewed By: asb, efriedma

Subscribers: shiva0217, efriedma, jfb, dschuff, sdardis, sbc100, jgravelle-google, aheejin, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, cfe-commits

Differential Revision: https://reviews.llvm.org/D43105

llvm-svn: 326045
2018-02-25 03:58:23 +00:00
Petr Hosek bf45ecef66 [Driver] Make -fno-common default for Fuchsia
We never want to generate common symbols on Fuchsia.

Differential Revision: https://reviews.llvm.org/D43545

llvm-svn: 325945
2018-02-23 20:10:14 +00:00
Hans Wennborg d43f40df1c Support for the mno-stack-arg-probe flag
Adds support for this flag. There is also another piece for llvm
(separate review). More info:
https://bugs.llvm.org/show_bug.cgi?id=36221

By Ruslan Nikolaev!

Differential Revision: https://reviews.llvm.org/D43108

llvm-svn: 325901
2018-02-23 13:47:36 +00:00
Alexey Sotkin 20f65928e1 [OpenCL] Add '-cl-uniform-work-group-size' compile option
Summary:
OpenCL 2.0 specification defines '-cl-uniform-work-group-size' option,
which requires that the global work-size be a multiple of the work-group
size specified to clEnqueueNDRangeKernel and allows optimizations that
are made possible by this restriction.

The patch introduces the support of this option.

To keep information about whether an OpenCL kernel has uniform work
group size or not, clang generates 'uniform-work-group-size' function
attribute for every kernel:
- "uniform-work-group-size"="true" for OpenCL 1.2 and lower,
- "uniform-work-group-size"="true" for OpenCL 2.0 and higher if
 '-cl-uniform-work-group-size' option was specified,
- "uniform-work-group-size"="false" for OpenCL 2.0 and higher if no
 '-cl-uniform-work-group-size' options was specified.

If the function is not an OpenCL kernel, 'uniform-work-group-size'
attribute isn't generated.

Patch by: krisb

Reviewers: yaxunl, Anastasia, b-sumner

Reviewed By: yaxunl, Anastasia

Subscribers: nhaehnle, yaxunl, Anastasia, cfe-commits

Differential Revision: https://reviews.llvm.org/D43570

llvm-svn: 325771
2018-02-22 11:54:14 +00:00
Kamil Rytarowski 966642d5bb Revert part of D43378 in this file
It causes failure on clang-x86_64-debian-fast.

llvm-svn: 325749
2018-02-22 07:00:29 +00:00
Kamil Rytarowski 30c0a37526 Revert part of r. 325746 D43378
test/Driver/XRay/xray-shared-noxray.cpp fails on !Linux hosts.

llvm-svn: 325748
2018-02-22 06:48:34 +00:00
Kamil Rytarowski 3e4e74cbe5 FreeBSD driver / Xray flags moving pthread to compile flags.
Summary:
- Using -lpthread instead, with -pthread the linkage does not work.
-Warning about the -fxray-instrument usage outside of the working cases.

Patch by: David CARLIER

Reviewers: krytarowski, vitalybuka, dberris, emaste

Reviewed By: krytarowski, emaste

Subscribers: srhines, emaste, cfe-commits

Differential Revision: https://reviews.llvm.org/D43378

llvm-svn: 325746
2018-02-22 06:31:40 +00:00
Dan Albert e12561dd1a [Driver] Generate .eh_frame_hdr for static executables too.
Summary: libgcc won't unwind without an .eh_frame_hdr section.

Reviewers: srhines, chandlerc

Reviewed By: chandlerc

Subscribers: chandlerc, cfe-commits

Differential Revision: https://reviews.llvm.org/D43203

llvm-svn: 325733
2018-02-21 22:36:51 +00:00
Simon Dardis 0bc2d9b0c5 [mips] Spectre variant two mitigation for MIPSR2
This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It provides the option
-mindirect-jump=hazard, which instructs the LLVM backend to replace
indirect branches with their hazard barrier variants.

This option is accepted when targeting MIPS revision two or later.

The migitation strategy suggested by MIPS for these processors is to
use two hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the option -mindirect-jump=hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Implementation note: I've opted to provide this as an
-mindirect-jump={hazard,...} style option in case alternative
mitigation methods are required for other implementations of the MIPS
ISA in future, e.g. retpoline style solutions.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D43487

llvm-svn: 325651
2018-02-21 00:05:05 +00:00
Richard Smith 6cd4861c22 When multiple sanitizers are enabled (ubsan + something else), use all relevant blacklists.
Ideally, we'd only use the ubsan blacklist for ubsan sanitizers, and only use
the other-sanitizer blacklist for its sanitizers, but this at least enables the
intended suppressions.

llvm-svn: 325640
2018-02-20 23:17:41 +00:00
Hans Wennborg b8f369d636 clang-cl: Make /d1PP an alias for -dD (PR36446)
llvm-svn: 325571
2018-02-20 10:47:14 +00:00
Keith Walker 167961f6dc [ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,

  -mfloat-abi=soft -fpu=neon

If any floating point features which require FPU hardware are enabled
they must be disable.

There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).

Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.

Differential Revision: https://reviews.llvm.org/D42569

llvm-svn: 325492
2018-02-19 12:40:26 +00:00
Martin Bohme b5f8ca47e7 Add -no-canonical-prefixes to allow different build modes.
llvm-svn: 325236
2018-02-15 13:50:07 +00:00
Konstantin Zhuravlyov cf71761495 Reapply r325193
llvm-svn: 325203
2018-02-15 02:37:04 +00:00
Konstantin Zhuravlyov b7b86127f5 Revert r325193 as it breaks buildbots
llvm-svn: 325200
2018-02-15 02:27:45 +00:00
Konstantin Zhuravlyov b4c83a0bff AMDGPU: Enable PIC by default for amdgcn
Differential Revision: https://reviews.llvm.org/D43094

llvm-svn: 325196
2018-02-15 01:01:53 +00:00
Konstantin Zhuravlyov 5c9d4e7957 AMDGPU: Cleanup most of the macros
- Insert __AMD__ macro
- Insert __AMDGPU__ macro
- Insert __devicename__ macro
- Add missing tests for arch macros

Differential Revision: https://reviews.llvm.org/D36802

llvm-svn: 325193
2018-02-15 00:20:26 +00:00
John Baldwin f7854b669a Look for 32-bit libraries in /usr/lib32 for MIPS O32 on FreeBSD.
Summary:
FreeBSD N64 MIPS systems can include 32-bit libraries for O32 in
/usr/lib32 similar to the 32-bit compatibility libraries provided
for FreeBSD/amd64 and FreeBSD/powerpc64.

Reviewers: dim

Reviewed By: dim

Differential Revision: https://reviews.llvm.org/D42972

llvm-svn: 324948
2018-02-12 22:22:01 +00:00
Jonas Hahnfeld 5379c6d6fd [CUDA] Add option to generate relocatable device code
As a first step, pass '-c/--compile-only' to ptxas so that it
doesn't complain about references to external function. This
will successfully generate object files, but they won't work
at runtime because the registration routines need to adapted.

Differential Revision: https://reviews.llvm.org/D42921

llvm-svn: 324878
2018-02-12 10:46:45 +00:00
Jonas Hahnfeld 15dd8c6c32 [CUDA] Fix test cuda-external-tools.cu
This didn't verify the CHECK prefix before!

Differential Revision: https://reviews.llvm.org/D42920

llvm-svn: 324877
2018-02-12 10:46:34 +00:00
Konstantin Zhuravlyov 76854e7daa AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
- Remove gfx800
- Remove gfx804
- Remove gfx901
- Remove gfx903

Differential Revision: https://reviews.llvm.org/D40045

llvm-svn: 324714
2018-02-09 07:02:28 +00:00
Rafael Espindola 699f5d6bbc Recommit r324107 again.
The difference from the previous try is that we no longer directly
access function declarations from position independent executables. It
should work, but currently doesn't with some linkers.

It now includes a fix to not mark available_externally definitions as
dso_local.

Original message:

Start setting dso_local in clang.

This starts adding dso_local to clang.

The hope is to eventually have TargetMachine::shouldAssumeDsoLocal go
away. My objective for now is to move enough of it to clang to remove
the need for the TargetMachine one to handle PIE copy relocations and
-fno-plt. With that it should then be easy to implement a
-fno-copy-reloc in clang.

This patch just adds the cases where we assume a symbol to be local
based on the file being compiled for an executable or a shared
library.

llvm-svn: 324535
2018-02-07 22:15:33 +00:00
Rafael Espindola 880c3b24c5 Revert "Recommit r324107."
This reverts commit r324500.

The bots found two failures:

    ThreadSanitizer-x86_64 :: Linux/pie_no_aslr.cc
    ThreadSanitizer-x86_64 :: pie_test.cc

when using gold. The issue is a limitation in gold when building pie
binaries. I will investigate how to work around it.

llvm-svn: 324505
2018-02-07 19:44:15 +00:00
Rafael Espindola fa9874c33b Recommit r324107.
It now includes a fix to not mark available_externally definitions as
dso_local.

Original message:

Start setting dso_local in clang.

This starts adding dso_local to clang.

The hope is to eventually have TargetMachine::shouldAssumeDsoLocal go
away. My objective for now is to move enough of it to clang to remove
the need for the TargetMachine one to handle PIE copy relocations and
-fno-plt. With that it should then be easy to implement a
-fno-copy-reloc in clang.

This patch just adds the cases where we assume a symbol to be local
based on the file being compiled for an executable or a shared
library.

llvm-svn: 324500
2018-02-07 19:16:49 +00:00
Eric Fiselier 123c749ee9 [Driver] Add option to manually control discarding value names in LLVM IR.
Summary:
Currently, assertion-disabled Clang builds emit value names when generating LLVM IR. This is controlled by the `NDEBUG` macro, and is not easily overridable. In order to get IR output containing names from a release build of Clang, the user must manually construct the CC1 invocation w/o the `-discard-value-names` option. This is less than ideal.

For example, Godbolt uses a release build of Clang, and so when asked to emit LLVM IR the result lacks names, making it harder to read. Manually invoking CC1 on Compiler Explorer is not feasible.

This patch adds the driver options `-fdiscard-value-names` and `-fno-discard-value-names` which allow the user to override the default behavior. If neither is specified, the old behavior remains.

Reviewers: erichkeane, aaron.ballman, lebedev.ri

Reviewed By: aaron.ballman

Subscribers: bogner, cfe-commits

Differential Revision: https://reviews.llvm.org/D42887

llvm-svn: 324498
2018-02-07 18:36:51 +00:00
Alex Shlyapnikov 1fbf7abcc9 Fix test/Driver/sanitizer-ld.c broken by D40903
Differential revision: https://reviews.llvm.org/D40903

llvm-svn: 324302
2018-02-06 00:50:18 +00:00
Rafael Espindola 9f34b7b93b Revert "Start setting dso_local in clang."
This reverts commit r324107.

I will have to test it on OS X.

llvm-svn: 324108
2018-02-02 17:29:22 +00:00
Rafael Espindola 7e34a308ff Start setting dso_local in clang.
This starts adding dso_local to clang.

The hope is to eventually have TargetMachine::shouldAssumeDsoLocal go
away. My objective for now is to move enough of it to clang to remove
the need for the TargetMachine one to handle PIE copy relocations and
-fno-plt. With that it should then be easy to implement a
-fno-copy-reloc in clang.

This patch just adds the cases where we assume a symbol to be local
based on the file being compiled for an executable or a shared
library.

llvm-svn: 324107
2018-02-02 17:17:39 +00:00
Sam Clegg 7892ae44b4 [WebAssembly] Don't pass -ffunction-section/-fdata-sections
llvm currently forces both of these to true to passing them
is redundant.

Differential Revision: https://reviews.llvm.org/D37831

llvm-svn: 323897
2018-01-31 18:55:22 +00:00
Ana Pazos 3625e0589c Revert "Revert rC322769: [RISCV] Propagate -mabi and -march values to GNU assembler."
Summary: Bringing back the code change and simplified test cases to test 32/64 bit targets.

Reviewers: asb, yroux, inouehrs, mgrang

Reviewed By: yroux, inouehrs

Subscribers: cfe-commits, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD

Differential Revision: https://reviews.llvm.org/D42666

llvm-svn: 323894
2018-01-31 18:11:09 +00:00
Jonas Hahnfeld 7f9c518423 [CUDA] Detect installation in PATH
If the CUDA toolkit is not installed to its default locations
in /usr/local/cuda, the user is forced to specify --cuda-path.
This is tedious and the driver can be smarter if well-known tools
(like ptxas) can already be found in the PATH environment variable.

Add option --cuda-path-ignore-env if the user wants to ignore
set environment variables. Also use it in the tests to make sure
the driver always finds the same CUDA installation, regardless
of the user's environment.

Differential Revision: https://reviews.llvm.org/D42642

llvm-svn: 323848
2018-01-31 08:26:51 +00:00
Hiroshi Inoue 1019f8a98e [NFC] fix trivial typos in comments
"to to" -> "to"

llvm-svn: 323627
2018-01-29 05:15:18 +00:00
Amara Emerson 4ee9f82a95 [Driver] Add an -fexperimental-isel driver option to enable/disable GlobalISel.
Differential Revision: https://reviews.llvm.org/D42276

llvm-svn: 323485
2018-01-26 00:27:22 +00:00
Nico Weber 2d05fe5f91 Don't let test write to the source dir after r323426.
llvm-svn: 323473
2018-01-25 21:49:03 +00:00
Nico Weber 75ae75cd17 [clang-cl] Add support for /arch:AVX512F and /arch:AVX512
For /arch:AVX512F:
clang-cl and cl.exe both defines __AVX512F__ __AVX512CD__.
clang-cl also defines __AVX512ER__ __AVX512PF__.
64-bit cl.exe also defines (according to /Bz) _NO_PREFETCHW.

For /arch:AVX512:
clang-cl and cl.exe both define
__AVX512F__ __AVX512CD__ __AVX512BW__ __AVX512DQ__ __AVX512VL__.
64-bit cl.exe also defines _NO_PREFETCHW.

So not 100% identical, but pretty close.

Also refactor the existing AVX / AVX2 code to not repeat itself in both the
32-bit and 64-bit cases.

https://reviews.llvm.org/D42538

llvm-svn: 323433
2018-01-25 15:24:43 +00:00
Nico Weber 691300c945 clang-cl: Simplify handling of /arch: flag.
r213083 initially implemented /arch: support by mapping it to CPU features.
Then r241077 additionally mapped it to CPU, which made the feature flags
redundant (if harmless). This change here removes the redundant mapping to
feature flags, and rewrites test/Driver/cl-x86-flags.c to be a bit more of an
integration test that checks for preprocessor defines like AVX (like documented
on MSDN) instead of for driver flags.

To keep emitting warn_drv_unused_argument, use getLastArgNoClaim() followed by an explicit claim() if needed.

This is in preparation for adding support for /arch:AVX512(F).

No intended behavior change.

https://reviews.llvm.org/D42497

llvm-svn: 323426
2018-01-25 14:38:29 +00:00
Simon Dardis 2dd9377cd9 [Driver] Add support for mips32 and scudo
r317337 missed that scudo is supported on MIPS32, so permit that option for
MIPS32.

Reviewers: cryptoad, atanasyan

Differential Revision: https://reviews.llvm.org/D42416

llvm-svn: 323412
2018-01-25 10:09:33 +00:00
Krzysztof Parzyszek 7c2031fb95 [Hexagon] Accept lowercase b in -hvx-length=64b and -hvx-length=128b
llvm-svn: 323360
2018-01-24 18:42:19 +00:00
Artem Belevich c30bcad19c [CUDA] Disable PGO and coverage instrumentation in NVPTX.
NVPTX does not have runtime support necessary for profiling to work
and even call arc collection is prohibitively expensive. Furthermore,
there's no easy way to collect the samples. NVPTX also does not
support global constructors that clang generates if sample/arc collection
is enabled.

Differential Revision: https://reviews.llvm.org/D42452

llvm-svn: 323345
2018-01-24 17:41:02 +00:00
Hans Wennborg b2ac9942b2 clang-cl: Parse /permissive-, /Bt, Bt+ (PR32672)
llvm-svn: 323330
2018-01-24 15:18:12 +00:00
Malcolm Parsons 51d3fb045e Fix typos of occurred and occurrence
llvm-svn: 323316
2018-01-24 10:26:09 +00:00
Douglas Yung 1b9260baaa Fix test Driver/solaris-ld.c for Windows.
- Test needs to be able to handle "clang.exe" on Windows
- Test needs to be able to handle either '/' or '\\' used as the path separator

Reviewed by Paul Robinson

llvm-svn: 323285
2018-01-24 00:05:01 +00:00
Richard Trieu 3ec8425c0d Fix test Driver/solaris-ld.c
Allow test to accept calls to ld without full path.

llvm-svn: 323267
2018-01-23 21:58:56 +00:00
Jonas Hahnfeld 7143302a7e test/Driver: Add some --stdlib=platform, NFC.
This fixes the failing test when building with CLANG_DEFAULT_CXX_STDLIB.

llvm-svn: 323231
2018-01-23 18:12:12 +00:00
Saleem Abdulrasool f1d814d40c test: adjust the target for some Windows tests
The tests are targeting Windows but do not specify an environment.  When
executed on Linux, they would use an ELF output rather than the COFF
output.  Explicitly provide an environment.

llvm-svn: 323225
2018-01-23 17:05:57 +00:00
Fedor Sergeev 69ea82968a Fix Driver/solaris-ld.c test on Windows
Fixing failure introduced with r323193.

llvm-svn: 323199
2018-01-23 13:59:11 +00:00
Fedor Sergeev faa0a82416 [Solaris] gcc toolchain handling revamp
Summary:
General idea is to utilize generic (mostly Generic_GCC) code
and get rid of Solaris-specific handling as much as possible.

In particular:
- scanLibDirForGCCTripleSolaris was removed, relying on generic
  CollectLibDirsAndTriples

- findBiarchMultilibs is now properly utilized to switch between
   m32 and m64 include & lib paths on Solaris

- C system include handling copied from Linux (bar multilib hacks)

Fixes PR24606.

Reviewers: dlj, rafael, jyknight, theraven, tstellar

Reviewed By: jyknight

Subscribers: aaron.ballman, mgorny, krytarowski, ro, joerg, cfe-commits

Differential Revision: https://reviews.llvm.org/D35755

llvm-svn: 323193
2018-01-23 12:23:52 +00:00
Chandler Carruth c58f2166ab Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Summary:
First, we need to explain the core of the vulnerability. Note that this
is a very incomplete description, please see the Project Zero blog post
for details:
https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html

The basis for branch target injection is to direct speculative execution
of the processor to some "gadget" of executable code by poisoning the
prediction of indirect branches with the address of that gadget. The
gadget in turn contains an operation that provides a side channel for
reading data. Most commonly, this will look like a load of secret data
followed by a branch on the loaded value and then a load of some
predictable cache line. The attacker then uses timing of the processors
cache to determine which direction the branch took *in the speculative
execution*, and in turn what one bit of the loaded value was. Due to the
nature of these timing side channels and the branch predictor on Intel
processors, this allows an attacker to leak data only accessible to
a privileged domain (like the kernel) back into an unprivileged domain.

The goal is simple: avoid generating code which contains an indirect
branch that could have its prediction poisoned by an attacker. In many
cases, the compiler can simply use directed conditional branches and
a small search tree. LLVM already has support for lowering switches in
this way and the first step of this patch is to disable jump-table
lowering of switches and introduce a pass to rewrite explicit indirectbr
sequences into a switch over integers.

However, there is no fully general alternative to indirect calls. We
introduce a new construct we call a "retpoline" to implement indirect
calls in a non-speculatable way. It can be thought of loosely as
a trampoline for indirect calls which uses the RET instruction on x86.
Further, we arrange for a specific call->ret sequence which ensures the
processor predicts the return to go to a controlled, known location. The
retpoline then "smashes" the return address pushed onto the stack by the
call with the desired target of the original indirect call. The result
is a predicted return to the next instruction after a call (which can be
used to trap speculative execution within an infinite loop) and an
actual indirect branch to an arbitrary address.

On 64-bit x86 ABIs, this is especially easily done in the compiler by
using a guaranteed scratch register to pass the target into this device.
For 32-bit ABIs there isn't a guaranteed scratch register and so several
different retpoline variants are introduced to use a scratch register if
one is available in the calling convention and to otherwise use direct
stack push/pop sequences to pass the target address.

This "retpoline" mitigation is fully described in the following blog
post: https://support.google.com/faqs/answer/7625886

We also support a target feature that disables emission of the retpoline
thunk by the compiler to allow for custom thunks if users want them.
These are particularly useful in environments like kernels that
routinely do hot-patching on boot and want to hot-patch their thunk to
different code sequences. They can write this custom thunk and use
`-mretpoline-external-thunk` *in addition* to `-mretpoline`. In this
case, on x86-64 thu thunk names must be:
```
  __llvm_external_retpoline_r11
```
or on 32-bit:
```
  __llvm_external_retpoline_eax
  __llvm_external_retpoline_ecx
  __llvm_external_retpoline_edx
  __llvm_external_retpoline_push
```
And the target of the retpoline is passed in the named register, or in
the case of the `push` suffix on the top of the stack via a `pushl`
instruction.

There is one other important source of indirect branches in x86 ELF
binaries: the PLT. These patches also include support for LLD to
generate PLT entries that perform a retpoline-style indirection.

The only other indirect branches remaining that we are aware of are from
precompiled runtimes (such as crt0.o and similar). The ones we have
found are not really attackable, and so we have not focused on them
here, but eventually these runtimes should also be replicated for
retpoline-ed configurations for completeness.

For kernels or other freestanding or fully static executables, the
compiler switch `-mretpoline` is sufficient to fully mitigate this
particular attack. For dynamic executables, you must compile *all*
libraries with `-mretpoline` and additionally link the dynamic
executable and all shared libraries with LLD and pass `-z retpolineplt`
(or use similar functionality from some other linker). We strongly
recommend also using `-z now` as non-lazy binding allows the
retpoline-mitigated PLT to be substantially smaller.

When manually apply similar transformations to `-mretpoline` to the
Linux kernel we observed very small performance hits to applications
running typical workloads, and relatively minor hits (approximately 2%)
even for extremely syscall-heavy applications. This is largely due to
the small number of indirect branches that occur in performance
sensitive paths of the kernel.

When using these patches on statically linked applications, especially
C++ applications, you should expect to see a much more dramatic
performance hit. For microbenchmarks that are switch, indirect-, or
virtual-call heavy we have seen overheads ranging from 10% to 50%.

However, real-world workloads exhibit substantially lower performance
impact. Notably, techniques such as PGO and ThinLTO dramatically reduce
the impact of hot indirect calls (by speculatively promoting them to
direct calls) and allow optimized search trees to be used to lower
switches. If you need to deploy these techniques in C++ applications, we
*strongly* recommend that you ensure all hot call targets are statically
linked (avoiding PLT indirection) and use both PGO and ThinLTO. Well
tuned servers using all of these techniques saw 5% - 10% overhead from
the use of retpoline.

We will add detailed documentation covering these components in
subsequent patches, but wanted to make the core functionality available
as soon as possible. Happy for more code review, but we'd really like to
get these patches landed and backported ASAP for obvious reasons. We're
planning to backport this to both 6.0 and 5.0 release streams and get
a 5.0 release with just this cherry picked ASAP for distros and vendors.

This patch is the work of a number of people over the past month: Eric, Reid,
Rui, and myself. I'm mailing it out as a single commit due to the time
sensitive nature of landing this and the need to backport it. Huge thanks to
everyone who helped out here, and everyone at Intel who helped out in
discussions about how to craft this. Also, credit goes to Paul Turner (at
Google, but not an LLVM contributor) for much of the underlying retpoline
design.

Reviewers: echristo, rnk, ruiu, craig.topper, DavidKreitzer

Subscribers: sanjoy, emaste, mcrosier, mgorny, mehdi_amini, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D41723

llvm-svn: 323155
2018-01-22 22:05:25 +00:00
Craig Topper 8cdb94901d [X86] Add rdpid command line option and intrinsics.
Summary: This patch adds -mrdpid/-mno-rdpid and the rdpid intrinsic. The corresponding LLVM commit has already been made.

Reviewers: RKSimon, spatel, zvi, AndreiGrischenko

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42272

llvm-svn: 323047
2018-01-20 18:36:52 +00:00
Craig Topper 66d0023d86 [X86] Add goldmont to test/Driver/x86-march.c
llvm-svn: 322982
2018-01-19 19:43:36 +00:00
Petr Hosek d3b520f6cf [Fuchsia] Tests for the Fuzzer support in Fuchsia driver
This adds driver tests for the Fuzzer support.

Differential Revision: https://reviews.llvm.org/D42283

llvm-svn: 322922
2018-01-19 04:08:06 +00:00
Hiroshi Inoue a646fed6ed Revert rC322769: [RISCV] Propagate -mabi and -march values to GNU assembler.
Temporarily revert rC322769 due to buildbot failurs.

llvm-svn: 322816
2018-01-18 06:13:25 +00:00
Ana Pazos f4b1c002d1 [RISCV] Propagate -mabi and -march values to GNU assembler.
When using -fno-integrated-as flag, the gnu assembler produces code
with some default march/mabi which later causes linker failure due
to incompatible mabi/march.

In this patch we explicitly propagate -mabi and -march flags to the
GNU assembler.

In this patch we explicitly propagate -mabi and -march flags to the GNU assembler.

Differential Revision: https://reviews.llvm.org/D41271

llvm-svn: 322769
2018-01-17 22:09:58 +00:00
Nico Weber 2c6fe505b1 Attempt to fix test/Driver/masm.c on the ARM bots.
llvm-svn: 322674
2018-01-17 16:03:08 +00:00
Nico Weber e3712cf5c4 [clang-cl] Let /FA output use intel assembly.
cl's assembly output is in intel syntax, so clang-cl's should be too, PR35031.
https://reviews.llvm.org/D42157

llvm-svn: 322652
2018-01-17 13:34:20 +00:00
Brian Gesiak 28db314c82 [Driver] Suggest valid integrated tools
Summary:
There are only two valid integrated Clang driver tools: `-cc1` and
`-cc1as`. If a user asks for an unknown tool, such as `-cc1asphalt`,
an error message is displayed to indicate that there is no such tool,
but the message doesn't indicate what the valid options are.

Include the valid options in the error message.

Test Plan: `check-clang`

Reviewers: sepavloff, bkramer, phosek

Reviewed By: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42004

llvm-svn: 322517
2018-01-15 21:05:40 +00:00
Alex Bradbury 8cbdd4892f [RISCV] Implement RISCV ABI lowering
RISCVABIInfo is implemented in terms of XLen, supporting both RV32 and RV64. 
Unfortunately we need to count argument registers in the frontend in order to 
determine when to emit signext and zeroext attributes. Integer scalars are 
extended according to their type up to 32-bits and then sign-extended to XLen 
when passed in registers, but are anyext when passed on the stack. This patch 
only implements the base integer (soft float) ABIs.

For more information on the RISC-V ABI, see [the ABI 
doc](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md), 
my [golden model](https://github.com/lowRISC/riscv-calling-conv-model), and 
the [LLVM RISC-V calling convention 
patch](https://reviews.llvm.org/D39898#2d1595b4) (specifically the comment 
documenting frontend expectations).

Differential Revision: https://reviews.llvm.org/D40023

llvm-svn: 322494
2018-01-15 17:54:52 +00:00
Petr Hosek 84d036a0d1 Reland "[Driver] Update default sanitizer blacklist location"
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322452
2018-01-14 03:43:17 +00:00
Brian Gesiak ceb987f082 [Driver] Add "did you mean?" suggestions to -cc1as
Summary:
In https://reviews.llvm.org/D41733, the driver was modified such that,
when a user provided a mispelled option such as `-hel`, it would
suggest a valid option with a nearby edit distance: "did you mean
'-help'?".

Add these suggestions to invocations of `clang -cc1as` as well.

Test Plan: `check-clang`

Reviewers: v.g.vassilev, bruno

Reviewed By: v.g.vassilev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42001

llvm-svn: 322445
2018-01-13 17:09:11 +00:00
Alex Bradbury e0f80ddad1 Fix test/Driver/riscv32-toolchain.c for builds setting CLANG_DEFAULT_LINKER
Petr Hosek reported an external buildbot was failing on riscv32-toolchain.c, 
seemingly as it set CLANG_DEFAULT_LINKER to lld. Address this by explicitly 
setting -fuse-ld=ld in the tests.

llvm-svn: 322435
2018-01-13 09:21:11 +00:00
Douglas Yung 0d29aaf628 Fix test on Windows that was added in r322382.
The test was using "%clang++" which on Windows became "clang.exe++". Use %clangxx instead.

Reviewed by Paul Robinson

llvm-svn: 322417
2018-01-12 22:32:01 +00:00
Sam Clegg ffbfc0f827 [WebAssembly] Support -stdlib=libc++ switch
Referenced implementation from Fuchsia and Darwin Toolchain.
Still only support CST_Libcxx.  Now checks that the argument
is really '-stdlib=libc++', and display error.

Also, now will pass -lc++ and -lc++abi to the linker.

Patch by Patrick Cheng!

Differential Revision: https://reviews.llvm.org/D41937

llvm-svn: 322382
2018-01-12 17:54:49 +00:00
Sam Clegg 9bbca8c240 [WebAssembly] Remove `-allow-undefined-file wasm.syms` from linker args
See: https://github.com/WebAssembly/tool-conventions/issues/35

Differential Revision: https://reviews.llvm.org/D41923

llvm-svn: 322321
2018-01-11 22:33:50 +00:00
Alex Bradbury f067a2f769 [Driver][RISCV] Another Windows file separator fix for riscv32-toolchain.c test
I've checking the failure log, this _should_ be the last one. Sorry for not 
spotting this additional case first time round.

llvm-svn: 322294
2018-01-11 17:06:32 +00:00
Alex Bradbury 0acf13f659 [Driver][RISCV] Fix r322276 for Windows (path separator issue)
We were seeing test failures of riscv32-toolchain.c on windows due to the \ 
path separator being used for the linker. Add {{/|\\\\}} pattern (made 
horrible due to escaping), just like introduced in r214931.

llvm-svn: 322286
2018-01-11 15:38:01 +00:00
Alex Bradbury d53ce4a8b5 [Driver][RISCV] Fix r322276 by adding missing dummy crtbegin.o files to test input
The dummy crtbegin.o files were left out in r322276 (as they were ignored by 
svn add of test/Driver/Inputs/multilib_riscv_linux_sdk) and are necessary for 
the driver test to work.

llvm-svn: 322277
2018-01-11 13:51:06 +00:00
Alex Bradbury 71f45455e1 [RISCV] Add the RISCV target and compiler driver
As RV64 codegen has not yet been upstreamed into LLVM, we focus on RV32 driver 
support (RV64 to follow).

Differential Revision: https://reviews.llvm.org/D39963

llvm-svn: 322276
2018-01-11 13:36:56 +00:00
Petr Hosek 605d3b9225 Revert "[Driver] Update default sanitizer blacklist location"
This reverts commit r322258: broke the dfsan build.

llvm-svn: 322260
2018-01-11 07:05:38 +00:00
Petr Hosek bb9c6fc3bc Reland "[Driver] Update default sanitizer blacklist location"
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322258
2018-01-11 06:42:12 +00:00
Petr Hosek aaf4da6c10 Revert "[Driver] Update default sanitizer blacklist location"
This reverts commit r322233: this is breaking dfsan tests.

llvm-svn: 322242
2018-01-11 00:12:02 +00:00
Petr Hosek 7e48abc764 Reland "[Driver] Update default sanitizer blacklist location"
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322233
2018-01-10 22:59:00 +00:00
Matt Morehouse f113deaa3c [MSan] Enable use-after-dtor instrumentation by default.
Summary:
Enable the compile-time flag -fsanitize-memory-use-after-dtor by
default. Note that the run-time option MSAN_OPTIONS=poison_in_dtor=1
still needs to be enabled for destructors to be poisoned.

Reviewers: eugenis, vitalybuka, kcc

Reviewed By: eugenis, vitalybuka

Subscribers: cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D37860

llvm-svn: 322221
2018-01-10 20:27:48 +00:00
Brian Gesiak 5b60198795 [Driver] Test for correct '--version' suggestion
Summary:
The `llvm::OptTable::findNearest` bug fixed in
https://reviews.llvm.org/D41873 manifested itself as the following
erroneous message when invoking Clang:

```
clang -version
clang-6.0: error: unknown argument '-version', did you mean 'version'?
```

Add a test to catch any future regressions to the now correct behavior,
which asks "did you mean '--version'?".

Test Plan: `check-clang`

Reviewers: v.g.vassilev, teemperor, ruiu, jroelofs, yamaguchi

Reviewed By: v.g.vassilev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D41912

llvm-svn: 322220
2018-01-10 20:23:45 +00:00
Petr Hosek 1747f3572e Revert "[Driver] Update default sanitizer blacklist location"
This reverts commit r322154 because it broke sanitizer bots.

llvm-svn: 322155
2018-01-10 02:24:09 +00:00
Petr Hosek b931670ae6 [Driver] Update default sanitizer blacklist location
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322154
2018-01-10 02:12:24 +00:00
Ed Schouten c94f3eb0cf ananas: Add shared library support
The Ananas Operating System (https://github.com/zhmu/ananas) has shared
library support as of commit 57739c0b6ece56dd4872aedf30264ed4b9412c77.

This change adds the necessary settings to clang so that shared
executables and libraries can be build correctly.

Submitted by:	Rink Springer
Differential Revision:	https://reviews.llvm.org/D41500

llvm-svn: 322064
2018-01-09 09:18:14 +00:00
Oren Ben Simhon 57cc1a5d77 Added Control Flow Protection Flag
Cf-protection is a target independent flag that instructs the back-end to instrument control flow mechanisms like: Branch, Return, etc.
For example in X86 this flag will be used to instrument Indirect Branch Tracking instructions.

Differential Revision: https://reviews.llvm.org/D40478

Change-Id: I5126e766c0e6b84118cae0ee8a20fe78cc373dea
llvm-svn: 322063
2018-01-09 08:53:59 +00:00
Walter Lee 215284d089 [Myriad] Remove invalidated -elf flag for MoviAsm
Summary:
The flag has been deprecated, and is becoming invalid in the latest
MDK.

Reviewers: jyknight

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D41713

llvm-svn: 322023
2018-01-08 20:36:08 +00:00
Sean Eveson 5110d4f5c0 [Driver] Add flag enabling the function stack size section that was added in r319430
Adds the -fstack-size-section flag to enable the .stack_sizes section. The flag defaults to on for the PS4 triple.

Differential Revision: https://reviews.llvm.org/D40712

llvm-svn: 321992
2018-01-08 13:42:26 +00:00
Brian Gesiak 24910765e2 [Driver] Suggest correctly spelled driver options
Summary:
Depends on https://reviews.llvm.org/D41732.

Utilities such as `opt`, when invoked with arguments that are very
nearly spelled correctly, suggest the correctly spelled options:

```
bin/opt -hel
opt: Unknown command line argument '-hel'.  Try: 'bin/opt -help'
opt: Did you mean '-help'?
```

Clang, on the other hand, prior to this commit, does not:

```
bin/clang -hel
clang-6.0: error: unknown argument: '-hel'
```

This commit makes use of the new libLLVMOption API from
https://reviews.llvm.org/D41732 in order to provide correct suggestions:

```
bin/clang -hel
clang-6.0: error: unknown argument: '-hel', did you mean '-help'?
```

Test Plan: `check-clang`

Reviewers: yamaguchi, v.g.vassilev, teemperor, ruiu, bruno

Reviewed By: bruno

Subscribers: bruno, jroelofs, cfe-commits

Differential Revision: https://reviews.llvm.org/D41733

llvm-svn: 321917
2018-01-06 00:25:40 +00:00
Douglas Yung ba53ef4c46 Fix test to use -S instead of -c so it doesn't unnecessarily run the assembler.
Reviewed by Paul Robinson

llvm-svn: 321776
2018-01-04 00:16:57 +00:00
Sam McCall 296d8327a9 [Driver] Fix unused variables and test-writing-into-workdir after r321621
llvm-svn: 321639
2018-01-02 09:35:10 +00:00
Serge Pavlov 208ac6547c Enable configuration files in clang
Clang is inherently a cross compiler and can generate code for any target
enabled during build. It however requires to specify many parameters in the
invocation, which could be hardcoded during configuration process in the
case of single-target compiler. The purpose of configuration files is to
make specifying clang arguments easier.

A configuration file is a collection of driver options, which are inserted
into command line before other options specified in the clang invocation.
It groups related options together and allows specifying them in simpler,
more flexible and less error prone way than just listing the options
somewhere in build scripts. Configuration file may be thought as a "macro"
that names an option set and is expanded when the driver is called.

Use of configuration files is described in `UserManual.rst`.

Differential Revision: https://reviews.llvm.org/D24933

llvm-svn: 321621
2018-01-01 13:27:01 +00:00
Serge Pavlov 55b0747372 Reverted 321587: Enable configuration files in clang
Need to check targets in tests more carefully.

llvm-svn: 321588
2017-12-30 18:38:44 +00:00
Serge Pavlov c92ca91472 Enable configuration files in clang
Clang is inherently a cross compiler and can generate code for any target
enabled during build. It however requires to specify many parameters in the
invocation, which could be hardcoded during configuration process in the
case of single-target compiler. The purpose of configuration files is to
make specifying clang arguments easier.

A configuration file is a collection of driver options, which are inserted
into command line before other options specified in the clang invocation.
It groups related options together and allows specifying them in simpler,
more flexible and less error prone way than just listing the options
somewhere in build scripts. Configuration file may be thought as a "macro"
that names an option set and is expanded when the driver is called.

Use of configuration files is described in `UserManual.rst`.

Differential Revision: https://reviews.llvm.org/D24933

llvm-svn: 321587
2017-12-30 17:59:26 +00:00
Alex Lorenz 78df5da53d [driver][darwin] Take the OS version from -m<os>-version-min argument when
-target has no OS version

This ensures that Clang won't warn about redundant -m<os>-version-min
argument for an invocation like
`-target x86_64-apple-macos -mmacos-version-min=10.11`

llvm-svn: 321559
2017-12-29 17:42:40 +00:00
Coby Tayree a09663a5c1 [x86][icelake][vbmi2]
added vbmi2 feature recognition
added intrinsics support for vbmi2 instructions
_mm[128,256,512]_mask[z]_compress_epi[16,32]
_mm[128,256,512]_mask_compressstoreu_epi[16,32]
_mm[128,256,512]_mask[z]_expand_epi[16,32]
_mm[128,256,512]_mask[z]_expandloadu_epi[16,32]
_mm[128,256,512]_mask[z]_sh[l,r]di_epi[16,32,64]
_mm[128,256,512]_mask_sh[l,r]dv_epi[16,32,64]
matching a similar work on the backend (D40206)
Differential Revision: https://reviews.llvm.org/D41557

llvm-svn: 321487
2017-12-27 11:25:07 +00:00
Coby Tayree 3d9c88cfec [x86][icelake][vnni]
added vnni feature recognition
added intrinsics support for VNNI instructions
_mm256_mask_dpbusd_epi32
_mm256_maskz_dpbusd_epi32
_mm256_dpbusd_epi32
_mm256_mask_dpbusds_epi32
_mm256_maskz_dpbusds_epi32
_mm256_dpbusds_epi32
_mm256_mask_dpwssd_epi32
_mm256_maskz_dpwssd_epi32
_mm256_dpwssd_epi32
_mm256_mask_dpwssds_epi32
_mm256_maskz_dpwssds_epi32
_mm256_dpwssds_epi32
_mm128_mask_dpbusd_epi32
_mm128_maskz_dpbusd_epi32
_mm128_dpbusd_epi32
_mm128_mask_dpbusds_epi32
_mm128_maskz_dpbusds_epi32
_mm128_dpbusds_epi32
_mm128_mask_dpwssd_epi32
_mm128_maskz_dpwssd_epi32
_mm128_dpwssd_epi32
_mm128_mask_dpwssds_epi32
_mm128_maskz_dpwssds_epi32
_mm128_dpwssds_epi32
_mm512_mask_dpbusd_epi32
_mm512_maskz_dpbusd_epi32
_mm512_dpbusd_epi32
_mm512_mask_dpbusds_epi32
_mm512_maskz_dpbusds_epi32
_mm512_dpbusds_epi32
_mm512_mask_dpwssd_epi32
_mm512_maskz_dpwssd_epi32
_mm512_dpwssd_epi32
_mm512_mask_dpwssds_epi32
_mm512_maskz_dpwssds_epi32
_mm512_dpwssds_epi32
matching a similar work on the backend (D40208)
Differential Revision: https://reviews.llvm.org/D41558

llvm-svn: 321484
2017-12-27 10:37:51 +00:00
Coby Tayree 2268576fa0 [x86][icelake][bitalg]
added bitalg feature recognition
added intrinsics support for bitalg instructions
_mm512_popcnt_epi16
_mm512_mask_popcnt_epi16
_mm512_maskz_popcnt_epi16
_mm512_popcnt_epi8
_mm512_mask_popcnt_epi8
_mm512_maskz_popcnt_epi8
_mm512_mask_bitshuffle_epi64_mask
_mm512_bitshuffle_epi64_mask
_mm256_popcnt_epi16
_mm256_mask_popcnt_epi16
_mm256_maskz_popcnt_epi16
_mm128_popcnt_epi16
_mm128_mask_popcnt_epi16
_mm128_maskz_popcnt_epi16
_mm256_popcnt_epi8
_mm256_mask_popcnt_epi8
_mm256_maskz_popcnt_epi8
_mm128_popcnt_epi8
_mm128_mask_popcnt_epi8
_mm128_maskz_popcnt_epi8
_mm256_mask_bitshuffle_epi32_mask
_mm256_bitshuffle_epi32_mask
_mm128_mask_bitshuffle_epi16_mask
_mm128_bitshuffle_epi16_mask
matching a similar work on the backend (D40222)
Differential Revision: https://reviews.llvm.org/D41564

llvm-svn: 321483
2017-12-27 10:01:00 +00:00
Coby Tayree f72630bb9b [hotfix]
fixinig test failures as seen here:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/22791/steps/test/logs/stdio
which resulted by rL321480

llvm-svn: 321482
2017-12-27 09:22:34 +00:00
Coby Tayree cf96c876c6 [x86][icelake][vpclmulqdq]
added vpclmulqdq feature recognition
added intrinsics support for vpclmulqdq instructions
  _mm256_clmulepi64_epi128
  _mm512_clmulepi64_epi128
matching a similar work on the backend (D40101)
Differential Revision: https://reviews.llvm.org/D41573

llvm-svn: 321480
2017-12-27 09:00:31 +00:00
Coby Tayree f4811ebc39 [x86][icelake][gfni]
added gfni feature recognition
added intrinsics support for gfni instructions
  _mm_gf2p8affineinv_epi64_epi8
  _mm_mask_gf2p8affineinv_epi64_epi8
  _mm_maskz_gf2p8affineinv_epi64_epi8
  _mm256_gf2p8affineinv_epi64_epi8
  _mm256_mask_gf2p8affineinv_epi64_epi8
  _mm256_maskz_gf2p8affineinv_epi64_epi8
  _mm512_gf2p8affineinv_epi64_epi8
  _mm512_mask_gf2p8affineinv_epi64_epi8
  _mm512_maskz_gf2p8affineinv_epi64_epi8
  _mm_gf2p8affine_epi64_epi8
  _mm_mask_gf2p8affine_epi64_epi8
  _mm_maskz_gf2p8affine_epi64_epi8
  _mm256_gf2p8affine_epi64_epi8
  _mm256_mask_gf2p8affine_epi64_epi8
  _mm256_maskz_gf2p8affine_epi64_epi8
  _mm512_gf2p8affine_epi64_epi8
  _mm512_mask_gf2p8affine_epi64_epi8
  _mm512_maskz_gf2p8affine_epi64_epi8
  _mm_gf2p8mul_epi8
  _mm_mask_gf2p8mul_epi8
  _mm_maskz_gf2p8mul_epi8
  _mm256_gf2p8mul_epi8
  _mm256_mask_gf2p8mul_epi8
  _mm256_maskz_gf2p8mul_epi8
  _mm512_gf2p8mul_epi8
  _mm512_mask_gf2p8mul_epi8
  _mm512_maskz_gf2p8mul_epi8
matching a similar work on the backend (D40373)
Differential Revision: https://reviews.llvm.org/D41582

llvm-svn: 321477
2017-12-27 08:37:47 +00:00
Coby Tayree a1e5f0c339 [x86][icelake][vaes]
added vaes feature recognition
added intrinsics support for vaes instructions, matching a similar work on the backend (D40078)
  _mm256_aesenc_epi128
  _mm512_aesenc_epi128
  _mm256_aesenclast_epi128
  _mm512_aesenclast_epi128
  _mm256_aesdec_epi128
  _mm512_aesdec_epi128
  _mm256_aesdeclast_epi128
  _mm512_aesdeclast_epi128

llvm-svn: 321474
2017-12-27 08:16:54 +00:00
Petr Hosek 37ae5afb25 [scudo] Add -fsanitize=scudo option to Fuchsia
Apparently the -fsanitize flag hadn't been added for Scudo upstream yet.

Patch By: flowerhack

Reviewers: cryptoad, alekseyshl, mcgrathr, phosek

Reviewed By: mcgrathr, phosek

Differential Revision: https://reviews.llvm.org/D41413

llvm-svn: 321314
2017-12-21 22:04:31 +00:00
Vedant Kumar fae4f7c681 [Driver] Ensure no overlap between trapping & recoverable sanitizers. NFC.
This is NFC because in EmitCheck(), -fsanitize-trap=X overrides
-fsanitize-recover=X.

llvm-svn: 321230
2017-12-21 00:10:24 +00:00
Alex Lorenz cdb5240287 [darwin][driver] Warn about mismatching -<os>-version-min rather than
superfluous -<os>-version-min compiler option

rdar://35813850

Differential Revision: https://reviews.llvm.org/D41425

llvm-svn: 321145
2017-12-20 02:31:30 +00:00
Alex Lorenz 91f9cfcde9 [driver][darwin] Set the 'simulator' environment when it's specified
in '-target'

rdar://35742458

Differential Revision: https://reviews.llvm.org/D41076

llvm-svn: 321102
2017-12-19 19:56:14 +00:00
Alex Lorenz 1acc63f7ce [driver][darwin] Take the OS version specified in "-target" as the target
OS instead of inferring it from SDK / environment

The OS version is specified in -target should be used instead of the one in an
environment variable / SDK name.

rdar://35813850

Differential Revision: https://reviews.llvm.org/D40998

llvm-svn: 321099
2017-12-19 19:05:04 +00:00
Jonas Devlieghere cf73eba142 [clang] -foptimization-record-file= should imply -fsave-optimization-record
The Clang option -foptimization-record-file= controls which file an
optimization record is output to. Optimization records are output if you
use the Clang option -fsave-optimization-record. If you specify the
first option without the second, you get a warning that the command line
argument was unused. Passing -foptimization-record-file= should imply
-fsave-optimization-record.

This fixes PR33670

Patch by: Dmitry Venikov <venikov@phystech.edu>

Differential revision: https://reviews.llvm.org/D39834

llvm-svn: 321090
2017-12-19 17:16:45 +00:00
Walter Lee 6b15ace438 Add renamed .o files that were omitted by "git llvm push" command
Original commit is at: https://reviews.llvm.org/D41295.

llvm-svn: 321082
2017-12-19 16:34:13 +00:00
Walter Lee 5062e6985e Rename sparc-myriad-elf triplet to sparc-myriad-rtems
Summary: This is to be consistent with latest Movidius MDK releases.
Also, don't inherit any gcc paths for shave triple.

Reviewers: jyknight

Subscribers: emaste, fedor.sergeev

Differential Revision: https://reviews.llvm.org/D41295

llvm-svn: 321080
2017-12-19 16:19:11 +00:00
Sanjay Patel cb8c009801 [Driver, CodeGen] pass through and apply -fassociative-math
There are 2 parts to getting the -fassociative-math command-line flag translated to LLVM FMF:

1. In the driver/frontend, we accept the flag and its 'no' inverse and deal with the 
   interactions with other flags like -ffast-math -fno-signed-zeros -fno-trapping-math. 
   This was mostly already done - we just need to translate the flag as a codegen option. 
   The test file is complicated because there are many potential combinations of flags here.
   Note that we are matching gcc's behavior that requires 'nsz' and no-trapping-math.

2. In codegen, we map the codegen option to FMF in the IR builder. This is simple code and 
   corresponding test.

For the motivating example from PR27372:

float foo(float a, float x) { return ((a + x) - x); }

$ ./clang -O2 27372.c -S -o - -ffast-math  -fno-associative-math -emit-llvm  | egrep 'fadd|fsub'
  %add = fadd nnan ninf nsz arcp contract float %0, %1
  %sub = fsub nnan ninf nsz arcp contract float %add, %2

So 'reassoc' is off as expected (and so is the new 'afn' but that's a different patch). 
This case now works as expected end-to-end although the underlying logic is still wrong:

$ ./clang  -O2 27372.c -S -o - -ffast-math  -fno-associative-math | grep xmm
	addss	%xmm1, %xmm0
	subss	%xmm1, %xmm0

We're not done because the case where 'reassoc' is set is ignored by optimizer passes. Example:

$ ./clang  -O2 27372.c -S -o - -fassociative-math -fno-signed-zeros -fno-trapping-math -emit-llvm  | grep fadd
  %add = fadd reassoc float %0, %1

$ ./clang -O2  27372.c -S -o - -fassociative-math -fno-signed-zeros -fno-trapping-math | grep xmm
	addss	%xmm1, %xmm0
	subss	%xmm1, %xmm0

Differential Revision: https://reviews.llvm.org/D39812

llvm-svn: 320920
2017-12-16 16:11:17 +00:00
Krzysztof Parzyszek cc5cd2c013 [Hexagon] Add front-end support for Hexagon V65
llvm-svn: 320579
2017-12-13 13:48:07 +00:00
Kelvin Li af7c0ef435 Add --cuda-path to mock a CUDA Toolkit installation to avoid
unexpected error messages for incompatibility between the
default SM level and the support in the installed toolkit.

Differential Revision: https://reviews.llvm.org/D40996

llvm-svn: 320506
2017-12-12 18:33:39 +00:00
Craig Topper 9a724aa38f [Driver][CodeGen] Add -mprefer-vector-width driver option and attribute during CodeGen.
This adds a new command line option -mprefer-vector-width to specify a preferred vector width for the vectorizers. Valid values are 'none' and unsigned integers. The driver will check that it meets those constraints. Specific supported integers will be managed by the targets in the backend.

Clang will take the value and add it as a new function attribute during CodeGen.

This represents the alternate direction proposed by Sanjay in this RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-November/118734.html

The syntax here matches gcc, though gcc treats it as an x86 specific command line argument. gcc only allows values of 128, 256, and 512. I'm not having clang check any values.

Differential Revision: https://reviews.llvm.org/D40230

llvm-svn: 320419
2017-12-11 21:09:19 +00:00
Erich Keane 6c4835978a Revert 320391: Certain targets are failing, pulling back to diagnose.
llvm-svn: 320398
2017-12-11 18:14:51 +00:00
Erich Keane bb322555af For Linux/gnu compatibility, preinclude <stdc-predef.h> if the file is available
As reported in llvm bugzilla 32377.
Here’s a patch to add preinclude of stdc-predef.h.

The gcc documentation says “On GNU/Linux, <stdc-predef.h> is pre-included.” See https://gcc.gnu.org/gcc-4.8/porting_to.html;

The preinclude is inhibited with –ffreestanding.

Basically I fixed the failing test cases by adding –ffreestanding which inhibits this behavior.

I fixed all the failing tests, including some in extra/test, there's a separate patch for that which is linked here

Note: this is a recommit after a test failure took down the original (r318669)

Patch By: mibintc
Differential Revision: https://reviews.llvm.org/D34158

llvm-svn: 320391
2017-12-11 17:36:42 +00:00
Alex Lorenz 25e93db6b5 Fix Driver/darwin-version.c test
A target argument should be provided to avoid failures on non-Darwin

llvm-svn: 320238
2017-12-09 02:56:48 +00:00
Alex Lorenz f04fb276e7 [driver][darwin] Refactor the target selection code, NFC
The simulator variant of Darwin's platforms is removed in favor of a new
environment field.
The code that selects the platform and the version is split into 4 different
functions instead of being all in one function.
This is an NFC commit, although it slightly improves the
"invalid version number" diagnostic by displaying the environment variable
instead of -m<os>-version-min if the OS version was derived from the
environment.

rdar://35813850

Differential Revision: https://reviews.llvm.org/D41035

llvm-svn: 320235
2017-12-09 02:27:11 +00:00
Evgeniy Stepanov ababedd0b0 Fix fsanitize-blacklist test on Windows.
Broken in r320232.

llvm-svn: 320233
2017-12-09 02:15:42 +00:00
Evgeniy Stepanov 12817e59de Hardware-assisted AddressSanitizer (clang part).
Summary:
Driver, frontend and LLVM codegen for HWASan.
A clone of ASan, basically.

Reviewers: kcc, pcc, alekseyshl

Subscribers: srhines, javed.absar, cfe-commits

Differential Revision: https://reviews.llvm.org/D40936

llvm-svn: 320232
2017-12-09 01:32:07 +00:00
Aaron Ballman 29dc5ded45 Correct line endings that got mixed up in r320089; NFC.
llvm-svn: 320113
2017-12-07 23:04:11 +00:00
Aaron Ballman 5b6c0f75e0 Add new language mode flags for C17.
This adds -std=c17, -std=gnu17, and -std=iso9899:2017 as language mode flags for C17 and updates the value of __STDC_VERSION__ to the value based on the C17 FDIS. Given that this ballot cannot succeed until 2018, it is expected that we (and GCC) will add c18 flags as aliases once the ballot passes.

llvm-svn: 320089
2017-12-07 21:46:26 +00:00
Alex Lorenz 6cdef0efb7 [driver] Set the 'simulator' environment for Darwin when compiling for
iOS/tvOS/watchOS simulator

rdar://35135215

Differential Revision: https://reviews.llvm.org/D40682

llvm-svn: 320073
2017-12-07 19:04:10 +00:00
Keith Walker c5bbd11406 Revert [ARM] disable FPU features when using soft floating point.
This reverts r319420
It is failing the test Driver/arm-mfpu.c so reverting while I investigate the failure.

llvm-svn: 319425
2017-11-30 12:05:18 +00:00
Keith Walker a4097075e2 [ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,

  -mfloat-abi=soft -fpu=neon

If any floating point features which require FPU hardware are enabled
they must be disable.

There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).

Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.

Differential Revision: https://reviews.llvm.org/D40256

llvm-svn: 319420
2017-11-30 11:38:56 +00:00
Chad Rosier 5360f9404e [Driver] Turns out the GNU assembler does support falkor/saphira.
llvm-svn: 319323
2017-11-29 16:42:44 +00:00
Reid Kleckner f9b08a382c [clang-cl] Alias /Wall to -Weverything
cl interprets this option to mean enable every supported warning, which
is what Clang's -Weverything flag does.

llvm-svn: 319116
2017-11-27 23:42:20 +00:00
Pirama Arumuga Nainar 87ff0a7467 Switch CPU names not recognized by GNU assembler
Summary:
Switch CPU names not recognized by GNU assembler to a close CPU that it
does recognize.  In this patch, kryo, falkor and saphira all get
replaced by cortex-a57 when invoking the assembler.  In addition, krait
was already being replaced by cortex-a15.

Reviewers: weimingz

Subscribers: srhines, cfe-commits

Differential Revision: https://reviews.llvm.org/D40476

llvm-svn: 319077
2017-11-27 19:18:39 +00:00
Oren Ben Simhon fec21ec0c6 Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracking support (Clang side)
Shadow stack solution introduces a new stack for return addresses only.
The stack has a Shadow Stack Pointer (SSP) that points to the last address to which we expect to return.
If we return to a different address an exception is triggered.
This patch includes shadow stack intrinsics as well as the corresponding CET header.
It includes CET clang flags for shadow stack and Indirect Branch Tracking.

For more information, please see the following:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

Differential Revision: https://reviews.llvm.org/D40224

Change-Id: I79ad0925a028bbc94c8ecad75f6daa2f214171f1
llvm-svn: 318995
2017-11-26 12:34:54 +00:00
Petr Hosek 5668d83e0e [Driver] Make the use of relax relocations a per target option
The support for relax relocations is dependent on the linker and
different toolchains within the same compiler can be using different
linkers some of which may or may not support relax relocations.

Give toolchains the option to control whether they want to use relax
relocations in addition to the existing (global) build system option.

Differential Revision: https://reviews.llvm.org/D39831

llvm-svn: 318816
2017-11-22 01:38:31 +00:00
Jonas Hahnfeld 4609b25dde Add target triples to openmp-offload-gpu.c
This might fix the failure on Green Dragon.

llvm-svn: 318767
2017-11-21 15:06:28 +00:00
Jonas Hahnfeld 7c78cc5273 [OpenMP] Consistently use cubin extension for nvlink
This was previously done in some places, but for example not for
bundling so that single object compilation with -c failed. In
addition cubin was used for all file types during unbundling which
is incorrect for assembly files that are passed to ptxas.
Tighten up the tests so that we can't regress in that area.

Differential Revision: https://reviews.llvm.org/D40250

llvm-svn: 318763
2017-11-21 14:44:45 +00:00
Erich Keane 523edb0a3a Revert r318669/318694
Broke some libclang tests, so reverting for now.

llvm-svn: 318698
2017-11-20 21:46:29 +00:00
Erich Keane 86785bb0bb Include test files for rL318668
Forgotten when doing my SVN commit.

llvm-svn: 318694
2017-11-20 21:15:01 +00:00
Erich Keane 5c086c7626 For Linux/gnu compatibility, preinclude <stdc-predef.h> if the file is available
As reported in llvm bugzilla 32377.
Here’s a patch to add preinclude of stdc-predef.h.

The gcc documentation says “On GNU/Linux, <stdc-predef.h> is pre-included.” 
See https://gcc.gnu.org/gcc-4.8/porting_to.html;

The preinclude is inhibited with –ffreestanding.

Basically I fixed the failing test cases by adding –ffreestanding which inhibits
this behavior.

I fixed all the failing tests, including some in extra/test, there's a separate
patch for that which is linked here

Patch By: mibintc

Differential Revision: https://reviews.llvm.org/D34158

llvm-svn: 318669
2017-11-20 17:57:42 +00:00
Peter Smith 3947cb3cf0 [ARM] For assembler files recognize -Xassembler or -Wa, -mthumb
The Unified Arm Assembler Language is designed so that the majority of
assembler files can be assembled for both Arm and Thumb with the choice
made as a compilation option.

The way this is done in gcc is to pass -mthumb to the assembler with either
-Wa,-mthumb or -Xassembler -mthumb. This change adds support for these
options to clang. There is no assembler equivalent of -mno-thumb, -marm or
-mno-arm so we don't need to recognize these.

Ideally we would do all of the processing in
CollectArgsForIntegratedAssembler(). Unfortunately we need to change the
triple and at that point it is too late. Instead we look for the option
earlier in ComputeLLVMTriple().
    
Fixes PR34519
    
Differential Revision: https://reviews.llvm.org/D40127

llvm-svn: 318647
2017-11-20 13:43:55 +00:00
Craig Topper 546cee4170 [X86] Add icelake CPU support for -march.
llvm-svn: 318617
2017-11-19 02:55:15 +00:00
Martell Malone 13c5d7379a [Driver] add initial support for alpine linux
set -pie as default for musl linux targets
add detection of alpine linux
append appropriate compile flags for alpine

Reviewers: rnk

Differential Revision: https://reviews.llvm.org/D39588

llvm-svn: 318608
2017-11-19 00:08:12 +00:00
Reid Kleckner 66f58909f8 Fix coverage test on Windows bot
llvm-svn: 318559
2017-11-17 21:55:23 +00:00
Konstantin Zhuravlyov bfd6c1c016 AMDGPU: Add -mxnack/-mno-xnack options that set +/-xnack feature
Differential Revision: https://reviews.llvm.org/D39878

llvm-svn: 317917
2017-11-10 19:28:25 +00:00
Steven Wu 9278019eb3 [Driver] Make clang/cc conforms to UNIX standard
Summary:
This is basically reverting r261774 with a tweak for clang-cl. UNIX
standard states:
When c99 encounters a compilation error that causes an object file not
to be created, it shall write a diagnostic to standard error and
continue to compile other source code operands, but it shall not perform
the link phase and it shall return a non-zero exit status

The same goes for c89 or cc. And they are all alias or shims pointing to
clang on Darwin.

The original commit was intended for CUDA so the error message doesn't
get emit twice for both host and device. It seems that the clang driver
has been changed to model the CUDA dependency differently. Now the
driver behaves the same without this commit.

rdar://problem/32223263

Reviewers: thakis, dexonsmith, tra

Reviewed By: tra

Subscribers: jlebar, cfe-commits

Differential Revision: https://reviews.llvm.org/D39502

llvm-svn: 317860
2017-11-10 01:32:47 +00:00
David L. Jones db9d254c1a Add a missing "REQUIRES: system-windows" to a Windows-only test.
This un-breaks builds on other platforms. Otherwise, they fail due to warnings like:

warning: unable to find a Visual Studio installation; try running Clang from a developer command prompt [-Wmsvc-not-found]
llvm-svn: 317716
2017-11-08 20:03:11 +00:00
Marco Castelluccio a3efbb0836 Add CoreOption flag to "-coverage" option to make it available for clang-cl
Summary:
The -coverage option is not a CoreOption, so it is not available to clang-cl.
This patch adds the CoreOption flag to "-coverage" to allow it to be used with clang-cl.

Reviewers: rnk

Reviewed By: rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D38221

llvm-svn: 317709
2017-11-08 19:21:54 +00:00
Dave Lee f96bedfce3 Vary Windows toolchain selection by -fuse-ld
Summary:
This change allows binutils to be used for linking with MSVC. Currently, when
using an MSVC target and `-fuse-ld=bfd`, the driver produces an invalid linker
invocation.

Reviewers: rnk, compnerd

Reviewed By: compnerd

Subscribers: smeenai, cfe-commits

Differential Revision: https://reviews.llvm.org/D39509

llvm-svn: 317511
2017-11-06 21:18:05 +00:00
Martell Malone db5b34ce30 [Driver] MinGW: Remove custom linker detection
This is a re-apply of rL313082 which was reverted in rL313088

In rL289668 the ability to specify the default linker at compile time
was added but because the MinGW driver used custom detection we could
not take advantage of this new CMAKE flag CLANG_DEFAULT_LINKER.

rL289668 added no test cases and the mingw driver was either overlooked
or purposefully skipped because it has some custom linker tests
Removing them here because they are covered by the generic case.

Reviewers: rnk

Differntial Revision: https://reviews.llvm.org/D37727

llvm-svn: 317397
2017-11-04 02:07:59 +00:00
Kostya Kortchinsky 8acdc98271 [Driver] Add Scudo as a possible -fsanitize= option
Summary:
This change adds Scudo as a possible Sanitizer option via -fsanitize=.
This allows for easier static & shared linking of the Scudo library, it allows
us to enforce PIE (otherwise the security of the allocator is moot), and check
for incompatible Sanitizers combo.

In its current form, Scudo is not compatible with any other Sanitizer, but the
plan is to make it work in conjunction with UBsan (-fsanitize=scudo,undefined),
which will require additional work outside of the scope of this change.

Reviewers: eugenis, kcc, alekseyshl

Reviewed By: eugenis, alekseyshl

Subscribers: llvm-commits, srhines

Differential Revision: https://reviews.llvm.org/D39334

llvm-svn: 317337
2017-11-03 17:04:13 +00:00
Erich Keane a957ffbce3 Add default calling convention support for regcall.
Added support for regcall as default calling convention. Also added code to
exclude main when applying default calling conventions.

Patch-By: eandrews

Differential Revision: https://reviews.llvm.org/D39210

llvm-svn: 317268
2017-11-02 21:08:00 +00:00
Vlad Tsyrklevich 634c601fe3 [CFI] Add CFI-icall pointer type generalization
Summary:
This change allows generalizing pointers in type signatures used for
cfi-icall by enabling the -fsanitize-cfi-icall-generalize-pointers flag.
This works by 1) emitting an additional generalized type signature
metadata node for functions and 2) llvm.type.test()ing for the
generalized type for translation units with the flag specified.

This flag is incompatible with -fsanitize-cfi-cross-dso because it would
require emitting twice as many type hashes which would increase artifact
size.

Reviewers: pcc, eugenis

Reviewed By: pcc

Subscribers: kcc

Differential Revision: https://reviews.llvm.org/D39358

llvm-svn: 317044
2017-10-31 22:39:44 +00:00
Saleem Abdulrasool 8ba8b02879 Driver: default to `unsigned int` `wchar_t` for ARM
AAPCS and AAPCS64 mandate that `wchar_t` with `-fno-short-wchar` is an
`unsigned int` rather than a `signed int`.  Ensure that the driver does
not flip the signedness of `wchar_t` for those targets.

Add additional tests to ensure that this does not regress.

llvm-svn: 316858
2017-10-29 06:01:14 +00:00
Sam Clegg 471d7afdf0 [WebAssembly] Add crt1.o with calling lld
Also, for OS unknown targets like wasm, don't include
'unknown' in the library path. This is a fix for rL316719.

Differential Revision: https://reviews.llvm.org/D39354

llvm-svn: 316777
2017-10-27 18:10:19 +00:00
Sam Clegg 6853d94e2f Fix test/Driver/wasm-toolchain.c on windows
llvm-svn: 316725
2017-10-27 01:20:16 +00:00
Sam Clegg a08631ec6c [WebAssembly] Include libclang_rt.builtins in the standard way
Differential Revision: https://reviews.llvm.org/D39218

llvm-svn: 316719
2017-10-27 00:26:07 +00:00
Nico Weber 0763ab4d6a Use -fuse-init-array if no gcc installation is found.
clang currently uses .init_array instead of .ctors on Linux if it detects gcc
4.7+. Make it so that it also uses .init_array if no gcc installation is found
at all – if there's no old gcc, there's nothing we need to be compatible with.

icecc for example runs clang in a very small chroot, so before this change
clang would use .ctors if run under icecc. And lld currently silently mislinks
inputs with .ctors sections, so before this clang + icecc + lld would produce
broken binaries. (But this seems like a good change independent of that lld
bug.)

https://reviews.llvm.org/D39317

llvm-svn: 316713
2017-10-26 23:26:29 +00:00
Alex Shlyapnikov 797bdbbce7 [LSan] Enable -fsanitize=leak for PPC64 Linux.
Summary: .

Reviewers: eugenis

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D39312

llvm-svn: 316636
2017-10-26 03:09:53 +00:00
Justin Lebar 066494d8c1 [CUDA] Print an error if you try to compile with < sm_30 on CUDA 9.
Summary:
CUDA 9's minimum sm is sm_30.

Ideally we should also make sm_30 the default when compiling with CUDA
9, but that seems harder than it should be.

Subscribers: sanjoy

Differential Revision: https://reviews.llvm.org/D39109

llvm-svn: 316611
2017-10-25 21:32:06 +00:00
Evgeniy Stepanov 117627c9a1 Enable -pie and --enable-new-dtags by default on Android.
Summary:
Also enable -no-pie on Gnu toolchain (previously available on Darwin only).

Non-PIE executables won't even start on recent Android, and DT_RPATH is ignored by the loader.

Reviewers: srhines, danalbert

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D38430

llvm-svn: 316606
2017-10-25 20:39:22 +00:00
Peter Smith 820e46f3b2 [AArch64] Fix PR34625 -mtune without -mcpu should not set -target-cpu
When -mtune is used on AArch64 the -target-cpu is passed the value of the
cpu given to -mtune. As well as setting micro-architectural features of the
-mtune cpu, this will also add the architectural features such as support
for instructions. This can result in the backend using instructions that
are supported in the -mtune cpu but not supported in the target
architecture. For example use of the v8.1-a LSE extensions with -march=v8.
    
This change removes the setting of -target-cpu for -mtune, the -mcpu must
be used to set -target-cpu. This has the effect of removing all non-hard
coded benefits of mtune but it does produce correct output when -mtune cpu
with a later architecture than v8 is used.
    
Fixes PR34625
    
Differential Revision: https://reviews.llvm.org/D39179

llvm-svn: 316424
2017-10-24 09:51:55 +00:00
Petr Hosek 3e199ecdad [Driver] Use ld.lld directly for Fuchsia rather than passing flavor
Passing a flavor to LLD requires command line argument, but if these
are being passed through a response file, this will fail because LLD
needs to know which driver to use before processing the response file.
Use ld.lld directly instead to avoid this issue.

Differential Revision: https://reviews.llvm.org/D39176

llvm-svn: 316379
2017-10-23 21:31:05 +00:00
Nico Weber ce2d749ed3 clang-cl: Expose --version.
This is for consistency with lld-link, see https://reviews.llvm.org/D38972
Also give --version a help text so it shows up in --help / /? output (for
both clang-cl and regular clang).

llvm-svn: 316335
2017-10-23 15:54:44 +00:00