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9 Commits

Author SHA1 Message Date
Chris Lattner b06015aa69 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
 2010-02-09 19:54:29 +00:00
Evan Cheng 32bfe1e837 Trim unneeded includes. 
llvm-svn: 94105
 2010-01-21 21:44:43 +00:00
Dan Gohman 7a6611793f Target-independent support for TargetFlags on BlockAddress operands, 
and support for blockaddresses in x86-32 PIC mode.

llvm-svn: 89506
 2009-11-20 23:18:13 +00:00
Dan Gohman 6b3f32e6d7 Fix a typo in a comment. 
llvm-svn: 88953
 2009-11-16 20:35:59 +00:00
Dan Gohman d814e32e57 Don't mark registers dead here when processing nodes with MVT::Flag 
results. This works around a problem affecting targets which rely on
MVT::Flag to handle physical register defs.

llvm-svn: 85638
 2009-10-30 23:57:47 +00:00
Dan Gohman 6c9388011b Initial target-independent CodeGen support for BlockAddresses. 
llvm-svn: 85556
 2009-10-30 01:27:03 +00:00
Dan Gohman 453d64c9f5 Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a 
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.

llvm-svn: 85517
 2009-10-29 18:10:34 +00:00
Dan Gohman 4b46cbfc23 Mark dead physregdefs dead immediately. This helps MachineSink and 
MachineLICM and other things which run before LiveVariables is run.

llvm-svn: 85360
 2009-10-28 01:13:53 +00:00
Dan Gohman b8120770b4 Create a new InstrEmitter class for translating SelectionDAG nodes 
into MachineInstrs. This is mostly just moving the code from
ScheduleDAGSDNodesEmit.cpp into a new class. This decouples MachineInstr
emitting from scheduling.

llvm-svn: 83699
 2009-10-10 01:32:21 +00:00