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5 Commits

Author SHA1 Message Date
Baptiste Saleil caf1294d95 [AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts 
the compilation time and there is no case for which we see any improvement in
performance. This patch removes this pass and its associated test cases from
the tree.

Differential Revision: https://reviews.llvm.org/D101313

Change-Id: I0599169a7609c19a887f8d847a71e664030cc141
 2021-04-26 17:21:49 -04:00
Petar Avramovic b082e6f88a [AMDGPU] Extend gfx10 test coverage. NFC. 
Differential Revision: https://reviews.llvm.org/D99267
 2021-03-29 11:13:55 +02:00
Mircea Trofin a8bda3df42 [NFC] Disallow unused prefixes in CodeGen/AMDGPU 
This adds the lit config, and cleans up remaining tests.

Differential Revision: https://reviews.llvm.org/D94245
 2021-01-08 11:49:23 -08:00
Matt Arsenault ab3a3f543b AMDGPU/GlobalISel: Update fdiv lowering for denormal/ulp interaction 
Change the GlobalISel fast fdiv handling to match the changes in
2531535984 and
884acbb9e1
 2021-01-06 12:32:01 -05:00
Matt Arsenault 0a3cf7f476 AMDGPU/GlobalISel: Add baseline IR tests for fdiv 
The fdiv lowering is currently split between an IR pass and codegen,
so make sure this works end to end. We also currently differ from the
DAG on some edge cases, which this will show in a future change.
 2021-01-06 11:37:00 -05:00