Commit Graph

6 Commits

Author SHA1 Message Date
Tim Northover b047bfae32 AArch64: simplify PCS mapping.
Now that LLVM can count the registers needed to implement AAPCS rules, we don't
need to duplicate that logic here. This means we can drop the explicit padding
and also use more natural types in many cases (e.g. "struct { float arr[3]; }"
used to end up as "[2 x double]" to avoid holes on the stack.

The one wrinkle is that AAPCS va_arg was also using the register counting
machinery. But the local replacement isn't too bad.

llvm-svn: 222904
2014-11-27 21:02:49 +00:00
Oliver Stannard ed8ecc8429 Allow __fp16 as a function arg or return type for AArch64
ACLE 2.0 allows __fp16 to be used as a function argument or return
type. This enables this for AArch64.

This also fixes an existing bug that causes clang to not allow
homogeneous floating-point aggregates with a base type of __fp16. This
is valid for AAPCS64, but not for AAPCS-VFP.

llvm-svn: 216558
2014-08-27 16:31:57 +00:00
Tim Northover 4dab69815c ARM64: make sure the caller is expected to extend in AAPCS.
This is one of those DarwinPCS differences. It'd been caught in
arguments, but not return values.

llvm-svn: 206594
2014-04-18 13:46:08 +00:00
Tim Northover 07f1624aa2 ARM64: make sure HFAs on the stack get properly aligned.
Another AAPCS bug, part of PR19432.

llvm-svn: 206580
2014-04-18 10:47:44 +00:00
Tim Northover 5ffc092700 ARM64: remove holes from *all* HFAs on the stack.
My first attempt to make sure HFAs were contiguous was in the block dealing
with padding registers, which meant it only triggered on the first stack-based
HFA. This should extend it to the rest as well.

Another part of PR19432.

llvm-svn: 206456
2014-04-17 10:20:38 +00:00
Tim Northover c801b4a2aa ARM64: track alignment padding registers on AAPCS targets
This implements clause C.8 of the AAPCS in the front-end, so that Clang
accurately knows when the registers run out and it has to insert padding before
the stack objects begin.

PR19432.

llvm-svn: 206296
2014-04-15 14:55:11 +00:00