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Author SHA1 Message Date
Matt Arsenault a10527cd37 AMDGPU/GlobalISel: Copy type when inserting readfirstlane 
getDefIgnoringCopies will fail to find any def if no type is set if we
try to use it on the use's operand, so propagate the type.
 2020-01-12 22:44:51 -05:00
Matt Arsenault 5ce2ca524e AMDGPU/GlobalISel: Use SReg_32 for readfirstlane constraining 
This matches the DAG behavior where we don't use SReg_32_XM0
everywhere anymore, and fixes not coalescing the copies into m0.
 2019-12-27 17:52:12 -05:00
Matt Arsenault 265059eaf6 AMDGPU/GlobalISel: RegBankSelect for amdgcn.writelane 
llvm-svn: 364808
 2019-07-01 16:41:36 +00:00