Commit Graph

753 Commits

Author SHA1 Message Date
Craig Topper e6f17d0cac De-virtualize a method since it doesn't override anything and isn't overridden itself.
llvm-svn: 203538
2014-03-11 04:07:52 +00:00
Craig Topper 3164f33f8f [C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203537
2014-03-11 03:39:26 +00:00
Robert Lytton 2c942c64fb Make __LITTLE_ENDIAN__/__BIG_ENDOAN__ common PredefinedMacros
llvm-svn: 203455
2014-03-10 12:06:29 +00:00
Ahmed Charles dfca6f97bc [C++11] Replace OwningPtr include with <memory>.
llvm-svn: 203389
2014-03-09 11:36:40 +00:00
Ahmed Charles b89843299a Replace OwningPtr with std::unique_ptr.
This compiles cleanly with lldb/lld/clang-tools-extra/llvm.

llvm-svn: 203279
2014-03-07 20:03:18 +00:00
Ahmed Charles 9a16beb8bc Change OwningPtr::take() to OwningPtr::release().
This is a precursor to moving to std::unique_ptr.

llvm-svn: 203275
2014-03-07 19:33:25 +00:00
Saleem Abdulrasool 29b82b631d Update for LLVM API change
Use the new getObjectFormat/setObjectFormat instead of Environment now that the
file format is a separate field.

llvm-svn: 203161
2014-03-06 20:47:19 +00:00
Hal Finkel f7a07a5010 Add a PPC inline asm constraint type for single CR bits
This adds support for the PPC "wc" inline asm constraint (used for allocating
individual CR bits). Support for this constraint type was recently added to the
LLVM PowerPC backend. Although gcc does not currently support allocating
individual CR bits, this identifier choice has been coordinated with the gcc
PowerPC team, and will be marked as reserved for this purpose in the gcc
constraints.md file.

Prior to this change, none of the multi-character PPC constraints were handled
correctly (the '^' escape character was not being added as required by the
parsing code in LLVM). This should now be fixed. I'll add tests for these other
constraints as support is added for them in the backend.

llvm-svn: 202658
2014-03-02 18:24:18 +00:00
Roman Divacky b1ae3d4937 Give sparcv9 the ability to set the target cpu. Change it from accepting
-march which doesnt exist on sparc gcc to -mcpu. While here adjust a
few tests to not write an unused temporary file.

llvm-svn: 202177
2014-02-25 18:35:30 +00:00
Christian Pirker 9b019ae899 Add AArch64 big endian Target (aarch64_be)
llvm-svn: 202151
2014-02-25 13:51:00 +00:00
Kevin Qin ad64f6d4e5 [AArch64] Change int64_t from 'long long int' to 'long int' for AArch64 target.
Most 64-bit targets define int64_t as long int, and AArch64 should
make same definition to follow LP64 model. In GNU tool chain, int64_t
is defined as long int for 64-bit target. So to get consistent with GNU,
it's better Changing int64_t from 'long long int' to 'long int',
otherwise clang will get different name mangling suffix compared with g++.

llvm-svn: 202004
2014-02-24 02:45:03 +00:00
Daniel Sanders 5a1449dab4 [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.
Summary:
This removes the need to coerce UnknownABI to the default ABI (O32 for
MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser.

Clang has been updated to disable both possible default ABI's before enabling
the ABI it intends to use.

[*] N64 being the default for MIPS64 is not actually correct.
    However N32 is not fully implemented/tested yet.

Depends on: D2830

Reviewers: jacksprat, matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2832
Differential Revision: http://llvm-reviews.chandlerc.com/D2846

llvm-svn: 201792
2014-02-20 14:58:19 +00:00
Tim Northover 02e38609e7 ARM: implement support for crypto intrinsics in arm_neon.h
llvm-svn: 200708
2014-02-03 17:28:04 +00:00
Joerg Sonnenberger 9864bd5858 NetBSD uses signed wchar_t on AArch64. It also wants __LITTLE_ENDIAN__ /
__BIG_ENDIAN__ as on other architectures.

llvm-svn: 200655
2014-02-02 21:55:10 +00:00
Tim Northover c322f838bc ARM & AArch64: share the BI__builtin_neon enum defs.
llvm-svn: 200470
2014-01-30 14:47:51 +00:00
Jakob Stoklund Olesen 5b630b4e96 SPARCv9 supports atomic operations up to 64 bits.
Patch by Roman Divacky!

llvm-svn: 200452
2014-01-30 04:48:04 +00:00
Artyom Skrobov e72a6f7a70 Cortex-M3 and Cortex-M4 should not enable hwdiv-arm (committing again, with an updated test)
llvm-svn: 200385
2014-01-29 09:43:07 +00:00
Reid Kleckner 2c35b3b029 Revert "Cortex-M3 and Cortex-M4 should not enable hwdiv-arm"
This reverts commit r200233.

The test required a registered ARM target, it was testing LLVM's
generated assembly, and it should have been an IRGen test.

llvm-svn: 200242
2014-01-27 19:26:39 +00:00
Artyom Skrobov 1c66c3a7f2 Cortex-M3 and Cortex-M4 should not enable hwdiv-arm
llvm-svn: 200233
2014-01-27 18:44:25 +00:00
Robert Lytton 1a2292614c XCore target exception handling
Implement __builtin_eh_return_data_regno()

llvm-svn: 200231
2014-01-27 17:56:25 +00:00
Simon Atanasyan 26292ccc91 [Mips] Fix __mips macro definition.
llvm-svn: 200223
2014-01-27 13:59:11 +00:00
Simon Atanasyan 1a3665b676 [Mips] Change default CPU for MIPS 32/64 targets. Now they are mips32r2/mips64r2 respectively.
llvm-svn: 200222
2014-01-27 13:59:04 +00:00
Evan Cheng 31dd9a6cc1 Fix r195149. Triple should correctly reflect that target. If it contains ios,
e.g. thumbv7m-apple-ios3.0.0-eabi, then it should mean it's an iOS target. For
embedded targets, the OS should be unknown, e.g. thumbv7m-apple-unknown-macho.
Since Tim has recently fixed the triple, r195149 is no longer needed.
rdar://15911035

llvm-svn: 200164
2014-01-26 23:12:43 +00:00
Joerg Sonnenberger f19dc30518 Use canonical spelling of NetBSD
llvm-svn: 200157
2014-01-26 20:02:03 +00:00
Weiming Zhao fb5c21a70b PR18465: [Thumbv8] add predefined macros
currently, for thumbv8, two predefined macros are missing:
 define __THUMB_INTERWORK__ 1
 define __THUMB_INTERWORK__ 1

This patch adds them for thumbv8.

llvm-svn: 199819
2014-01-22 18:42:13 +00:00
Bradley Smith 0f28f0cfc1 [ARM] Add ACLE enum/wchar size predefines
llvm-svn: 199642
2014-01-20 10:52:00 +00:00
Jakob Stoklund Olesen 497332c05f SPARCv9 implements long double as an IEEE quad.
llvm-svn: 199399
2014-01-16 16:43:19 +00:00
Tim Northover 157d911b42 MachO: use *-*-*-macho for MachO embedded targets.
Previously we had bodged together some hacks mapping MachO embedded
targets (i.e. mainly ARM v6M and v7M) to the "*-*-darwin-eabi" triple.
This is incorrect in both details (they don't run Darwin and they're
not EABI in any real sense).

This commit appropriates the existing "MachO" environment for the
purpose instead.

llvm-svn: 199367
2014-01-16 08:48:16 +00:00
Bob Wilson b767d15d1e Remove support for armv7f slice. <rdar://problem/12478440>
This was never used for anything so we should just get rid of it.

llvm-svn: 199336
2014-01-15 21:43:40 +00:00
Jan Wen Voung 1f9c4ee464 Ensure i686-nacl long long is aligned 8 bytes (like malign-double)
Set NaCl OSTargetInfo to have LongLongAlign = 64. Otherwise, it will
pick up the setting of 32 from X86_32TargetInfo.

llvm-svn: 199335
2014-01-15 21:42:41 +00:00
Hans Wennborg c9bd88e681 Remove the -cxx-abi command-line flag.
This makes the C++ ABI depend entirely on the target: MS ABI for -win32 triples,
Itanium otherwise. It's no longer possible to do weird combinations.

To be able to run a test with a specific ABI without constraining it to a
specific triple, new substitutions are added to lit: %itanium_abi_triple and
%ms_abi_triple can be used to get the current target triple adjusted to the
desired ABI. For example, if the test suite is running with the i686-pc-win32
target, %itanium_abi_triple will expand to i686-pc-mingw32.

Differential Revision: http://llvm-reviews.chandlerc.com/D2545

llvm-svn: 199250
2014-01-14 19:35:09 +00:00
Joerg Sonnenberger 9853439b5b Hook up NetBSD/aarch64.
llvm-svn: 199124
2014-01-13 18:25:15 +00:00
Rafael Espindola 26d0f7ce7d Use 'w' instead of 'c' to represent the win32 mangling.
This change was requested to avoid confusion if we ever support non windows
coff systems.

llvm-svn: 198939
2014-01-10 13:42:17 +00:00
Rafael Espindola c418ae93a8 Update for llvm's DataLayout including mangling information.
llvm-svn: 198439
2014-01-03 19:22:05 +00:00
Rafael Espindola 29db13a753 Reformat the description strings. No functionality change.
llvm-svn: 198430
2014-01-03 18:13:17 +00:00
Rafael Espindola 961728064e Remove the now unused 's' specifications.
llvm-svn: 198308
2014-01-02 14:06:59 +00:00
Rafael Espindola d8da90b008 Pass the aapcs and apcs features down to llvm.
No functionality change, but unblocks asserting that llvm's and clang's
datalayout strings are the same.

llvm-svn: 198306
2014-01-02 13:57:18 +00:00
Rafael Espindola 9ec8d08eb1 Small simplification: p0 is the same as p.
llvm-svn: 197700
2013-12-19 16:54:10 +00:00
Matt Arsenault 8ba4882c4b Update SI datalayout for 32-bit private pointers
llvm-svn: 197660
2013-12-19 05:33:14 +00:00
Rafael Espindola dc265edb3b On spacv8 f128 is only aligned to 64 bits.
LLVM already got this right.

Found on "Figure 3-1: Scalar Types" on http://sparc.com/standards/psABI3rd.pdf.

llvm-svn: 197651
2013-12-19 03:03:04 +00:00
Rafael Espindola 1c09b264e3 Fix the DataLayout string produced by clang for NaCl.
Reviewed by Derek Schuff.

llvm-svn: 197628
2013-12-18 23:41:04 +00:00
Rafael Espindola afa854c15e Make setABIAPCS and setABIAAPCS easier to reason about.
These functions now always set the same variables in the same order and they
don't overlap with thep constructor.

llvm-svn: 197604
2013-12-18 20:24:51 +00:00
Rafael Espindola d6c2b720ae Split setABI in two helpers. No functionality change.
llvm-svn: 197603
2013-12-18 19:47:32 +00:00
Rafael Espindola 0ea96eba43 Add -f64:32:64 to the darwin ppc32 DataLayout.
A f64 inside a struct can be 32 bit aligned on darwin.

llvm-svn: 197577
2013-12-18 15:16:50 +00:00
Rafael Espindola 4960968509 Print the 'p' specification before the 'i' specification.
No functionality change.

llvm-svn: 197548
2013-12-18 04:14:53 +00:00
Rafael Espindola c2e60f52ae Add a 's' specifications to AArch64.
This has no functionality change as clang adds explicit alignment info for
byval arguments. The only difference is that now the clang produced
DataLayout string for AArch64 is identical to the LLVM produced one.

llvm-svn: 197538
2013-12-17 23:30:58 +00:00
Rafael Espindola f034b6e4c2 Remove -f128:128 from the DataLayout strings. It is the default.
llvm-svn: 197504
2013-12-17 16:07:35 +00:00
Rafael Espindola 12256302cf The PS3 is a ppc64 and has 64 bit registers. Update DataLayout accordingly.
llvm-svn: 197502
2013-12-17 15:40:00 +00:00
Rafael Espindola 26c67b7879 Remove -f16:16:32 from the XCore DataLayout string.
This makes it identical to the string llvm produces.

llvm-svn: 197500
2013-12-17 14:34:42 +00:00
Rafael Espindola 8ddf8bce91 Reorder these DataLayout entries to match the order LLVM uses.
This completes the cleanup/refactoring of DataLayout on the clang side. Next
is figuring out the differences between the llvm and clang produced strings

llvm-svn: 197442
2013-12-17 00:04:48 +00:00