4e072a75cc
Implement fast-isel support for zero-extending from i1.
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It turns out that this is a fairly common operation,
and it's easy enough to handle.
llvm-svn: 56990
2008-10-03 01:28:47 +00:00
1ab1d31f7a
Optimize conditional branches in X86FastISel. This replaces
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sequences like this:
sete %al
testb %al, %al
jne LBB11_1
with this:
je LBB11_1
llvm-svn: 56969
2008-10-02 22:15:21 +00:00
b486350b15
Move the primary fast-isel top-level comments to FastISel.cpp, where
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they'll be a little more visible. Also, update and reword them a bit.
llvm-svn: 56877
2008-09-30 20:48:29 +00:00
5e490a7567
Support for i1 XOR in FastISel. It is actually safe because
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i1 operands are assumed to already by zero-extended.
llvm-svn: 56615
2008-09-25 17:22:52 +00:00
32a733e2c7
FastISel support for debug info.
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llvm-svn: 56610
2008-09-25 17:05:24 +00:00
3663f156f7
Fix a recent fast-isel coverage regression - don't bail out before
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giving the target a chance to materialize constants.
llvm-svn: 56605
2008-09-25 01:28:51 +00:00
918fe08a56
Arrange for FastISel code to have access to the MachineModuleInfo
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object. This will be needed to support debug info.
llvm-svn: 56508
2008-09-23 21:53:34 +00:00
9801ba451a
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
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results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
llvm-svn: 56371
2008-09-19 22:16:54 +00:00
940bafb687
FastISel support for i1 constants.
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llvm-svn: 56068
2008-09-10 21:01:08 +00:00
39d82f902a
Add X86FastISel support for static allocas, and refences
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to static allocas. As part of this change, refactor the
address mode code for laods and stores.
llvm-svn: 56066
2008-09-10 20:11:02 +00:00
4a58bd331b
Clean this up, based on Evan's suggestions.
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llvm-svn: 56009
2008-09-09 20:47:17 +00:00
8529085f4f
Check for type legality before materializing integer constants in fast isel. With this change,
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all of MultiSource/Applications passes on Darwin/X86 under FastISel.
llvm-svn: 55982
2008-09-09 06:32:02 +00:00
1e97901388
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
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llvm-svn: 55975
2008-09-09 01:26:59 +00:00
e775d3526c
Add fast isel physical register definition support.
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llvm-svn: 55892
2008-09-08 08:38:20 +00:00
b9a0abb129
Indentation.
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llvm-svn: 55880
2008-09-07 09:04:52 +00:00
1dd2e40521
Revert r55859. This is breaking the build in the abscence of its companion commit.
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llvm-svn: 55865
2008-09-05 23:36:01 +00:00
fd634599dc
FastISel support for AND and OR with type i1.
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llvm-svn: 55846
2008-09-05 18:44:22 +00:00
fcf545690c
FastISel support for ConstantExprs.
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llvm-svn: 55843
2008-09-05 18:18:20 +00:00
ea56bdde34
FastISel support for unreachable.
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llvm-svn: 55818
2008-09-05 01:08:41 +00:00
50288e3c99
Add initial support for selecting constant materializations that require constant
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pool loads on X86 in fast isel. This isn't actually used yet.
llvm-svn: 55814
2008-09-05 00:06:23 +00:00
e039d5580e
Do trivial local CSE for constants and other non-Instruction values
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in FastISel.
llvm-svn: 55748
2008-09-03 23:32:19 +00:00
7bda51f5a4
Create HandlePHINodesInSuccessorBlocksFast, a version of
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HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
llvm-svn: 55746
2008-09-03 23:12:08 +00:00
b1b9398ea7
Oops, I accidentally broke the fallback case with my last commit.
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llvm-svn: 55704
2008-09-03 17:51:57 +00:00
ea666816c2
Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is
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the simple fix, materializing the constant before every use. It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.
llvm-svn: 55703
2008-09-03 17:37:03 +00:00
09ff2e7372
80 col violations.
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llvm-svn: 55668
2008-09-02 21:59:13 +00:00
6f0c51d9da
Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
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assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen
vreg. Other solutions might be preferable, such as:
1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently.
2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact.
llvm-svn: 55555
2008-08-30 00:38:46 +00:00
c45733f194
Implement null and undef values for FastISel.
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llvm-svn: 55500
2008-08-28 21:19:07 +00:00
d8a82b75e2
Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
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llvm-svn: 55482
2008-08-28 18:26:01 +00:00
9cd1a5e530
FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
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llvm-svn: 55476
2008-08-28 17:47:37 +00:00
5f57bc2247
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
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llvm-svn: 55439
2008-08-27 22:30:02 +00:00
61cfa3095d
Fix FastISel's bitcast code for the case where getRegForValue fails.
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llvm-svn: 55431
2008-08-27 20:41:38 +00:00
90609850b2
Use TargetLowering to get the types in fast isel, which handles pointer types correctly for our purposes.
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llvm-svn: 55428
2008-08-27 18:58:30 +00:00
d01789be23
Don't check TLI.getOperationAction. The FastISel way is to
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just try to do the action and let the tablegen-generated code
determine if there is target-support for an operation.
llvm-svn: 55427
2008-08-27 18:15:05 +00:00
b0b5a27438
Add a new FastISel method, getRegForValue, which takes care of
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the details of materializing constants and other values into
registers, and make use of it in several places.
llvm-svn: 55426
2008-08-27 18:10:19 +00:00
f2a6c1579f
Add a comment about the current floating-point constant code in FastISel.
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llvm-svn: 55425
2008-08-27 18:01:42 +00:00
5ca269e684
Basic FastISel support for floating-point constants.
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llvm-svn: 55401
2008-08-27 01:09:54 +00:00
54aff7bb23
Fix handling of inttoptr and ptrtoint when unhandled operands are present.
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llvm-svn: 55400
2008-08-27 00:35:37 +00:00
140549256f
Add support for fast isel of inttoptr and ptrtoint in the cases where truncation is not needed.
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llvm-svn: 55399
2008-08-27 00:31:01 +00:00
ca1711a5b5
Factor out a large amoutn of the cast handling code in fast isel into helper methods.
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This simultaneously makes the code simpler and adds support for sext as well.
llvm-svn: 55398
2008-08-26 23:46:32 +00:00
343310a715
Add support for fast isel of zext.
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llvm-svn: 55396
2008-08-26 23:14:49 +00:00
655c1dc63d
Add support for fptosi of constants in fast isel.
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llvm-svn: 55393
2008-08-26 22:34:28 +00:00
6fda9208d9
Refactor the bitcast code into its own function.
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llvm-svn: 55387
2008-08-26 21:28:54 +00:00
b5e04bfb18
Make FastISel use the correct argument type when casting GEP indices.
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llvm-svn: 55384
2008-08-26 20:57:08 +00:00
3bcbbece19
Don't select binary instructions with illegal types.
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llvm-svn: 55383
2008-08-26 20:52:40 +00:00
3c4dc434ee
Add support for fast isel of sitofp, and remove some unnecessary and imprecise legality checks.
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llvm-svn: 55381
2008-08-26 20:37:00 +00:00
e0ac9765b2
Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts,
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allowing it to support the full range of conversions people might ask for in a correct manner.
llvm-svn: 55378
2008-08-26 18:51:24 +00:00
27fb3dcbc7
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
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was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
llvm-svn: 55375
2008-08-26 18:03:31 +00:00
bf05ebaccf
Add support for fast isel of non-constant fptosi instructions.
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llvm-svn: 55373
2008-08-26 17:44:42 +00:00
8dd01ccdd8
Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
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type down. This is not currently used.
llvm-svn: 55345
2008-08-25 23:58:18 +00:00
2c067325d6
Unbreak build.
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llvm-svn: 55342
2008-08-25 22:20:39 +00:00
126afc5cb9
Expand bitcast support in fast isel to support bitcasts of non-constant values by emitting reg-reg copies.
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llvm-svn: 55340
2008-08-25 21:32:34 +00:00
32635dbfb2
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
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bitcast of constants in fast isel.
llvm-svn: 55325
2008-08-25 20:20:32 +00:00
48a3623591
Make MBBMap a DenseMap instead of a std::map.
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llvm-svn: 55220
2008-08-23 02:44:46 +00:00
2db3f8a095
Reapply r55191 and r55192.
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llvm-svn: 55205
2008-08-22 21:28:19 +00:00
fc4f64eed0
Reverting r55190, r55191, and r55192. They broke the build with this error message:
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{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1
llvm-svn: 55200
2008-08-22 20:51:05 +00:00
04968da460
Fix the InsertBranch call.
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llvm-svn: 55192
2008-08-22 19:26:10 +00:00
87ff7058e7
Support non-fallthrough unconditional branches in FastISel.
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llvm-svn: 55191
2008-08-22 19:21:41 +00:00
a2292c0d34
Add FastISel support for PHINodes. Machine PHI nodes
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are not yet updated properly, but that's a separate
task.
llvm-svn: 55187
2008-08-22 17:37:48 +00:00
49e19e906f
Factor out the predicate check code from DAGISelEmitter.cpp
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and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
llvm-svn: 55156
2008-08-22 00:20:26 +00:00
6a7461ad9b
Have FastISel skip the multiply by 1 for getelementptr on i8*.
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llvm-svn: 55129
2008-08-21 17:37:05 +00:00
efb7d2d03d
MVT::getMVT uses iPTR for pointer types, while we need the actual
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intptr_t type in this case. FastISel can now select simple
getelementptr instructions.
llvm-svn: 55125
2008-08-21 17:25:26 +00:00
fe9056584b
Basic fast-isel support for instructions with constant int operands.
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llvm-svn: 55099
2008-08-21 01:41:07 +00:00
4b5c038cd0
Type of first GEP operand is always the same as the target pointer type.
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llvm-svn: 55097
2008-08-21 01:19:11 +00:00
6a0780cdd7
Fix unused variable warnings.
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llvm-svn: 55089
2008-08-20 23:53:10 +00:00
864fcc198d
First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.
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llvm-svn: 55085
2008-08-20 22:45:34 +00:00
a4305cec93
Simplify the BuildMI calls even more.
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llvm-svn: 55077
2008-08-20 21:10:53 +00:00
02c84b8910
Simplify FastISel's constructor argument list, make the FastISel
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class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
llvm-svn: 55076
2008-08-20 21:05:57 +00:00
07a34a5f69
Make more use of the BuildMI API.
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llvm-svn: 55072
2008-08-20 18:16:32 +00:00
24e8f0cfe6
Minor code reorganization.
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llvm-svn: 55071
2008-08-20 18:10:48 +00:00
2471f6ce0f
Minor whitespace cleanup.
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llvm-svn: 55070
2008-08-20 18:09:38 +00:00
39a5ffb03f
Fix 80 column violation.
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llvm-svn: 55069
2008-08-20 18:09:02 +00:00
e8f9a00424
Fix FastISel to recognize that the last block in the function does
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not have a fall-through successor.
llvm-svn: 55033
2008-08-20 01:17:01 +00:00
f6884373c2
Fix FastISel to recognize unhandled operands, such as constants
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that aren't available as virtual registers (for now).
llvm-svn: 55026
2008-08-20 00:35:17 +00:00
b16a7783c5
Add FastISel support for floating-point operations.
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llvm-svn: 55021
2008-08-20 00:23:20 +00:00
a3e4d5a5e1
Add FastISel support for several more binary operators.
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llvm-svn: 55020
2008-08-20 00:11:48 +00:00
214343fbbe
Support unconditional fall-through branches in FastISel.
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llvm-svn: 55014
2008-08-19 22:31:46 +00:00
547ce65467
Use the BuildMI overload that sets up a destination register
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instead of the one that doesn't and then adding it manually.
llvm-svn: 55006
2008-08-19 20:46:54 +00:00
c55fdcc935
Handle the case where target-specific fastisel code doesn't have
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a desired opcode.
llvm-svn: 55005
2008-08-19 20:43:22 +00:00
c44423853a
Make FastISel's constructor protected, and give it a destructor.
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llvm-svn: 54793
2008-08-14 21:51:29 +00:00
b2226e21c3
Initial checkin of the new "fast" instruction selection support. See
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the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
llvm-svn: 54751
2008-08-13 20:19:35 +00:00
Dan Gohman