Commit Graph

80990 Commits

Author SHA1 Message Date
Kostya Serebryany afbb65dee7 [asan] move x86-specific test to a separate X86 directory with a custom lit.local.cfg file
llvm-svn: 152567
2012-03-12 18:49:11 +00:00
Chandler Carruth 595fda8466 When inlining a function and adding its inner call sites to the
candidate set for subsequent inlining, try to simplify the arguments to
the inner call site now that inlining has been performed.

The goal here is to propagate and fold constants through deeply nested
call chains. Without doing this, we loose the inliner bonus that should
be applied because the arguments don't match the exact pattern the cost
estimator uses.

Reviewed on IRC by Benjamin Kramer.

llvm-svn: 152556
2012-03-12 11:19:33 +00:00
Chandler Carruth a0796555e2 Teach instsimplify how to constant fold pointer differences.
Typically instcombine has handled this, but pointer differences show up
in several contexts where we would like to get constant folding, and
cannot afford to run instcombine. Specifically, I'm working on improving
the constant folding of arguments used in inline cost analysis with
instsimplify.

Doing this in instsimplify implies some algorithm changes. We have to
handle multiple layers of all-constant GEPs because instsimplify cannot
fold them into a single GEP the way instcombine can. Also, we're only
interested in all-constant GEPs. The result is that this doesn't really
replace the instcombine logic, it's just complimentary and focused on
constant folding.

Reviewed on IRC by Benjamin Kramer.

llvm-svn: 152555
2012-03-12 11:19:31 +00:00
Chandler Carruth 6242a0f771 FileCheck-ize this test.
llvm-svn: 152554
2012-03-12 11:19:28 +00:00
Duncan Sands 79d793e768 Don't cast away constant qualifier.
llvm-svn: 152553
2012-03-12 10:51:06 +00:00
Bob Wilson 274d6f1777 Switch to unified syntax for VFP instructions in inline assembly.
<rdar://problem/11024696>

llvm-svn: 152548
2012-03-12 06:15:36 +00:00
Benjamin Kramer 0f90695e31 Replace a hand-coded leading one counting loop with the magic from MathExtras.h.
llvm-svn: 152545
2012-03-11 19:32:35 +00:00
Benjamin Kramer f6978230b8 Remove global map. This code isn't even hot.
llvm-svn: 152544
2012-03-11 18:12:04 +00:00
Benjamin Kramer 71b197306e DwarfDebug: Store the filename/dirname pair as a zero-separated string in a stringmap, instead of using a highly inefficient std::map of a pair of std::strings.
llvm-svn: 152541
2012-03-11 14:56:26 +00:00
Craig Topper bef78fc2ee Convert more static tables of registers used by calling convention to uint16_t to reduce space.
llvm-svn: 152538
2012-03-11 07:57:25 +00:00
Craig Topper ca658c2264 Use uint16_t to store registers and opcode in static tables in the target specific backends.
llvm-svn: 152537
2012-03-11 07:16:55 +00:00
Craig Topper 41bd30e027 Remove unused functions getArgRegs and getNumArgRegs.
llvm-svn: 152535
2012-03-11 06:46:40 +00:00
Stepan Dyatkovskiy 97b02fc1b3 llvm::SwitchInst
Renamed methods caseBegin, caseEnd and caseDefault with case_begin, case_end, and case_default.
Added some notes relative to case iterators.

llvm-svn: 152532
2012-03-11 06:09:17 +00:00
Gregory Szorc 21c9f38977 [llvm.py] Implement disassembler interface
It doesn't currently support the op info and symbol lookup callbacks,
but it is better than nothing.

llvm-svn: 152527
2012-03-11 02:32:56 +00:00
Douglas Gregor 39b010f58a Add a few missing 'template' keywords
llvm-svn: 152525
2012-03-11 02:22:41 +00:00
Craig Topper b358499b18 Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to reduce size of static tables.
llvm-svn: 152524
2012-03-11 01:57:56 +00:00
Michael J. Spencer 512cab2827 Fix warnings when building with VS11.
llvm-svn: 152523
2012-03-11 01:20:23 +00:00
Michael J. Spencer 914dc77dfc Fix warnings.
llvm-svn: 152522
2012-03-11 00:51:01 +00:00
Aaron Ballman 778cf08746 Fixing a compile warning triggered in MSVC about constant truncation.
llvm-svn: 152518
2012-03-10 23:03:01 +00:00
Michael J. Spencer cfa95f66a1 Make StringRef::getAsInteger work with all integer types. Before this change
it would fail with {,u}int64_t on x86-64 Linux.

This also removes code duplication.

llvm-svn: 152517
2012-03-10 23:02:54 +00:00
Benjamin Kramer 71ff880ff9 Make helper static, so it can be inlined into its sole caller.
llvm-svn: 152515
2012-03-10 22:41:06 +00:00
Gregory Szorc 11d2e18405 Revert "[llvm.py] Implement interface to enhanced disassembler"
Chris Lattner says the edis interface is going away. It doesn't make
sense to land something that will go away in the near future.

llvm-svn: 152508
2012-03-10 21:44:03 +00:00
Kay Tiong Khoo 57c8e7f364 *fix typo in comment; test of commit access
llvm-svn: 152507
2012-03-10 21:29:49 +00:00
Gregory Szorc 6174a67e04 [llvm.py] Implement interface to enhanced disassembler
This requires a C++ change to EDDisassembler's ctor to function properly
(the llvm::InitializeAll* functions aren't being called currently and
there is no way to call them from Python).

Code is partially tested and works well enough for initial commit. There
are probably many small bugs.

llvm-svn: 152506
2012-03-10 21:05:05 +00:00
Gregory Szorc 053354edce [llvm.py] Make LLVMObject.__del__ work if called during __init__
llvm-svn: 152505
2012-03-10 21:01:14 +00:00
Andrew Trick 61d277f146 Move llc + target triple tests into X86
llvm-svn: 152502
2012-03-10 19:03:51 +00:00
Bill Wendling 2bbb7945e7 As Duncan pointed out, pointers tend not to be in floating point format...for now.
llvm-svn: 152499
2012-03-10 18:20:55 +00:00
Benjamin Kramer fee6372daa Don't try to filecheck bitcode.
llvm-svn: 152498
2012-03-10 18:07:46 +00:00
Bill Wendling 0624d2a1ec Make this transformation slightly less agressive and more correct.
The 'CmpInst::isFalseWhenEqual' function returns 'false' for values other than
simply equality. For instance, it returns 'false' for <= or >=. This isn't the
correct behavior for this transformation, which is checking for strict equality
and non-equality. It was causing the gcc.c-torture/execute/frame-address.c test
to fail because it would completely (and incorrectly) optimize a whole function
into a 'ret i32 0'.

llvm-svn: 152497
2012-03-10 17:56:03 +00:00
Benjamin Kramer adfc73d68f C files in llvm still have to be C89 compliant, remove C++-style comments.
llvm-svn: 152495
2012-03-10 15:10:06 +00:00
Benjamin Kramer 6338e61ae9 Microoptimize getVRegDef. def_begin isn't free, don't compute it twice.
llvm-svn: 152492
2012-03-10 12:50:44 +00:00
Chandler Carruth 97f6f03c42 Refactor some methods to look through bitcasts and GEPs on pointers into
a common collection of methods on Value, and share their implementation.
We had two variations in two different places already, and I need the
third variation for inline cost estimation.

Reviewed by Duncan Sands on IRC, but further comments here welcome.

llvm-svn: 152490
2012-03-10 08:39:09 +00:00
Bill Wendling ebb10df441 Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.
Patch by Kay Tiong Khoo!

llvm-svn: 152487
2012-03-10 07:37:27 +00:00
Bill Wendling 1ab79c6db3 Implement a more intelligent way of spilling uses across an invoke boundary.
The old way of determine when and where to spill a value that was used inside of
a landing pad resulted in spilling that value everywhere and not just at the
invoke edge.

This algorithm determines which values are used within a landing pad. It then
spills those values before the invoke and reloads them before the uses. This
should prevent excessive spilling in many cases, e.g. inside of loops.
<rdar://problem/10609139>

llvm-svn: 152486
2012-03-10 07:11:55 +00:00
Gregory Szorc eace54fcb4 [llvm.py] Define enumerations from Core.h; add OpCode class
llvm-svn: 152483
2012-03-10 05:50:56 +00:00
Gregory Szorc 385a2532e0 [llvm.py] Implement interface to object files
It is now possible to load object files and scan over sections, symbols,
and relocations! Includes test code with partial coverage.

llvm-svn: 152482
2012-03-10 04:41:24 +00:00
Benjamin Kramer 82803112da Fix uses of the C99 PRI format macros not to conflict with C++11 UDLs.
llvm-svn: 152474
2012-03-10 02:04:38 +00:00
Jakob Stoklund Olesen 99014ff206 Report the defining instruction.
llvm-svn: 152460
2012-03-10 00:44:11 +00:00
Jakob Stoklund Olesen 9f3e5744ab Add SSA verification to MachineVerifier.
Somehow we never verified SSA dominance before.

llvm-svn: 152458
2012-03-10 00:36:06 +00:00
Jakob Stoklund Olesen 6ea6a14458 Use SmallPtrSet instead of DenseSet.
llvm-svn: 152457
2012-03-10 00:36:04 +00:00
Benjamin Kramer e1e549d617 Give dagcombiner's worklist some inline capacity.
llvm-svn: 152454
2012-03-10 00:23:58 +00:00
Akira Hatanaka da00aa80b6 Do not custom lower i64 nodes if i64 is not a legal type. Move lines that set
operation action of nodes.

llvm-svn: 152452
2012-03-10 00:03:50 +00:00
Akira Hatanaka b7f78592e2 Lower SETCC nodes during legalization. Previously, it was lowered in DAG combine pass.
llvm-svn: 152450
2012-03-09 23:46:03 +00:00
Jakob Stoklund Olesen 7d544f9165 Assert on SSA errors in LiveVariables.
All uses of a virtual register must be dominated by its def.

llvm-svn: 152449
2012-03-09 23:41:44 +00:00
Akira Hatanaka 3e914578c5 Remove unused header files.
llvm-svn: 152447
2012-03-09 23:28:30 +00:00
Andrew Trick af1bee7235 misched: handle scheduler that insert instructions at empty region boundaries.
And add comments, since this is obviously confusing.

llvm-svn: 152445
2012-03-09 22:34:56 +00:00
Kevin Enderby deed5aaa41 Add the missing call to Error when a bad X86 scale expression is parsed.
llvm-svn: 152443
2012-03-09 22:24:10 +00:00
David Meyer 6c614bf717 Support reading GNU symbol versions in ELFObjectFile
* Add enums and structures for GNU version information.
* Implement extraction of that information on a per-symbol basis (ELFObjectFile::getSymbolVersion).
* Implement a generic interface, GetELFSymbolVersion(), for getting the symbol version from the ObjectFile (hides the templating).
* Have llvm-readobj print out the version, when available.
* Add a test for the new feature: readobj-elf-versioning.test

llvm-svn: 152436
2012-03-09 20:59:52 +00:00
David Meyer d53422d1a7 [Object]
Make Binary::TypeID more granular, to distinguish between ELF 32/64 little/big

llvm-svn: 152435
2012-03-09 20:41:57 +00:00
Duncan Sands 14eb175836 Add statistics on removed switch cases, and fix the phi statistic
to count the number of phis changed, not the number visited.

llvm-svn: 152425
2012-03-09 19:21:15 +00:00
Gregory Szorc 3a08300585 [llvm.py] Make ObjectFile destructor work
Previous code had a double free in MemoryBuffer. The tests now pass.

llvm-svn: 152422
2012-03-09 18:56:33 +00:00
Dan Gohman 500b598c5c When identifying exit nodes for the reverse-CFG reverse-post-order
traversal, consider nodes for which the only successors are backedges
which the traversal is ignoring to be exit nodes. This fixes a problem
where the bottom-up traversal was failing to visit split blocks along
split loop backedges. This fixes rdar://10989035.

llvm-svn: 152421
2012-03-09 18:50:52 +00:00
Kevin Enderby 014e1cde5f Fix the x86 disassembler to at least print the lock prefix if it is the first
prefix.  Added a FIXME to remind us this still does not work when it is not the
first prefix.

llvm-svn: 152414
2012-03-09 17:52:49 +00:00
Daniel Dunbar 3618cb7b6b [Support] Drop verbose _ATTRIBUTE from LLVM_ATTRIBUTE_{READONLY,READNONE} macro
names.

llvm-svn: 152413
2012-03-09 16:30:33 +00:00
NAKAMURA Takumi c72fdf4490 TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask.
~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF.

llvm-svn: 152407
2012-03-09 14:52:44 +00:00
NAKAMURA Takumi aebd3da46d test/MC/X86/lit.local.cfg: Fix up to detect 'X86' in targets.
llvm-svn: 152406
2012-03-09 14:52:38 +00:00
Duncan Sands cca89124a2 Eliminate switch cases that can never match, for example removes all
negative switch cases if the branch condition is known to be positive.
Inspired by a recent improvement to GCC's VRP.

llvm-svn: 152405
2012-03-09 13:45:18 +00:00
Anton Korobeynikov f32638d77c Add support for r600 (AMD GPUs HD2XXX - HD6XXX) target triplet.
Patch by Tom Stellard!

llvm-svn: 152400
2012-03-09 10:09:36 +00:00
Nick Lewycky fea3e00e09 Factor out the analysis of addition and subtraction in ComputeMaskedBits. Reuse
it to analyze extractvalue(llvm.[us](add|sub).with.overflow.*) intrinsics!

llvm-svn: 152398
2012-03-09 09:23:50 +00:00
Gregory Szorc c04bbd27af [llvm.py] Initial skeleton for Python LLVM bindings
This contains a semi-functional skeleton for the implementation of the
LLVM bindings for Python.

The API for the Object.h interface is roughly designed but not
implemented. MemoryBufferRef is implemented and actually appears to
work!

The ObjectFile unit test fails with a segmentation fault because the
LLVM library isn't being properly initialized. The build system doesn't
know about this code yet, so no alerts should fire.

llvm-svn: 152397
2012-03-09 09:07:35 +00:00
Andrew Trick edfe2ec429 misched: handle scheduling region boundaries nicely.
llvm-svn: 152393
2012-03-09 08:02:51 +00:00
Craig Topper 2dac962864 Use uint16_t to store opcodes in static tables in X86 backend.
llvm-svn: 152391
2012-03-09 07:45:21 +00:00
Ahmed Charles 1662013a43 Fix undefined behavior in the Mips backend.
llvm-svn: 152390
2012-03-09 06:36:45 +00:00
Andrew Trick 8c207e47c1 misched interface: rename Begin/End to RegionBegin/RegionEnd since they are not private.
llvm-svn: 152382
2012-03-09 04:29:02 +00:00
Andrew Trick 1c0ec45b67 misched comments
llvm-svn: 152374
2012-03-09 03:46:42 +00:00
Andrew Trick a21daf7f5b revert 152356: verify misched changes using -misched=shuffle.
llvm-svn: 152373
2012-03-09 03:46:39 +00:00
Chandler Carruth 1bb80affe8 Fix a silly restriction on the fast-path for hash_combine_range. This
caused several clients to select the slow variation. =[ This is extra
annoying because we don't have any realistic way of testing this -- by
design, these two functions *must* compute the same value.

Found while inspecting the output of some benchmarks I'm working on.

llvm-svn: 152369
2012-03-09 02:49:38 +00:00
Chandler Carruth 783b7198b7 Undo a previous restriction on the inline cost calculation which Nick
introduced. Specifically, there are cost reductions for all
constant-operand icmp instructions against an alloca, regardless of
whether the alloca will in fact be elligible for SROA. That means we
don't want to abort the icmp reduction computation when we abort the
SROA reduction computation. That in turn frees us from the need to keep
a separate worklist and defer the ICmp calculations.

Use this new-found freedom and some judicious function boundaries to
factor the innards of computing the cost factor of any given instruction
out of the loop over the instructions and into static helper functions.
This greatly simplifies the code, and hopefully makes it more clear what
is happening here.

Reviewed by Eric Christopher. There is some concern that we'd like to
ensure this doesn't get out of hand, and I plan to benchmark the effects
of this change over the next few days along with some further fixes to
the inline cost.

llvm-svn: 152368
2012-03-09 02:49:36 +00:00
Chad Rosier a281afc676 Fix a regression from r147481.
Original commit message from r147481:
DAGCombine for transforming 128->256 casts into a vmovaps, rather
then a vxorps + vinsertf128 pair if the original vector came from a load.

Fix:
Unaligned loads need to generate a vmovups.
rdar://10974078

llvm-svn: 152366
2012-03-09 02:00:48 +00:00
Andrew Trick 453006875c misched: allow the default scheduler to be one chosen by the target.
llvm-svn: 152360
2012-03-09 00:52:20 +00:00
Andrew Trick a6fe207fab Added TargetPassConfig::enablePass
llvm-svn: 152359
2012-03-09 00:52:17 +00:00
Evan Cheng bc3b4e3f12 Cache MBB->begin. It's possible the scheduler / bundler may change MBB->begin().
llvm-svn: 152356
2012-03-09 00:24:29 +00:00
Benjamin Kramer 3bc40c5fee Silence unused function warning when graphviz is not available.
llvm-svn: 152346
2012-03-08 22:15:23 +00:00
Benjamin Kramer 0ef86b0ea3 Remove the no longer existent psp triple from a test.
The test fell back to the C backend, making it useless and it started to fail
on configurations that don't build the C backend.

llvm-svn: 152342
2012-03-08 21:22:27 +00:00
Duncan Sands 48992554cc Have llvm-mc --version print the list of registered targets like llc does.
Patch by jey.

llvm-svn: 152315
2012-03-08 14:24:32 +00:00
Duncan Sands d8e918be4c Revert commit 152300 (ddunbar) since it still seems to be breaking
buildbots.  Original commit message:

[ADT] Change the trivial FoldingSetNodeID::Add* methods to be inline, reapplied
with a fix for the longstanding over-read of 32-bit pointer values.

llvm-svn: 152304
2012-03-08 09:32:21 +00:00
Craig Topper 5a4bcc749a Use uint16_t to store instruction implicit uses and defs. Reduces static data.
llvm-svn: 152301
2012-03-08 08:22:45 +00:00
Daniel Dunbar 544637937a [ADT] Change the trivial FoldingSetNodeID::Add* methods to be inline, reapplied
with a fix for the longstanding over-read of 32-bit pointer values.

llvm-svn: 152300
2012-03-08 07:42:18 +00:00
Stepan Dyatkovskiy 5b648afb4d Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120130/136146.html

Implemented CaseIterator and it solves almost all described issues: we don't need to mix operand/case/successor indexing anymore. Base iterator class is implemented as a template since it may be initialized either from "const SwitchInst*" or from "SwitchInst*".

ConstCaseIt is just a read-only iterator.
CaseIt is read-write iterator; it allows to change case successor and case value.

Usage of iterator allows totally remove resolveXXXX methods. All indexing convertions done automatically inside the iterator's getters.

Main way of iterator usage looks like this:
SwitchInst *SI = ... // intialize it somehow

for (SwitchInst::CaseIt i = SI->caseBegin(), e = SI->caseEnd(); i != e; ++i) {
  BasicBlock *BB = i.getCaseSuccessor();
  ConstantInt *V = i.getCaseValue();
  // Do something.
}

If you want to convert case number to TerminatorInst successor index, just use getSuccessorIndex iterator's method.
If you want initialize iterator from TerminatorInst successor index, use CaseIt::fromSuccessorIndex(...) method.

There are also related changes in llvm-clients: klee and clang.

llvm-svn: 152297
2012-03-08 07:06:20 +00:00
Craig Topper d31658d44c Re-commit r152202 hopefully fixing the MSVC linker error.
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.

llvm-svn: 152296
2012-03-08 06:55:27 +00:00
Daniel Dunbar 5ecfd7fd12 Revert r152288, "[ADT] Change the trivial FoldingSetNodeID::Add* methods to be
inline.", which is breaking the bots in a way I don't understand.

llvm-svn: 152295
2012-03-08 04:17:15 +00:00
Akira Hatanaka d60cb3822f Test case for r152280, r152285 and r152290.
llvm-svn: 152292
2012-03-08 03:32:42 +00:00
Akira Hatanaka 5e152182a4 Invoke setTargetDAGCombine for SELECT.
llvm-svn: 152290
2012-03-08 03:26:37 +00:00
Daniel Dunbar faa48ebbba [ADT] Change the trivial FoldingSetNodeID::Add* methods to be inline.
llvm-svn: 152288
2012-03-08 02:52:00 +00:00
Akira Hatanaka 7dd7c08419 Swap the operands of a select node if the false (the second) operand is 0.
For example, this pattern 
(select (setcc lhs, rhs, cc), true, 0)
is transformed to this one:
(select (setcc lhs, rhs, inverse(cc)), 0, true)

This enables MipsDAGToDAGISel::ReplaceUsesWithZeroReg (added in r152280) to
replace 0 with $zero.

llvm-svn: 152285
2012-03-08 02:14:24 +00:00
Chandler Carruth dd1637c393 Rotate two of the functions used to count bonuses for the inline cost
analysis to be methods on the cost analysis's function info object
instead of the code metrics object. These really are just users of the
code metrics, they're building the information for the function's
analysis.

This is the first step of growing the amount of information we collect
about a function in order to cope with pair-wise simplifications due to
allocas.

llvm-svn: 152283
2012-03-08 02:04:19 +00:00
Akira Hatanaka 956dd2261e Set minimum function alignment to 3 if target is Mips64.
llvm-svn: 152282
2012-03-08 01:59:33 +00:00
Akira Hatanaka 0b2fa914f0 This patch eliminates redundant instructions that produce 0.
For example, the first instruction in the code below can be eliminated if the
use of $vr0 is replaced with $zero: 

addiu $vr0, $zero, 0
add $vr2, $vr1, $vr0

add $vr2, $vr1, $zero

llvm-svn: 152280
2012-03-08 01:51:59 +00:00
Andrew Trick 02a80da331 misched interface: Expose the MachineScheduler pass.
Allow targets to provide their own schedulers (subclass of
ScheduleDAGInstrs) to the misched pass. Select schedulers using
-misched=...

llvm-svn: 152278
2012-03-08 01:41:12 +00:00
Jim Grosbach 11e8c0d6b5 ARM don't use MCRelaxAll, as it's not safe on ARM.
The ARM code generator makes aggressive assumptions about the encodings
being selected for branches which MCRelaxAll invalidates.

rdar://11006355

llvm-svn: 152268
2012-03-08 00:07:52 +00:00
Sean Callanan ca92a3da7c Improved support in RuntimeDyldMachO for generating
code that will be relocated into another memory space.
Now when relocations are resolved, the address of
the relocation in the host memory (where the JIT is)
is passed separately from the address that the
relocation will be at in the target memory (where
the code will run).

llvm-svn: 152264
2012-03-07 23:05:25 +00:00
Andrew Trick 69b4204c18 Cleanup VLIWPacketizer to use the updated ScheduleDAGInstrs interface.
llvm-svn: 152262
2012-03-07 23:01:09 +00:00
Andrew Trick 9a0c583954 misched prep: Expose the ScheduleDAGInstrs interface so targets may
implement their own MachineScheduler.

llvm-svn: 152261
2012-03-07 23:01:06 +00:00
Andrew Trick d743f71e82 misched prep: Remove LLVM_LIBRARY_VISIBILITY from ScheduleDAGInstrs.
llvm-svn: 152260
2012-03-07 23:01:02 +00:00
Andrew Trick 9b9dea5d07 misched prep: Comment the ScheduleDAGInstrs interface.
llvm-svn: 152259
2012-03-07 23:00:59 +00:00
Andrew Trick 926d4736ed misched prep: Cleanup ScheduleDAGInstrs interface.
ScheduleDAGInstrs will be the main interface for MI-level
schedulers. Make sure it's readable: one page of protected fields, one
page of public methids.

llvm-svn: 152258
2012-03-07 23:00:57 +00:00
Andrew Trick 67561b3ef2 misched prep: remove extra "protected"
llvm-svn: 152257
2012-03-07 23:00:54 +00:00
Andrew Trick a316faabec misched prep: rename InsertPos to End.
ScheduleDAGInstrs knows nothing about how instructions will be moved or inserted.

llvm-svn: 152256
2012-03-07 23:00:52 +00:00
Andrew Trick 52226d409b misched preparation: rename core scheduler methods for consistency.
We had half the API with one convention, half with another. Now was a
good time to clean it up.

llvm-svn: 152255
2012-03-07 23:00:49 +00:00
Benjamin Kramer 22842f89e4 Copy the right amount of elements.
llvm-svn: 152254
2012-03-07 22:48:42 +00:00
Benjamin Kramer 6e8d4b8eb4 SmallPtrSet: Copy all the elements when swapping, not just numelements.
This fixes a build failure in webkit. Copying all elements shouldn't be
necessary, I'll look out for a better fix soon.

llvm-svn: 152252
2012-03-07 22:33:21 +00:00
Chad Rosier 377f1f2d39 [fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point
condition flags to CPSR.  This allows us to simplify SelectCmp.
Patch by Zonr Chang <zonr.xchg@gmail.com>.

llvm-svn: 152243
2012-03-07 20:59:26 +00:00
Rafael Espindola bdd1258784 Use llvm-mc instead of llc. Patch by Jack Carter.
llvm-svn: 152242
2012-03-07 20:58:59 +00:00
Benjamin Kramer e815db6140 configure: Don't require a perl interpreter to be present, LLVM's buildsystem doesn't depend on perl anymore.
llvm-svn: 152234
2012-03-07 17:07:20 +00:00
Chad Rosier 3048107bc1 Revert r152202 as it's causing internal buildbot failures.
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect 
all 16-bit string table offsets. Also make sure the string to offset table 
string is not larger than 65536 characters since larger string literals aren't 
portable.

llvm-svn: 152233
2012-03-07 17:06:40 +00:00
Jakob Stoklund Olesen aa0f752fc8 Fix infinite loop in nested multiclasses.
Patch by Michael Liao!

llvm-svn: 152232
2012-03-07 16:39:35 +00:00
Chandler Carruth 7c253fe4fd Try a completely different approach to this type trait to appease older
compilers. It seems that GCC 4.3 (and likely older) simply aren't going
to do SFINAE on non-type template parameters the way Clang and modern
GCCs do...

Now we detect the implicit conversion to an integer type, and then
blacklist classes, pointers, and floating point types. This seems to
work well enough, and I'm hopeful will return the bots to life.

llvm-svn: 152227
2012-03-07 12:27:35 +00:00
Chandler Carruth 505cb51e29 Attempt #2 at appeasing GCC 4.3. This compiler really doesn't like these
traits.

With this change, the pattern used here is *extremely* close to the
pattern used elsewhere in the file, so I'm hoping it survives the
build-bots.

llvm-svn: 152225
2012-03-07 11:31:11 +00:00
Chandler Carruth 636ee38a88 Try to clarify this comment some.
llvm-svn: 152221
2012-03-07 10:13:40 +00:00
Chandler Carruth ddbe7ee885 Switch the is_integral_or_enum trait machinery to use an explicit
template argument and an *implicit* conversion from '0' to a null
pointer. For some bizarre reason, GCC 4.3.2 thinks that the cast to
'(T*)' is invalid inside of an enumerator's value... which it isn't but
whatever. ;] This pattern is used elsewhere in the type_traits header
and so hopefully will survive the wrath of the build bots.

llvm-svn: 152220
2012-03-07 10:05:35 +00:00
Chandler Carruth fba0706504 What's better than fixing and simplifying broken hash functions?
Deleting them because they aren't used. =D

Yell if you need these, I'm happy to instead replace them with nice uses
of the new infrastructure.

llvm-svn: 152219
2012-03-07 09:54:06 +00:00
Chandler Carruth 962152ca7a Remove another outbreak of customized (and completely broken) hashing.
This one is particularly annoying because the hashing algorithm is
highly specialized, with a strange "equivalence" definition that subsets
the fields involved.

Still, this looks at the exact same set of data as the old code, but
without bitwise or-ing over parts of it and other mixing badness. No
functionality changed here. I've left a substantial fixme about the fact
that there is a cleaner and more principled way to do this, but it
requires making the equality definition actual stable for particular
types...

llvm-svn: 152218
2012-03-07 09:39:46 +00:00
Chandler Carruth 2bd66afa42 Add support to the hashing infrastructure for automatically hashing both
integral and enumeration types. This is accomplished with a bit of
template type trait magic. Thanks to Richard Smith for the core idea
here to detect viable types by detecting the set of types which can be
default constructed in a template parameter.

This is used (in conjunction with a system for detecting nullptr_t
should it exist) to provide an is_integral_or_enum type trait that
doesn't need a whitelist or direct compiler support.

With this, the hashing is extended to the more general facility. This
will be used in a subsequent commit to hashing more things, but I wanted
to make sure the type trait magic went through the build bots separately
in case other compilers don't like this formulation.

llvm-svn: 152217
2012-03-07 09:32:32 +00:00
Bill Wendling 7c5dcb6ccf Where the BranchFolding pass removes a branch then adds another better branch,
the DebugLoc information can be maintained throughout by grabbing the DebugLoc
before the RemoveBranch and then passing the result to the InsertBranch.
Patch by Andrew Stanford-Jason!

llvm-svn: 152212
2012-03-07 08:49:42 +00:00
Andrew Trick 1a1b54a2da Fix cmake
llvm-svn: 152210
2012-03-07 05:46:04 +00:00
Andrew Trick f9fa8afdaa comment
llvm-svn: 152209
2012-03-07 05:21:54 +00:00
Andrew Trick 60cf03e772 misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.
ScheduleDAG is responsible for the DAG: SUnits and SDeps. It provides target hooks for latency computation.

ScheduleDAGInstrs extends ScheduleDAG and defines the current scheduling region in terms of MachineInstr iterators. It has access to the target's scheduling itinerary data. ScheduleDAGInstrs provides the logic for building the ScheduleDAG for the sequence of MachineInstrs in the current region. Target's can implement highly custom schedulers by extending this class.

ScheduleDAGPostRATDList provides the driver and diagnostics for current postRA scheduling. It maintains a current Sequence of scheduled machine instructions and logic for splicing them into the block. During scheduling, it uses the ScheduleHazardRecognizer provided by the target.

Specific changes:
- Removed driver code from ScheduleDAG. clearDAG is the only interface needed.

- Added enterRegion/exitRegion hooks to ScheduleDAGInstrs to delimit the scope of each scheduling region and associated DAG. They should be used to setup and cleanup any region-specific state in addition to the DAG itself. This is necessary because we reuse the same ScheduleDAG object for the entire function. The target may extend these hooks to do things at regions boundaries, like bundle terminators. The hooks are called even if we decide not to schedule the region. So all instructions in a block are "covered" by these calls.

- Added ScheduleDAGInstrs::begin()/end() public API.

- Moved Sequence into the driver layer, which is specific to the scheduling algorithm.

llvm-svn: 152208
2012-03-07 05:21:52 +00:00
Andrew Trick 42756e2eb4 ScheduleDAGInstrs comments
llvm-svn: 152207
2012-03-07 05:21:47 +00:00
Andrew Trick e932bb77b5 misched preparation: modularize schedule emission.
ScheduleDAG has nothing to do with how the instructions are scheduled.

llvm-svn: 152206
2012-03-07 05:21:44 +00:00
Andrew Trick edee68ce1b misched preparation: modularize schedule printing.
ScheduleDAG will not refer to the scheduled instruction sequence.

llvm-svn: 152205
2012-03-07 05:21:40 +00:00
Andrew Trick 46a58664f7 misched preparation: modularize schedule verification.
ScheduleDAG will not refer to the scheduled instruction sequence.

llvm-svn: 152204
2012-03-07 05:21:36 +00:00
Andrew Trick 7c6c41a56a whitespace
llvm-svn: 152203
2012-03-07 05:21:32 +00:00
Craig Topper 8d68422121 Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.
llvm-svn: 152202
2012-03-07 05:17:23 +00:00
Eli Friedman da7e7da0cf Missing change in r152106 for TinyPtrVector.
llvm-svn: 152201
2012-03-07 03:37:32 +00:00
Chandler Carruth d4ba3eb480 Switch this code to use hash_combine_range rather than incremental calls
to hash_combine. One of the interfaces could already do this, and the
other can just use a small buffer. This is a much more efficient way to
use the hash_combine interface, although I don't have any particular
benchmark where this code was hot, so I can't measure much of an impact.
It at least doesn't slow anything down.

llvm-svn: 152200
2012-03-07 03:22:32 +00:00
Chandler Carruth cee7a12d40 Cache the sized-ness of struct types, once we reach the steady state of
"is sized". This prevents every query to isSized() from recursing over
every sub-type of a struct type. This could get *very* slow for
extremely deep nesting of structs, as in 177.mesa.

This change is a 45% speedup for 'opt -O2' of 177.mesa.linked.bc, and
likely a significant speedup for other cases as well. It even impacts
-O0 cases because so many part of the code try to check whether a type
is sized.

Thanks for the review from Nick Lewycky and Benjamin Kramer on IRC.

llvm-svn: 152197
2012-03-07 02:33:09 +00:00
Chandler Carruth 0bb9044973 Remove an accidental cut/paste of a comment into the middle of
a function. Dunno how I missed this when going through code...

llvm-svn: 152196
2012-03-07 02:33:06 +00:00
Nick Lewycky 1d57ee341a No functionality change. Type::isSized() can be expensive, so avoid calling it
until after other inexpensive tests.

llvm-svn: 152195
2012-03-07 02:27:53 +00:00
Jim Grosbach eadd8ee49c ARM pre-v6 assembly parsing for umull/smull.
llvm-svn: 152188
2012-03-07 01:09:17 +00:00
Jim Grosbach 8db462042c ARM pre-v6 alias for 'nop' to 'mov r0, r0'
llvm-svn: 152185
2012-03-07 00:52:41 +00:00
Jim Grosbach eed9992b26 Tidy up. Remove dead code that slipped into previous commit.
llvm-svn: 152184
2012-03-07 00:52:39 +00:00
Andrew Trick edbb3b2231 Added -view-background to avoid waiting for each GraphViz invocation.
GV and XDOT paths are untested but should work the same.

llvm-svn: 152179
2012-03-07 00:18:27 +00:00
Andrew Trick a5f19560fb Added -view-misched=dags options.
llvm-svn: 152178
2012-03-07 00:18:25 +00:00
Andrew Trick 1b2324d0e8 Cleanup in preparation for misched: Move DAG visualization logic.
Soon, ScheduleDAG will not refer to the BB.

llvm-svn: 152177
2012-03-07 00:18:22 +00:00
Andrew Trick 320c7030db Added MachineBasicBlock::getFullName() to standardize/factor codegen diagnostics.
llvm-svn: 152176
2012-03-07 00:18:18 +00:00
Andrew Trick 5297d8df99 whitespace
llvm-svn: 152175
2012-03-07 00:18:15 +00:00
Andrew Trick 0c84efe8dd Cleanup: DAG building is specific to either SD or MI scheduling. Not part of the target interface.
llvm-svn: 152174
2012-03-07 00:18:12 +00:00
Andrew Trick 3222c0985b misched comments
llvm-svn: 152173
2012-03-07 00:18:08 +00:00
Andrew Trick 3b6eb1e5ea misched: Use the StartBlock/FinishBlock hooks
llvm-svn: 152172
2012-03-07 00:18:05 +00:00
Eric Christopher 54cf8ff45e Add the DW_AT_APPLE_runtime_class attribute to forward declarations
as well as completely defined classes.

This fixes rdar://10956070

llvm-svn: 152171
2012-03-07 00:15:19 +00:00
Evan Cheng 80893ce5f5 Extend r148086 to check for [r +/- reg] address mode. This fixes queens performance regression (due to increased register pressure from overly aggressive pre-inc formation).
llvm-svn: 152162
2012-03-06 23:33:32 +00:00
Jim Grosbach ed428bc1ce ARM more NEON VLD/VST composite physical register refactoring.
Register pair, all lanes subscripting.

llvm-svn: 152157
2012-03-06 23:10:38 +00:00
Jakob Stoklund Olesen 936656ba2f Hoist common code out of if statement.
llvm-svn: 152153
2012-03-06 22:27:13 +00:00
Jim Grosbach 13a292cc74 ARM refactor more NEON VLD/VST instructions to use composite physregs
Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the
pseudos as a result.

llvm-svn: 152150
2012-03-06 22:01:44 +00:00
Owen Anderson 773642d3d8 Fix support for encodings up to 64-bits in length. TableGen was silently truncating them to 32-bits prior to this.
llvm-svn: 152148
2012-03-06 21:48:32 +00:00
Benjamin Kramer e1c34e9f43 SmallPtrSet: Provide a more efficient implementation of swap than the default triple-copy std::swap.
This currently assumes that both sets have the same SmallSize to keep the implementation simple,
a limitation that can be lifted if someone cares.

llvm-svn: 152143
2012-03-06 20:40:02 +00:00
Eli Friedman de850676e0 Fix the operand ordering on aliases for shld and shrd. PR12173, part 2.
llvm-svn: 152136
2012-03-06 19:58:46 +00:00
Ted Kremenek e7f7dd9158 Add new load commands for MachO.
llvm-svn: 152135
2012-03-06 19:54:44 +00:00
Daniel Dunbar 7e51b5fd31 build/Darwin: Make it easy to cause all tools to get codesigned (with make CODESIGN_TOOLS=1).
- On OS X 10.7+ this is apparently recommended practice. This maybe should
   become a configurey thing one day, but I'm not sure it is right to
   automatically turn it on.

llvm-svn: 152133
2012-03-06 19:07:38 +00:00
Jim Grosbach 63ee881cd6 Tidy up. Kill some dead code.
llvm-svn: 152131
2012-03-06 18:59:19 +00:00
Jakob Stoklund Olesen 579e701fd9 Allow the same types in DPair as in QPR.
llvm-svn: 152129
2012-03-06 18:44:11 +00:00
Kevin Enderby 520eb3ba8a Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.
llvm-svn: 152127
2012-03-06 18:33:12 +00:00
Roman Divacky ef21be2cda Convert PowerPC to register mask operands.
llvm-svn: 152122
2012-03-06 16:41:49 +00:00
Benjamin Kramer 4ed8f3c0a8 Remove excess const, a const_iterator shouldn't be const itself.
Fixes 1242 warnings from gcc during clang build.

llvm-svn: 152120
2012-03-06 13:32:36 +00:00
Jay Foad cc5fd3e25d Change ConstantAggrUniqueMap to use Chandler's new hashing
implementation. Patch by Meador Inge

llvm-svn: 152116
2012-03-06 10:43:52 +00:00
Bill Wendling 4fa13ccbec Add column width.
llvm-svn: 152115
2012-03-06 09:23:25 +00:00
Bill Wendling 4af807c59d Remove short tag marker.
llvm-svn: 152114
2012-03-06 09:22:03 +00:00
Bill Wendling 61d5e4d4d5 Appease the HTML validation gods.
llvm-svn: 152113
2012-03-06 09:20:59 +00:00
Bill Wendling 23d60acc38 Fix validation errors.
llvm-svn: 152112
2012-03-06 09:17:39 +00:00
Bill Wendling d672d9cd02 Fix validation errors.
llvm-svn: 152111
2012-03-06 09:17:04 +00:00
Bill Wendling 4bf1cc8312 Add missing end tags.
llvm-svn: 152110
2012-03-06 08:59:13 +00:00
Argyrios Kyrtzidis 3031e1c1cf [TinyPtrVector] Add erase method and const-goodness.
llvm-svn: 152107
2012-03-06 07:14:58 +00:00
Argyrios Kyrtzidis 3023bc32f0 PointerUnion::getAddrOf() does not need to be template since we can only
use the first pointer type for it. Rename it to getAddrOfPtr1().

llvm-svn: 152106
2012-03-06 07:14:54 +00:00
Craig Topper 93d65c785e Use uint16_t to store indices into string table since C++ only allows 64K string literals so the index into the big string can never be larger than that.
llvm-svn: 152105
2012-03-06 06:04:39 +00:00
Craig Topper f875c10fda Add asserts to ensure that values will fit into the tables.
llvm-svn: 152104
2012-03-06 04:39:52 +00:00
Craig Topper 7856d7a671 Increase number of allowed registers in register classes to 64k instead of 256. Widen register class ID to 16-bits. Widen register size and alignment to be up to 64k bytes instead of 256 bytes. This partially reverts r152019 to be less restrictive.
llvm-svn: 152100
2012-03-06 03:44:22 +00:00
Craig Topper 9734478c86 Revert r152016 and allow overlap, sub, super register tables to be more than 64k entries.
llvm-svn: 152099
2012-03-06 03:28:45 +00:00
Argyrios Kyrtzidis 8de0744441 Remove UsuallyTinyPtrVector.
It is just a worse version of TinyPtrVector.

llvm-svn: 152097
2012-03-06 03:02:16 +00:00
Jakob Stoklund Olesen d9b427ee65 Add <imp-def> operands when reloading into physregs.
When an instruction only writes sub-registers, it is still necessary to
add an <imp-def> operand for the super-register.  When reloading into a
virtual register, rewriting will add the operand, but when loading
directly into a virtual register, the <imp-def> operand is still
necessary.

llvm-svn: 152095
2012-03-06 02:48:17 +00:00
Eric Christopher 8c096d65b3 Fix up link and a couple small edits.
llvm-svn: 152094
2012-03-06 02:25:41 +00:00
Eric Christopher 85cd2a0148 Add the beginnings of documentation for the Name Accelerator Tables.
Based on a writeup originally by Greg Clayton.

Abuse div and pre tags horribly. Needs a bit more cleanup.

llvm-svn: 152093
2012-03-06 02:25:38 +00:00
Eric Christopher 5acc7c1b74 Delete trailing whitespace to clean up.
llvm-svn: 152092
2012-03-06 02:25:36 +00:00
Argyrios Kyrtzidis 0da851245a Add include/llvm/ADT/UsuallyTinyPtrVector.h which is a vector that
optimizes the case where there is only one element.

llvm-svn: 152090
2012-03-06 02:08:48 +00:00
Evan Cheng 217a704acc Avoid finalizeBundles infinite looping.
llvm-svn: 152089
2012-03-06 02:00:52 +00:00
Owen Anderson 2ee7c4dfc5 Make it possible for a target to mark FSUB as Expand. This requires providing a default expansion (FADD+FNEG), and teaching DAGCombine not to form FSUBs post-legalize if they are not legal.
llvm-svn: 152079
2012-03-06 00:29:31 +00:00
Lang Hames 718cfbe05a Split fpscr into two registers: FPSCR and FPSCR_NZCV.
The fpscr register contains both flags (set by FP operations/comparisons) and
control bits. The control bits (FPSCR) should be reserved, since they're always
available and needn't be defined before use. The flag bits (FPSCR_NZCV) should
like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165.

llvm-svn: 152076
2012-03-06 00:19:55 +00:00
Eli Friedman af3c6fe51e A few more cases of missing masking in ComputeMaskedBits; found by inspection.
llvm-svn: 152070
2012-03-05 23:22:40 +00:00
Jim Grosbach 8dc347fc27 ARM vpush/vpop assembler mnemonics accept an optional size suffix.
rdar://10988114

llvm-svn: 152068
2012-03-05 23:16:31 +00:00
Jim Grosbach 6cbf0f13dd Nuke a bit of dead code.
llvm-svn: 152067
2012-03-05 23:09:51 +00:00
Eli Friedman a8b75ac798 Make sure we don't return bits outside the mask in ComputeMaskedBits. PR12189.
llvm-svn: 152066
2012-03-05 23:09:40 +00:00
Jim Grosbach e5307f9019 ARM Refactor VLD/VST spaced pair instructions.
Use the new composite physical registers.

llvm-svn: 152063
2012-03-05 21:43:40 +00:00
Jim Grosbach c71bf4739a ARM Remove a bit of dead code.
llvm-svn: 152061
2012-03-05 21:09:58 +00:00
Jim Grosbach c988e0c521 ARM refactor away a bunch of VLD/VST pseudo instructions.
With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.

llvm-svn: 152045
2012-03-05 19:33:30 +00:00
Jim Grosbach efb4f8ff00 MCRegisterInfo-ize getMatchingSuperReg.
llvm-svn: 152044
2012-03-05 19:33:24 +00:00
Jim Grosbach fd93a59557 Make MCRegisterInfo available to the the MCInstPrinter.
Used to allow context sensitive printing of super-register or sub-register
references.

llvm-svn: 152043
2012-03-05 19:33:20 +00:00
Bill Wendling 7cf6db7e3c Fix warnings about adding a bool to a string.
Patch by Sean Silva!

llvm-svn: 152042
2012-03-05 19:29:36 +00:00
Chad Rosier 9424aa1c51 Address Evan's comments for r151877.
Specifically, remove the magic number when checking to see if the copy has a 
glue operand and simplify the checking logic.

rdar://10930395

llvm-svn: 152041
2012-03-05 19:27:12 +00:00
Jakob Stoklund Olesen fcd435ee73 Remove a test case that no longer makes sense.
This was testing the handling of sub-register coalescing followed by
remat.  The original problem was caused by the extra <imp-def> operands
added by sub-register coalescing.  Those <imp-def> operands are not
added any longer, and the test case passes even when the original patch
is reverted.

llvm-svn: 152040
2012-03-05 19:10:13 +00:00
Sebastian Pop 957a6583f1 updated patch for the ARM fused multiply add/sub
In this update:
- I assumed neon2 does not imply vfpv4, but neon and vfpv4 imply neon2.
- I kept setting .fpu=neon-vfpv4 code attribute because that is what the
assembler understands.

Patch by Ana Pazos <apazos@codeaurora.org>

llvm-svn: 152036
2012-03-05 17:39:52 +00:00
Sebastian Pop 5ce71b18cb fix typos
llvm-svn: 152035
2012-03-05 17:39:47 +00:00
Sebastian Pop 8844e224b8 remove spaces on empty lines
llvm-svn: 152034
2012-03-05 17:39:45 +00:00
Nadav Rotem 9952cf94b5 Remove an unused function.
llvm-svn: 152028
2012-03-05 12:49:45 +00:00
Duncan Sands 3eb328574e This is not a common case, in fact it never happens!
llvm-svn: 152027
2012-03-05 12:23:00 +00:00
Chandler Carruth d95357a18e Switch mem2reg to use the new hashing infrastructure.
llvm-svn: 152026
2012-03-05 11:29:56 +00:00
Chandler Carruth e134d1a336 Replace the ad-hoc hashing in GVN with the new hashing infrastructure.
This implicitly fixes a nasty bug in the GVN hashing (that thankfully
could only manifest as a performance bug): actually include the opcode
in the hash. The old code started the hash off with the opcode, but then
overwrote it with the type pointer.

Since this is likely to be pretty hot (GVN being already pretty
expensive) I've included a micro-optimization to just not bother with
the varargs hashing if they aren't present. I can't measure any change
in GVN performance due to this, even with a big test case like Duncan's
sqlite one. Everything I see is in the noise floor. That said, this
closes a loop hole for a potential scaling problem due to collisions if
the opcode were the differentiating aspect of the expression.

llvm-svn: 152025
2012-03-05 11:29:54 +00:00
Chandler Carruth 08a47fd708 Switch the TableGen record's string-based DenseMap key to use the new
hashing infrastructure. I wonder why we don't just use StringMap here,
and I may revisit the issue if I have time, but for now I'm just trying
to consolidate.

llvm-svn: 152023
2012-03-05 10:36:16 +00:00
Chandler Carruth 5db541304f Switch to a C-style cast here to silence a brain-dead MSVC warning. It
complains about the truncation of a 64-bit constant to a 32-bit value
when size_t is 32-bits wide, but *only with static_cast*!!! The exact
signal that should *silence* such a warning, and in fact does silence it
with both GCC and Clang.

Anyways, this was causing grief for all the MSVC builds, so pointless
change made. Thanks to Nikola on IRC for confirming that this works.

llvm-svn: 152021
2012-03-05 09:56:12 +00:00
Craig Topper d3e7057afc Shrink and reorder fields in MCRegisterClass to reduce size of static data.
llvm-svn: 152019
2012-03-05 08:33:33 +00:00
Craig Topper 4b02a29eba Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
llvm-svn: 152016
2012-03-05 05:37:41 +00:00
Eli Friedman a5a6d6aa8f Make aliases for shld and shrd match gas. PR12173.
llvm-svn: 152014
2012-03-05 04:31:54 +00:00